CN203562766U - Over-voltage and under-voltage protection circuit - Google Patents
Over-voltage and under-voltage protection circuit Download PDFInfo
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- CN203562766U CN203562766U CN201320624117.8U CN201320624117U CN203562766U CN 203562766 U CN203562766 U CN 203562766U CN 201320624117 U CN201320624117 U CN 201320624117U CN 203562766 U CN203562766 U CN 203562766U
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Abstract
An over-voltage and under-voltage protection circuit comprises an under-voltage protection circuit, an over-voltage protection circuit and an output control circuit, all of which are connected in a power supply circuit. The under-voltage protection circuit is composed of a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a capacitor C1, a capacitor C2, a Zener diode DZ1, Zener diode DZ2, a triode Q1 and a triode Q2. The over-voltage protection circuit is composed of a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a capacitor C3, a capacitor C4, a Zener diode DZ3, a Zener diode DZ4, Zener diode DZ5, a triode Q3 and a triode Q4. The output control circuit is composed of a resistor R11, a capacitor C5, an MOS transistor Q5 and a diode D1. According to the utility model, passive devices are adopted, so that the over-voltage and under-voltage protection towards a power supply is ensured, the power consumption is low, and the response speed is high.
Description
Technical field
The utility model relates to a kind of electronic circuit, and specifically a kind of overvoltage and under-voltage protecting circuit, belong to supply voltage switch resist technology field.
Background technology
When the supply power voltage of Switching Power Supply lower than or during higher than normal working voltage certain value, all may cause power supply normally to work and even damage.In order to address the above problem, people have designed overvoltage, under-voltage protecting circuit, and conventional overvoltage and under-voltage protecting circuit is by another accessory power supply, to power to control the object that its break-make reaches protection with relay at present.Relay reaction speed is slow, and need to provide in addition a power supply to come, to relay power supply, so not only cause power consumption to increase, and the protection of accessory power supply to be also a problem.
Utility model content
For above-mentioned deficiency, the utility model provides a kind of overvoltage and under-voltage protecting circuit, and it not only can carry out overvoltage, under-voltage protection to power supply, and consumes low in energy consumption.
The utility model solves the technical scheme that its technical problem adopts: a kind of overvoltage and under-voltage protecting circuit, comprise the under-voltage protecting circuit being connected in power circuit, overvoltage crowbar and output control circuit, it is characterized in that, described under-voltage protecting circuit is by resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, capacitor C 1, capacitor C 2, voltage stabilizing didoe DZ1, voltage stabilizing didoe DZ2, triode Q1 and triode Q2 form, described overvoltage crowbar is by resistance R 6, resistance R 7, resistance R 8, resistance R 9, resistance R 10, capacitor C 3, capacitor C 4, voltage stabilizing didoe DZ3, voltage stabilizing didoe DZ4, voltage stabilizing didoe DZ5, triode Q3 and triode Q4 form, described output control circuit is by resistance R 11, capacitor C 5, transistor Q5 and diode D1 form,
Wherein, resistance R 1, resistance R 2, resistance R 3, resistance R 6, resistance R 7 is connected with one end of resistance R 8 and the positive pole of power circuit, one end of the other end of described resistance R 1 and resistance R 4, one end of resistance R 5, the negative pole of voltage stabilizing didoe DZ2 is connected with one end of capacitor C 2, and the positive pole of described voltage stabilizing didoe DZ2 is connected with the base stage of triode Q2 with one end of capacitor C 1, the other end of the other end of described resistance R 2 and capacitor C 1, the collector electrode of triode Q2 is connected with the negative pole of voltage stabilizing didoe DZ1, the other end of the other end of described resistance R 3 and resistance R 4, the collector electrode of triode Q1 is connected with the grid of transistor Q5, and the base stage of described triode Q1 is connected with the positive pole of voltage stabilizing didoe DZ1, the other end of the emitter of described triode Q1 and capacitor C 2, the other end of resistance R 5, the emitter of triode Q2, one end of the source electrode of transistor Q5 and capacitor C 5 is connected and ground connection, one end of the other end of described resistance R 6 and resistance R 9, one end of resistance R 10, the negative pole of voltage stabilizing didoe DZ4 is connected with one end of capacitor C 4, and the positive pole of described voltage stabilizing didoe DZ4 is connected with the base stage of triode Q4 with one end of capacitor C 3, the other end of the other end of described resistance R 7 and capacitor C 3, the collector electrode of triode Q4, the negative pole of voltage stabilizing didoe DZ3 is connected with the grid of transistor Q5, the other end of the other end of described resistance R 8 and resistance R 9, the collector electrode of triode Q3 is connected with the negative pole of voltage stabilizing didoe DZ5, and the base stage of described triode Q3 is connected with the positive pole of voltage stabilizing didoe DZ3, the other end of the emitter of described triode Q3 and capacitor C 4, the other end of resistance R 10, the emitter of triode Q4, the positive pole of voltage stabilizing didoe DZ5 is connected with power circuit input cathode and ground connection, the other end of described capacitor C 5 is connected with the negative pole of diode D1 with one end of resistance R 11, and the drain electrode of described transistor Q5 is connected with power circuit output end negative pole with the other end of resistance R 11 and the positive pole of diode D1.
Preferably, described triode Q1, triode Q2, triode Q3 and triode Q4 all adopt NPN type triode.
Preferably, described transistor Q5 adopts N-type MOS transistor.
The utlity model has following outstanding beneficial effect: adopt after said structure; overvoltage described in the utility model and under-voltage protecting circuit have adopted passive device; without external power source; from the input of power circuit, drawing atomic little electric current can be self circuit and powers; it not only can carry out overvoltage and under-voltage protection to power supply, and consume low in energy consumption, reaction speed is fast.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, the utility model is described in further detail:
Fig. 1 is basic circuit diagram of the present utility model.
Embodiment
As shown in Figure 1, a kind of overvoltage of the present utility model and under-voltage protecting circuit, it comprises the under-voltage protecting circuit being connected in power circuit, overvoltage crowbar and output control circuit, described under-voltage protecting circuit is by resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, capacitor C 1, capacitor C 2, voltage stabilizing didoe DZ1, voltage stabilizing didoe DZ2, NPN type triode Q1 and NPN type triode Q2 form, described overvoltage crowbar is by resistance R 6, resistance R 7, resistance R 8, resistance R 9, resistance R 10, capacitor C 3, capacitor C 4, voltage stabilizing didoe DZ3, voltage stabilizing didoe DZ4, voltage stabilizing didoe DZ5, NPN type triode Q3 and NPN type triode Q4 form, described output control circuit is by resistance R 11, capacitor C 5, N-type MOS transistor Q5 and diode D1 form,
Wherein, resistance R 1, resistance R 2, resistance R 3, resistance R 6, resistance R 7 is connected with one end of resistance R 8 and the positive pole of power circuit, one end of the other end of described resistance R 1 and resistance R 4, one end of resistance R 5, the negative pole of voltage stabilizing didoe DZ2 is connected with one end of capacitor C 2, the positive pole of described voltage stabilizing didoe DZ2 is connected with the base stage of NPN type triode Q2 with one end of capacitor C 1, the other end of the other end of described resistance R 2 and capacitor C 1, the collector electrode of NPN type triode Q2 is connected with the negative pole of voltage stabilizing didoe DZ1, the other end of the other end of described resistance R 3 and resistance R 4, the collector electrode of NPN type triode Q1 is connected with the grid of N-type MOS transistor Q5, the base stage of described NPN type triode Q1 is connected with the positive pole of voltage stabilizing didoe DZ1, the emitter of described NPN type triode Q1 and the other end of capacitor C 2, the other end of resistance R 5, the emitter of NPN type triode Q2, the source electrode of N-type MOS transistor Q5 is connected with one end of capacitor C 5 and ground connection, one end of the other end of described resistance R 6 and resistance R 9, one end of resistance R 10, the negative pole of voltage stabilizing didoe DZ4 is connected with one end of capacitor C 4, the positive pole of described voltage stabilizing didoe DZ4 is connected with the base stage of NPN type triode Q4 with one end of capacitor C 3, the other end of the other end of described resistance R 7 and capacitor C 3, the collector electrode of NPN type triode Q4, the negative pole of voltage stabilizing didoe DZ3 is connected with the grid of N-type MOS transistor Q5, the other end of the other end of described resistance R 8 and resistance R 9, the collector electrode of NPN type triode Q3 is connected with the negative pole of voltage stabilizing didoe DZ5, the base stage of described NPN type triode Q3 is connected with the positive pole of voltage stabilizing didoe DZ3, the emitter of described NPN type triode Q3 and the other end of capacitor C 4, the other end of resistance R 10, the emitter of NPN type triode Q4, the positive pole of voltage stabilizing didoe DZ5 is connected with power circuit input cathode and ground connection, the other end of described capacitor C 5 is connected with the negative pole of diode D1 with one end of resistance R 11, the drain electrode of described N-type MOS transistor Q5 is connected with power circuit output end negative pole with the positive pole of the other end of resistance R 11 and diode D1.
After overvoltage described in the utility model and under-voltage protecting circuit are connected on the rectifier of Switching Power Supply, before filter capacitor, in order to protection, comprise the late-class circuit of filter capacitor.Under-voltage protection mechanism of the present utility model is; if through the voltage of rectifier output during lower than set point; the collector potential of NPN type triode Q2 rises; be raised to the time marquis who makes NPN type triode Q1 conducting; circuit state upset, Q1 is saturated for NPN type triode, and the grid potential of N-type MOS transistor Q5 is moved to very low; N-type MOS transistor Q5 disconnects, and late-class circuit can not get power supply.This circuit is similar to Schmidt circuit, has certain return difference, so NPN type triode Q1 only can be operated in two states, and the one, saturation condition, the 2nd, complete off state, has so just avoided N-type MOS transistor Q5 to be operated in the loss that non-on off state causes.Similarly, the mechanism of overvoltage crowbar of the present utility model is, when the voltage through rectifier output is during higher than set point; the state of circuit overturns; the collector potential of NPN type triode Q4 is dragged down, thereby turn-offs N-type MOS transistor Q5, reaches the object of protection.
The above is preferred implementation of the present utility model; for those skilled in the art; not departing under the prerequisite of the utility model principle, can also make some improvements and modifications, these improvements and modifications are also regarded as protection range of the present utility model.
Claims (3)
1. an overvoltage and under-voltage protecting circuit, comprise the under-voltage protecting circuit being connected in power circuit, overvoltage crowbar and output control circuit, it is characterized in that, described under-voltage protecting circuit is by resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, capacitor C 1, capacitor C 2, voltage stabilizing didoe DZ1, voltage stabilizing didoe DZ2, triode Q1 and triode Q2 form, described overvoltage crowbar is by resistance R 6, resistance R 7, resistance R 8, resistance R 9, resistance R 10, capacitor C 3, capacitor C 4, voltage stabilizing didoe DZ3, voltage stabilizing didoe DZ4, voltage stabilizing didoe DZ5, triode Q3 and triode Q4 form, described output control circuit is by resistance R 11, capacitor C 5, transistor Q5 and diode D1 form,
Wherein, resistance R 1, resistance R 2, resistance R 3, resistance R 6, resistance R 7 is connected with one end of resistance R 8 and the positive pole of power circuit, one end of the other end of described resistance R 1 and resistance R 4, one end of resistance R 5, the negative pole of voltage stabilizing didoe DZ2 is connected with one end of capacitor C 2, and the positive pole of described voltage stabilizing didoe DZ2 is connected with the base stage of triode Q2 with one end of capacitor C 1, the other end of the other end of described resistance R 2 and capacitor C 1, the collector electrode of triode Q2 is connected with the negative pole of voltage stabilizing didoe DZ1, the other end of the other end of described resistance R 3 and resistance R 4, the collector electrode of triode Q1 is connected with the grid of transistor Q5, and the base stage of described triode Q1 is connected with the positive pole of voltage stabilizing didoe DZ1, the other end of the emitter of described triode Q1 and capacitor C 2, the other end of resistance R 5, the emitter of triode Q2, one end of the source electrode of transistor Q5 and capacitor C 5 is connected and ground connection, one end of the other end of described resistance R 6 and resistance R 9, one end of resistance R 10, the negative pole of voltage stabilizing didoe DZ4 is connected with one end of capacitor C 4, and the positive pole of described voltage stabilizing didoe DZ4 is connected with the base stage of triode Q4 with one end of capacitor C 3, the other end of the other end of described resistance R 7 and capacitor C 3, the collector electrode of triode Q4, the negative pole of voltage stabilizing didoe DZ3 is connected with the grid of transistor Q5, the other end of the other end of described resistance R 8 and resistance R 9, the collector electrode of triode Q3 is connected with the negative pole of voltage stabilizing didoe DZ5, and the base stage of described triode Q3 is connected with the positive pole of voltage stabilizing didoe DZ3, the other end of the emitter of described triode Q3 and capacitor C 4, the other end of resistance R 10, the emitter of triode Q4, the positive pole of voltage stabilizing didoe DZ5 is connected with power circuit input cathode and ground connection, the other end of described capacitor C 5 is connected with the negative pole of diode D1 with one end of resistance R 11, and the drain electrode of described transistor Q5 is connected with power circuit output end negative pole with the other end of resistance R 11 and the positive pole of diode D1.
2. a kind of overvoltage according to claim 1 and under-voltage protecting circuit, is characterized in that, described triode Q1, triode Q2, triode Q3 and triode Q4 all adopt NPN type triode.
3. a kind of overvoltage according to claim 1 and under-voltage protecting circuit, is characterized in that, described transistor Q5 adopts N-type MOS transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320624117.8U CN203562766U (en) | 2013-10-10 | 2013-10-10 | Over-voltage and under-voltage protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320624117.8U CN203562766U (en) | 2013-10-10 | 2013-10-10 | Over-voltage and under-voltage protection circuit |
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| CN203562766U true CN203562766U (en) | 2014-04-23 |
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| CN201320624117.8U Withdrawn - After Issue CN203562766U (en) | 2013-10-10 | 2013-10-10 | Over-voltage and under-voltage protection circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103490388A (en) * | 2013-10-10 | 2014-01-01 | 济南沃尔电子有限公司 | Over-voltage and under-voltage protection circuit |
| CN105262056A (en) * | 2015-11-12 | 2016-01-20 | 中国船舶重工集团公司第七一六研究所 | PWM signal isolation transformation system based on pulse transformer |
| CN105762854A (en) * | 2014-12-16 | 2016-07-13 | 厦门雅迅网络股份有限公司 | Battery power supply circuit and power supply method thereof |
-
2013
- 2013-10-10 CN CN201320624117.8U patent/CN203562766U/en not_active Withdrawn - After Issue
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103490388A (en) * | 2013-10-10 | 2014-01-01 | 济南沃尔电子有限公司 | Over-voltage and under-voltage protection circuit |
| CN103490388B (en) * | 2013-10-10 | 2016-01-13 | 济南沃尔电子有限公司 | A kind of overvoltage and under-voltage protecting circuit |
| CN105762854A (en) * | 2014-12-16 | 2016-07-13 | 厦门雅迅网络股份有限公司 | Battery power supply circuit and power supply method thereof |
| CN105762854B (en) * | 2014-12-16 | 2019-11-05 | 厦门雅迅网络股份有限公司 | A kind of battery feed circuit and method of supplying power to |
| CN105262056A (en) * | 2015-11-12 | 2016-01-20 | 中国船舶重工集团公司第七一六研究所 | PWM signal isolation transformation system based on pulse transformer |
| CN105262056B (en) * | 2015-11-12 | 2019-01-04 | 中国船舶重工集团公司第七一六研究所 | A kind of pwm signal isolated variable system based on pulse transformer |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20140423 Effective date of abandoning: 20160113 |
|
| C25 | Abandonment of patent right or utility model to avoid double patenting |