CN203535872U - Experiment platform integrated with DSP, single-chip microcomputer and CPLD - Google Patents
Experiment platform integrated with DSP, single-chip microcomputer and CPLD Download PDFInfo
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- CN203535872U CN203535872U CN201320633413.4U CN201320633413U CN203535872U CN 203535872 U CN203535872 U CN 203535872U CN 201320633413 U CN201320633413 U CN 201320633413U CN 203535872 U CN203535872 U CN 203535872U
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Abstract
The utility model belongs to the electronic experiment equipment technology field, and specifically relates to an experiment platform integrated with a DSP, a single-chip microcomputer and a CPLD. The experiment platform comprises a processing circuit board, an output module board, an input module board, a network communication module board, a USB communication module board, a sensor module board, an AD/DA module board, a driving module board and a power supply module board; and the processing circuit board, the output module board, the input module board, the network communication module board, the USB communication module board, the sensor module board, the AD/DA module board and the driving module board are powered by the power supply module board through a power interface. The experiment platform has a higher hierarchy, basic experiment contents about the DSP, the single-chip microcomputer and the CPLD processors can be independently implemented, and the three processors can be combined and integrated with other functional module circuits to form a complex applicability experiment. Compared with a traditional experiment platform, the experiment platform has the characteristics of clear structure, reasonable design, transparent wiring and flexible use.
Description
Technical field
The utility model belongs to electrical type experimental facilities technical field, specifically the experiment porch of a kind of DSP, single-chip microcomputer and CPLD one.
Background technology
Current, the research of embedded system has become study hotspot, and the embedded system of usining is more and more as the enterprise and company of research and development project.Digital signal processor (DSP), single-chip microcomputer, CPLD (CPLD), as Embedded San Ge branch, have become the important content of teaching and the training of Ge great universities and colleges and training organization.And DSP, single-chip microcomputer, CPLD have been widely used in the fields such as consumer electronics, Industry Control, communication medical treatment, Aero-Space, automotive electronics.Ge great universities and colleges have also all carried out DSP, single-chip microcomputer, the theory of CPLD and the teaching of experiment.
The experimental facilities that each universities and colleges and training organization adopt provides mainly with the mode of experimental box, the function module circuit of processor core circuitry, all expansions has all been integrated on the circuit board of experimental box.This mode makes student in experiment, and what the hardware operation of experiment became is simple, convenient.But on the one hand, circuit board module after integrated is various, content is complicated, hardware is opaque.This has just caused student in when study, and the relation of hardware and software cannot be well understood in the connection that cannot understand and learn hardware circuit.On the other hand, DSP, single-chip microcomputer, CPLD are generally three independently experimental courses, and student can be in experiment porch learning and exercise separately.But, seldom have universities and colleges or training organization that three is combined and is combined together, for Students ' Comprehensive inquiry learning and training.
Summary of the invention
The problem existing for prior art, the utility model provides the experiment porch of a kind of DSP, single-chip microcomputer and CPLD one.
The technical solution of the utility model is:
An experiment porch for DSP, single-chip microcomputer and CPLD one, comprises treatment circuit plate, output module plate, load module plate, network communication module plate, usb communication module board, sensor assembly plate, AD/DA module board, driver module plate and power module plate;
Described treatment circuit plate comprises DSP minimum system, single-chip minimum system, CPLD minimum system and bus interface; DSP minimum system, single-chip minimum system, CPLD minimum system are connected to respectively bus interface;
Described load module plate comprises key circuit, PS/2 circuit, clock circuit, infrared receiving circuit, wireless receiving circuit and input interface; The output terminal of the output terminal of key circuit, PS/2 circuit, the output terminal of clock circuit, the output terminal of infrared receiving circuit and the output terminal of wireless receiving circuit are all connected to input interface;
Described output module plate comprises LED circuit, dot matrix circuit, charactron circuit, 1602 circuit, 12864 circuit, TFT circuit and output interface; The input end of the input end of the input end of the input end of the input end of the input end of LED circuit, dot matrix circuit, charactron circuit, 1602 circuit, 12864 circuit, TFT circuit is all connected to output interface;
Described network communication module plate comprises network controller circuit, buffer circuit, RJ45 mouth and network interface; RJ45 mouth is connected with buffer circuit, is connected to and network interface;
Described usb communication module board comprises USB controller circuitry, master/slave mouthful of USB, 48M crystal oscillator and USB interface; 48M crystal oscillator is connected to USB controller circuitry, and USB controller circuitry is also connected to master/slave mouthful of USB and USB interface;
Described sensor assembly plate comprises temperature humidity testing circuit, light testing circuit, sound shake testing circuit and control interface; The shake output terminal of testing circuit of the output terminal of temperature humidity testing circuit, light testing circuit, sound is all connected to control interface;
Described AD/DA module board comprises modulus/D/A converting circuit, A/D input circuit, D/A output circuit and A/D interface; A/D input circuit, D/A output circuit are connected respectively to modulus/D/A converting circuit, and modulus/D/A converting circuit also connects A/D interface;
Described driver module plate comprises bus driving circuits, wire jumper combinatorial matrix circuit and drives interface; Bus driving circuits is connected with wire jumper combinatorial matrix circuit, and bus driving circuits, wire jumper combinatorial matrix circuit are connected to respectively driving interface;
Described power module plate comprises Power supply, USB power supply, interlocking button, 3.3V circuit, 1.8V circuit and power interface; The output terminal of USB power supply connects an input end of interlocking button, the output terminal of Power supply connects another input end of interlocking button, the output terminal of interlocking button is connected to respectively the input end of 3.3V circuit, input end and the power interface of 1.8V circuit, and the output terminal of the output terminal of 3.3V circuit, 1.8V circuit is connected to respectively power interface;
Bus interface is connected by Du Pont's line with driving interface, and input interface, output interface, network interface, USB interface, control interface, A/D interface are all connected to driving interface by Du Pont's line; Power module plate is that treatment circuit plate, output module plate, load module plate, network communication module plate, usb communication module board, sensor assembly plate, AD/DA module board, driver module plate are powered by power interface.
All pins of the DSP of described DSP minimum system are all reserved in dsp interface mode.
All pins of the single-chip microcomputer of described single-chip minimum system are all reserved in interface microcontroller mode.
All IO mouths of the CPLD of described CPLD minimum system are all reserved with CPLD interface mode.
Described LED circuit comprises two groups of LED lamps, and every group comprises 8 LED lamps; Described charactron circuit comprises 8 charactrons.
Described key circuit comprises 8 row 8 row buttons.
Described network interface comprises FPDP, address port and the control port of network controller circuit.
Described USB interface comprises FPDP, address port and the control port of USB controller circuitry.
Described bus driving circuits comprises 4 16 bus driver chips, and is bidirectional bus driving.
Described wire jumper combinatorial matrix circuit comprises 304 wire jumper contact pins, can use Du Pont's line to realize the connection of any two wire jumper contact pins.
Beneficial effect:
1, hardware module function of the present utility model is clear, has realized the modularization of hardware circuit.
2, hardware line of the present utility model is flexible and transparent, both can configure voluntarily, can use again Du Pont's line line voluntarily.
3, the utility model provides comparatively complete systemic-function, and identical function is taken into account simple general-purpose with complicated professional.
4, the utlity model has stronger level, both can complete DSP, single-chip microcomputer, the unidirectional basic experiment content of CPLD processor, again can be by three processors in conjunction with comprehensively going out complicated application experiment with other function module circuits.
5, of the present utility model practical, compare with traditional experiment porch, there is clear in structure, reasonable in design, wiring is transparent, use feature flexibly, be conducive to promote the use of.
Accompanying drawing explanation
Fig. 1 is the experiment porch the general frame of DSP, single-chip microcomputer and the CPLD one of the utility model embodiment;
Fig. 2 is the treatment circuit plate topological diagram of the utility model embodiment;
Fig. 3 is the output module plate topological diagram of the utility model embodiment;
Fig. 4 is the load module plate topological diagram of the utility model embodiment;
Fig. 5 is the driver module plate topological diagram of the utility model embodiment;
Fig. 6 is the network communication module plate topological diagram of the utility model embodiment;
Fig. 7 is the sensor assembly plate topological diagram of the utility model embodiment;
Fig. 8 is the usb communication module board topological diagram of the utility model embodiment;
Fig. 9 is the AD/DA module board topological diagram of the utility model embodiment;
Figure 10 is the power module plate topological diagram of the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is elaborated.
As shown in Figure 1, the experiment porch of the DSP of present embodiment, single-chip microcomputer and CPLD one, comprises treatment circuit plate, output module plate, load module plate, network communication module plate, usb communication module board, sensor assembly plate, AD/DA module board, driver module plate and power module plate.
Treatment circuit plate is the processing enter of this experiment porch, and as shown in Figure 2, treatment circuit plate comprises DSP minimum system, single-chip minimum system, CPLD minimum system and bus interface; DSP minimum system, single-chip minimum system, CPLD minimum system are connected to respectively bus interface, all pins of the DSP of DSP minimum system are all reserved in dsp interface mode, all pins of the single-chip microcomputer of single-chip minimum system are all reserved in interface microcontroller mode, and all IO mouths of the CPLD of CPLD minimum system are all reserved with CPLD interface mode.
In treatment circuit plate, DSP minimum system adopts TMS320VC5402 chip as dsp processor, use IS61LV6416 chip as RAM outer extension memory, use 20M crystal oscillator as input clock, and use JTAG1 as debug port, DSP hardware pin provides in dsp interface simultaneously, the data line of RAM outer extension memory, low order address line pin corresponding to dsp processor connect, and sheet select pin, read to control pin, write control pin, high address line also provides in dsp interface; Single-chip minimum system adopts STC89LE516RD+ chip, uses 12M crystal oscillator to input as clock, uses serial communication as debug port, the hardware pin of single-chip microcomputer is provided in interface microcontroller simultaneously; CPLD minimum system processor adopting EPM7032AE chip, is used JTAG2 as debug port, and all IO mouths provide in CPLD interface simultaneously, and the clock input of CPLD provides input by outside by CPLD interface; The interface of three minimum systems is finally articulated in bus interface, and offers study and developer's use in the mode of matrix wire jumper contact pin.
Load module plate is the input equipment of experiment porch, and as shown in Figure 4, load module plate comprises key circuit, PS/2 circuit, clock circuit, infrared receiving circuit, wireless receiving circuit and input interface; The output terminal of the output terminal of key circuit, PS/2 circuit, the output terminal of clock circuit, the output terminal of infrared receiving circuit and the output terminal of wireless receiving circuit are all connected to input interface; Key circuit comprises 8 row 8 row buttons, PS/2 circuit provides the PS/2 mouth can external PC keyboard, clock circuit is realized by DS1302 real-time timepiece chip, infrared receiving circuit is selected infrared HS0038 one receiving tube, wireless receiving circuit is selected 433M wireless receiving module, and all input control signals are all extended to input interface.
Output module plate is the output device of experiment porch, and as shown in Figure 3, output module plate comprises LED circuit, dot matrix circuit, charactron circuit, 1602 circuit, 12864 circuit, TFT circuit and output interface; The input end of the input end of the input end of the input end of the input end of the input end of LED circuit, dot matrix circuit, charactron circuit, 1602 circuit, 12864 circuit, TFT circuit is all connected to output interface; LED circuit comprises two groups of LED lamps, and every group comprises 8 LED lamps, charactron circuit comprises 8 charactrons, what dot matrix circuit adopted is 8 * 8 dot matrix, 1602 circuit adopt 1602 liquid crystal displays, 12864 circuit adopt 12864 liquid crystal displays, and what TFT circuit adopted is the TFT Liquid Crystal Module that is integrated with bus driver, and all output control signals are all extended to output interface.
The communication facilities that network communication module plate and usb communication module board are experiment porch, as shown in Figure 6, network communication module plate comprises network controller circuit, buffer circuit, RJ45 mouth and network interface; RJ45 mouth is connected with buffer circuit, and network controller circuit is connected to buffer circuit and network interface; Network controller circuit adopts RTL8019AS chip, and buffer circuit uses network isolation transformer 20F001N, the external Ethernet of RJ45 mouth, and the data bus of network controller circuit, address bus, control bus are expanded out in the mode of network interface.
As shown in Figure 8, usb communication module board is comprised of USB controller circuitry, the master/slave mouth of USB, 48M crystal oscillator, USB interface; The output terminal of 48M crystal oscillator is connected to USB controller circuitry, and USB controller circuitry is also connected to master/slave mouthful of USB and USB interface; USB controller circuitry adopts SL811HS chip, uses 48M crystal oscillator, uses master/slave mouthful of circumscribed USB equipment of USB and main frame, and the data bus of USB controller circuitry, address bus, control bus provide in the mode of USB interface.
The external expansion equipment that sensor assembly plate and AD/DA module board are experiment porch, as shown in Figure 7, sensor assembly plate comprises temperature humidity testing circuit, light testing circuit, sound shake testing circuit and control interface; The shake output terminal of testing circuit of the output terminal of temperature humidity testing circuit, light testing circuit, sound is all connected to control interface; Temperature humidity testing circuit adopts DHT11 device, and light testing circuit adopts photoresistance, and the sound testing circuit that shakes is comprised of highly sensitive microphone sensor and analog to digital conversion circuit, and all control mouths of sensor assembly plate all provide with control interface.
As shown in Figure 9, AD/DA module board comprises modulus/D/A converting circuit, A/D input circuit, D/A output circuit and A/D interface; The input end of the output terminal of A/D input circuit, D/A output circuit is connected to modulus/D/A converting circuit, and modulus/D/A converting circuit also connects A/D interface; The modulus of AD/DA module board/D/A converting circuit adopts PCF8591 chip, and A/D input circuit provides 4 tunnel analog inputs, and D/A output circuit provides 1 tunnel simulation output, and data address is controlled three buses and expanded to A/D interface.
Driver module plate is signal wire configuration and the driving arrangement of experiment porch, and as shown in Figure 5, driver module plate comprises bus driving circuits, wire jumper combinatorial matrix circuit and drives interface; Bus driving circuits is connected with wire jumper combinatorial matrix circuit, and bus driving circuits, wire jumper combinatorial matrix circuit are connected to respectively driving interface; Bus driving circuits comprises 4 16 bus driver chip SN74LVC16T245, and for bidirectional bus drives, wire jumper combinatorial matrix circuit comprises 304 wire jumper contact pins, can use Du Pont line to connect and disconnect any two wire jumper contact pins, with the docking that realizes two signal wires with separated.
Power module plate is the power-supply system of whole experiment porch, and as shown in figure 10, power module plate comprises Power supply, USB power supply, interlocking button, 3.3V circuit, 1.8V circuit and power interface; The output terminal of USB power supply connects an input end of interlocking button, the output terminal of Power supply connects another input end of interlocking button, the output terminal of interlocking button is connected to respectively the input end of 3.3V circuit, input end and the power interface of 1.8V circuit, and the output terminal of the output terminal of 3.3V circuit, 1.8V circuit is connected to power interface; Power module plate adopts the Power supply of 5V and two kinds of modes of the USB of 5V power supply, adopt interlocking button to carry out power supply mode switching, 3.3V circuit adopts AMS1117-3.3 device, 1.8V circuit adopts AMS1117-1.8 device, 5V, 3.3V, 1.8V, GND is provided in the mode of power interface simultaneously.
Bus interface is connected by Du Pont's line with driving interface, and input interface, output interface, network interface, USB interface, control interface, A/D interface are all connected to driving interface by Du Pont's line, treatment circuit plate is connected with the driving interface of driver module plate by bus interface, the driving interface of driver module plate also with the output interface of output module plate, the input interface of load module plate, the network interface of network communication module plate, the USB interface of usb communication module board, the control interface of sensor assembly plate, corresponding being connected of A/D interface of AD/DA module board, power module plate is treatment circuit plate by power interface, output module plate, load module plate, network communication module plate, usb communication module board, sensor assembly plate, AD/DA module board, the power supply of driver module plate, the wire jumper combinatorial matrix circuit of driver module plate is realized the one-to-one relationship of bus signals and other module board interface signals for the treatment of circuit plate.
Claims (10)
1. an experiment porch for DSP, single-chip microcomputer and CPLD one, is characterized in that: comprise treatment circuit plate, output module plate, load module plate, network communication module plate, usb communication module board, sensor assembly plate, AD/DA module board, driver module plate and power module plate;
Described treatment circuit plate comprises DSP minimum system, single-chip minimum system, CPLD minimum system and bus interface; DSP minimum system, single-chip minimum system, CPLD minimum system are connected to respectively bus interface;
Described load module plate comprises key circuit, PS/2 circuit, clock circuit, infrared receiving circuit, wireless receiving circuit and input interface; The output terminal of the output terminal of key circuit, PS/2 circuit, the output terminal of clock circuit, the output terminal of infrared receiving circuit and the output terminal of wireless receiving circuit are all connected to input interface;
Described output module plate comprises LED circuit, dot matrix circuit, charactron circuit, 1602 circuit, 12864 circuit, TFT circuit and output interface; The input end of the input end of the input end of the input end of the input end of the input end of LED circuit, dot matrix circuit, charactron circuit, 1602 circuit, 12864 circuit, TFT circuit is all connected to output interface;
Described network communication module plate comprises network controller circuit, buffer circuit, RJ45 mouth and network interface; RJ45 mouth is connected with buffer circuit, is connected to and network interface;
Described usb communication module board comprises USB controller circuitry, master/slave mouthful of USB, 48M crystal oscillator and USB interface; 48M crystal oscillator is connected to USB controller circuitry, and USB controller circuitry is also connected to master/slave mouthful of USB and USB interface;
Described sensor assembly plate comprises temperature humidity testing circuit, light testing circuit, sound shake testing circuit and control interface; The shake output terminal of testing circuit of the output terminal of temperature humidity testing circuit, light testing circuit, sound is all connected to control interface;
Described AD/DA module board comprises modulus/D/A converting circuit, A/D input circuit, D/A output circuit and A/D interface; A/D input circuit, D/A output circuit are connected respectively to modulus/D/A converting circuit, and modulus/D/A converting circuit also connects A/D interface;
Described driver module plate comprises bus driving circuits, wire jumper combinatorial matrix circuit and drives interface; Bus driving circuits is connected with wire jumper combinatorial matrix circuit, and bus driving circuits, wire jumper combinatorial matrix circuit are connected to respectively driving interface;
Described power module plate comprises Power supply, USB power supply, interlocking button, 3.3V circuit, 1.8V circuit and power interface; The output terminal of USB power supply connects an input end of interlocking button, the output terminal of Power supply connects another input end of interlocking button, the output terminal of interlocking button is connected to respectively the input end of 3.3V circuit, input end and the power interface of 1.8V circuit, and the output terminal of the output terminal of 3.3V circuit, 1.8V circuit is connected to respectively power interface;
Bus interface is connected by Du Pont's line with driving interface, and input interface, output interface, network interface, USB interface, control interface, A/D interface are all connected to driving interface by Du Pont's line; Power module plate is that treatment circuit plate, output module plate, load module plate, network communication module plate, usb communication module board, sensor assembly plate, AD/DA module board, driver module plate are powered by power interface.
2. the experiment porch of DSP according to claim 1, single-chip microcomputer and CPLD one, is characterized in that: all pins of the DSP of described DSP minimum system are all reserved in dsp interface mode.
3. the experiment porch of DSP according to claim 1, single-chip microcomputer and CPLD one, is characterized in that: all pins of the single-chip microcomputer of described single-chip minimum system are all reserved in interface microcontroller mode.
4. the experiment porch of DSP according to claim 1, single-chip microcomputer and CPLD one, is characterized in that: all IO mouths of the CPLD of described CPLD minimum system are all reserved with CPLD interface mode.
5. the experiment porch of DSP according to claim 1, single-chip microcomputer and CPLD one, is characterized in that: described LED circuit comprises two groups of LED lamps, and every group comprises 8 LED lamps; Described charactron circuit comprises 8 charactrons.
6. the experiment porch of DSP according to claim 1, single-chip microcomputer and CPLD one, is characterized in that: described key circuit comprises 8 row 8 row buttons.
7. the experiment porch of DSP according to claim 1, single-chip microcomputer and CPLD one, is characterized in that: described network interface comprises FPDP, address port and the control port of network controller circuit.
8. the experiment porch of DSP according to claim 1, single-chip microcomputer and CPLD one, is characterized in that: described USB interface comprises FPDP, address port and the control port of USB controller circuitry.
9. the experiment porch of DSP according to claim 1, single-chip microcomputer and CPLD one, is characterized in that: described bus driving circuits comprises 4 16 bus driver chips, and is bidirectional bus driving.
10. the experiment porch of DSP according to claim 1, single-chip microcomputer and CPLD one, is characterized in that: described wire jumper combinatorial matrix circuit comprises 304 wire jumper contact pins, can use Du Pont's line to realize the connection of any two wire jumper contact pins.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320633413.4U CN203535872U (en) | 2013-10-14 | 2013-10-14 | Experiment platform integrated with DSP, single-chip microcomputer and CPLD |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201320633413.4U CN203535872U (en) | 2013-10-14 | 2013-10-14 | Experiment platform integrated with DSP, single-chip microcomputer and CPLD |
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| CN203535872U true CN203535872U (en) | 2014-04-09 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107861052A (en) * | 2017-11-27 | 2018-03-30 | 国营芜湖机械厂 | A kind of test box of circuit board |
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2013
- 2013-10-14 CN CN201320633413.4U patent/CN203535872U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107861052A (en) * | 2017-11-27 | 2018-03-30 | 国营芜湖机械厂 | A kind of test box of circuit board |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140409 Termination date: 20211014 |
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| CF01 | Termination of patent right due to non-payment of annual fee |