CN203301430U - CMOS amplifier capable of reinforcing sink current and driving capacitive load - Google Patents
CMOS amplifier capable of reinforcing sink current and driving capacitive load Download PDFInfo
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- CN203301430U CN203301430U CN2013200668625U CN201320066862U CN203301430U CN 203301430 U CN203301430 U CN 203301430U CN 2013200668625 U CN2013200668625 U CN 2013200668625U CN 201320066862 U CN201320066862 U CN 201320066862U CN 203301430 U CN203301430 U CN 203301430U
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Abstract
Disclosed is a CMOS amplifier capable of reinforcing sink current and driving a capacitive load. A first emitter follower bipolar transistor is connected to an output stage of the amplifier, a circuit reinforces the stability of the output stage of the amplifier by compensating voltage base-emitter (VBE) of the bipolar transistor, a second emitter follower bipolar transistor and the first emitter follower bipolar transistor jointly drive a difference amplifier, the output end of the difference amplifier controls the electric conductance of an MOS transistor connected to the output end of the amplifier, another MOS transistor is connected with the second emitter follower bipolar transistor in series, a grid electrode of the MOS transistor is connected to the output end of the difference amplifier, an added sink current causes the increase of the current passing through the second emitter follower bipolar transistor and the VBE of the second emitter follower bipolar transistor, and therefore the VBE of the first emitter follower bipolar transistor is increased.
Description
Technical field
The present invention relates to general linear circuit, more particularly, the present invention relates to a kind of CMOS amplifying circuit, it has the ability of filling with electric current and driving capacitive load that strengthens.
Background technology
Figure 1A and 1B are the output-stage circuit schematic diagrams of the operational amplifier that obtains according to conventional art.Input signal is loaded into the base stage of two NPN transistor Q1 and Q2, and their collector electrode is connected to positive voltage (V+), and emitter is connected to the input of an operational amplifier 10 (as shown in Figure 1A).The output of amplifier 10 is connected to a MOS and fills with the grid of current transistor M7, and transistor M7 and transistor Q2 are connected between positive voltage (V+) and negative voltage (V-), and this is identical with common amplifying stage output circuit.With reference to Figure 1B, differential amplifier 10 comprises two CMOS transistors pair, and they are p channel transistor M3 and M4, n channel transistor M5 and M6.The emitter of transistor Q1 is connected to the grid of transistor M3, and the emitter of transistor Q2 is connected to the grid of transistor M4.A fixing current source I1 is connected between transistor Q1 and V-, fills with simultaneously current transistor M7 and is connected between transistor Q2 and V-.
This circuit has low output impedance and provides High Output Current for load.Yet the major defect of this circuit is: when driving when electric current is filled with in capacitive load and enhancing and can produce too much phase shift simultaneously.This has brought a potential stability problem and has made amplifier produce vibration.More particularly, when output-stage circuit during from the load Absorption Current, a voltage difference delta V
ba=V
b-V
aSet up between node a and node b, and make the enough height of voltage of node c make the output current of transistor M7 reduce.In order to improve the voltage of node c, the voltage of node a need to be little more a lot of than the voltage of node b.Because the base stage of transistor Q1 and Q2 links together, Δ V
baMake the base-emitter bias voltage V of transistor Q2
BELess than transistor Q1.Along with transistor Q1 produces constant electric current I 1, transistor Q2 bias voltage V
BEReduce cause Q2 to produce electric current little when normal.Because the mutual conductance of MOS transistor is usually very low, Δ V
baFor filling with electric current, medium output can become very large, to such an extent as to the electric current that transistor Q2 produces is extremely low, and has aggravated the phase shift of signal, while especially driving a capacitive load.
Summary of the invention
The purpose of this invention is to provide a kind of amplifier output circuit, it can strengthen fills with electric current and capacitance drive capability.
Characteristics of the present invention are bias voltage V that circuit increase filling electric current makes transistor Q2
BEBe maintained.
The invention provides a kind of cmos amplifier of filling with electric current and driving capacitive load that strengthens, the collector electrode of first and second bipolar transistors is connected to first voltage, and their base stage is connected to receive input signal; A differential amplifier circuit has first and second inputs, an output; The emitter of above-mentioned first bipolar transistor is connected to an input of differential amplifier circuit, second bipolar transistor emitter be connected to another input; First MOS transistor has source electrode, grid and drain electrode, and wherein drain electrode is connected to the emitter of above-mentioned second bipolar transistor, and source electrode is connected to second voltage, and grid is connected to the output of above-mentioned differential amplifier; First fixing current source is connected between the emitter and second voltage of above-mentioned first bipolar transistor; Second MOS transistor has source electrode, grid and drain electrode, wherein drain electrode is connected to the emitter of above-mentioned first bipolar transistor, source electrode is connected to second voltage, thereby second MOS transistor is in parallel with above-mentioned first fixing current source, the grid of second MOS transistor is connected to the output of above-mentioned differential amplifier, the base-emitter voltage of above-mentioned first bipolar transistor is along with the increase by first MOS transistor electric current increases, due to the filling electric current of an increase, above-mentioned second bipolar transistor V
BEReduce offset.
The invention provides a kind of cmos amplifier of filling with electric current and driving capacitive load that strengthens, can connect a resistance between the emitter of above-mentioned first bipolar transistor and second MOS transistor.
The invention provides a kind of cmos amplifier of filling with electric current and driving capacitive load that strengthens, can be connected a resistance between the node of the emitter of above-mentioned second bipolar transistor and the drain electrode of first MOS transistor formation and circuit output end; The collector electrode of the 3rd bipolar transistor is connected to above-mentioned first voltage, emitter is connected to first input of above-mentioned differential amplifier, thereby the 3rd bipolar transistor is in parallel with above-mentioned first bipolar transistor, and the base stage of the 3rd bipolar transistor is connected to the output of circuit.
The invention provides a kind of cmos amplifier of filling with electric current and driving capacitive load that strengthens, above-mentioned differential amplifier circuit comprises first and second CMOS transistors pair.
According to following more detailed description also by reference to the accompanying drawings, the present invention and purpose thereof and characteristics will embody more significantly.
Technical solution of the present invention
The invention provides a kind of cmos amplifier of filling with electric current and driving capacitive load that strengthens, wherein first bipolar transistor is connected to the output stage of amplifier, and circuit is by the base-emitter voltage V of this bipolar transistor of compensation
BEStability with the boster output stage.Second bipolar transistor and first bipolar transistor drive a differential amplifier together, and the output of this differential amplifier is being controlled the electricity of a MOS transistor that is connected to amplifier output and led.Another MOS transistor is connected with second bipolar transistor, and its grid is connected to the output of differential amplifier, and the filling electric current of an increase causes by the electric current of second bipolar transistor and its V
BEIncrease, thereby cause first bipolar transistor V
BEIncrease.
Documents, patent of invention: output driver circuit, application number: 200810188417.X
Description of drawings
Figure 1A and 1B are a kind of circuit theory diagrams of the amplifier output stage that obtains according to conventional art.
Fig. 2 is a kind of circuit theory diagrams of the amplifier output stage that obtains according to the present invention.
Fig. 3 is a kind of circuit theory diagrams of making the amplifier output stage that further modification obtains according to the present invention and on Fig. 2.
Fig. 4 is the another kind of circuit theory diagrams of making the amplifier output stage that further modification obtains according to the present invention and on Fig. 2.
Embodiment
Fig. 2 is a kind of circuit theory diagrams of the operational amplifier output stage that obtains according to the present invention.Wherein, a n channel MOS transistor M8 is in parallel with current source I1, and the channel dimensions of transistor M8 (W/L) is much smaller than transistor M7 usually.The grid of transistor M7 and M8 is connected to node c.
Along with transistor M7 produces higher electric current, the voltage of node c rises and transistor M8 produces higher electric current, because transistor M7 and M8 have identical gate-to-source bias voltage V
GSSo the electric current that transistor M8 produces is directly proportional to transistor M7.The increase of transistor M8 electric current directly makes the electric current by transistor Q1 be increased, and along with the increase of electric current, transistor Q1 has higher V
BEBias voltage.The voltage difference of node a and b (Δ V
ba) caused the bias voltage V of transistor Q2
BEReduce, and transistor Q1 bias voltage V
BEIncrease will compensate it.Therefore, relatively constant by the electric current maintenance of transistor Q2, prevent that simultaneously transistor is driven to cut-off state.In this mode, the phase shift that output-stage circuit is introduced is very little, and low output impedance and outstanding output driving force are provided, even in the situation that Absorption Current increase.
Fig. 3 is a kind of circuit theory diagrams of making the amplifier output stage that further modification obtains on Fig. 2, and wherein resistance R 1 is connected in series between transistor Q1 and node a.The effect of resistance R 1 is to increase the effective V of transistor Q2 when electric current increases
BETransistor Q2, M3, M4, M5, M6 and M7 form a feedback loop.Stable in order to keep loop, preferably keep loop bandwidth very sensitive for the mode of operation of circuit.The mutual conductance of transistor M7 is along with the increase of the filling electric current that passes through increases.Therefore, if keep a constant loop gain and constant loop bandwidth, the mutual conductance of transistor Q2 must be corresponding to the increase of transistor Q2 electric current and is increased.By being the emitter increase resistance R 1 of transistor Q1, the pressure drop at R1 two ends helps to improve the V of transistor Q2
BEBias voltage, thus make the electric current of transistor Q2 be increased to suitable level, to reach relatively constant loop bandwidth.
Fig. 4 is the another kind of circuit theory diagrams of making the amplifier output stage that further modification obtains according to the present invention and on Fig. 2, wherein transistor Q9 and transistor Q1 parallel join.Resistance R 2 is connected between node b and output, and the base voltage of transistor Q9 is connected to output.Resistance R 2 provides two functions.At first, resistance makes output capacitance load and output stage isolation, thereby suppresses the spike of circuit and possible vibration trend.Secondly, transistor Q9 and resistance are filled with electric current for output and are provided with restriction.When output stage under normal operation during from the load current drawn, due to reducing and differential voltage Δ V of output current
ba=V
b-V
a, transistor Q9 is in cut-off state usually, its base-emitter bias voltage V
BE9Comprise the pressure drop of resistance R 2.Because need to having very powerful driving force and its voltage, output stage fluctuates with respect to negative supply, voltage difference delta V
baIncrease and the more electric current of transistor M7 generation, thus the pressure drop at increase resistance R 2 two ends.Voltage difference delta V
baCan be allowed to increase with the pressure drop at resistance R 2 two ends, until the summation of these two voltages reaches transistorized V
BEValue, because the electric current by transistor Q9 equals the electric current that electric current I 1 adds transistor M8 (sub-fraction of the electric current by transistor M7).At this moment, the filling electric current by resistance R 2 reaches maximum and output current can reduce.The reducing of this electric current prevented circuit because output node and positive voltage short circuit and damaged.
The output-stage circuit of the operational amplifier that obtains according to the present invention has improved the performance when filling with the electric current increase and driving capacitive load.This circuit has adopted MOS transistor and the substrate npn bipolar transistor of standard.Although the present invention embodies by concrete example, above-mentioned example just should not limit the present invention for the present invention is described.Should be pointed out that as long as no breaking away from essence of the present invention and meeting definition in claim, make suitable modification and still belong to category of the present invention on above-mentioned example.
Claims (4)
1. one kind strengthens the cmos amplifier of filling with electric current and driving capacitive load, and it is characterized in that: the collector electrode of first and second bipolar transistors is connected to first voltage, and their base stage is connected to receive input signal;
A differential amplifier circuit has first and second inputs, an output;
The emitter of above-mentioned first bipolar transistor is connected to an input of differential amplifier circuit, second bipolar transistor emitter be connected to another input;
First MOS transistor has source electrode, grid and drain electrode, and wherein drain electrode is connected to the emitter of above-mentioned second bipolar transistor, and source electrode is connected to second voltage, and grid is connected to the output of above-mentioned differential amplifier;
First fixing current source is connected between the emitter and second voltage of above-mentioned first bipolar transistor;
Second MOS transistor has source electrode, grid and drain electrode, wherein drain electrode is connected to the emitter of above-mentioned first bipolar transistor, source electrode is connected to second voltage, thereby second MOS transistor is in parallel with above-mentioned first fixing current source, the grid of second MOS transistor is connected to the output of above-mentioned differential amplifier, the base-emitter voltage of above-mentioned first bipolar transistor is along with the increase by first MOS transistor electric current increases, due to the filling electric current of an increase, above-mentioned second bipolar transistor V
BEReduce offset.
2. a kind of cmos amplifier of filling with electric current and driving capacitive load that strengthens according to claim 1, is characterized in that: can connect a resistance between the emitter of above-mentioned first bipolar transistor and second MOS transistor.
3. a kind of cmos amplifier of filling with electric current and driving capacitive load that strengthens according to claim 1 is characterized in that: can be connected a resistance between the node of the emitter of above-mentioned second bipolar transistor and the drain electrode of first MOS transistor formation and circuit output end;
The collector electrode of the 3rd bipolar transistor is connected to above-mentioned first voltage, emitter is connected to first input of above-mentioned differential amplifier, thereby the 3rd bipolar transistor is in parallel with above-mentioned first bipolar transistor, and the base stage of the 3rd bipolar transistor is connected to the output of circuit.
4. a kind of cmos amplifier of filling with electric current and driving capacitive load that strengthens according to claim 1, it is characterized in that: above-mentioned differential amplifier circuit comprises first and second CMOS transistors pair.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013200668625U CN203301430U (en) | 2013-02-06 | 2013-02-06 | CMOS amplifier capable of reinforcing sink current and driving capacitive load |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013200668625U CN203301430U (en) | 2013-02-06 | 2013-02-06 | CMOS amplifier capable of reinforcing sink current and driving capacitive load |
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| CN203301430U true CN203301430U (en) | 2013-11-20 |
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| CN2013200668625U Expired - Fee Related CN203301430U (en) | 2013-02-06 | 2013-02-06 | CMOS amplifier capable of reinforcing sink current and driving capacitive load |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103166584A (en) * | 2013-02-06 | 2013-06-19 | 苏州硅智源微电子有限公司 | Complementary metal-oxide-semiconductor transistor (CMOS) amplifier strengthening sinking current and driving capacitive load |
| CN104780670A (en) * | 2015-03-30 | 2015-07-15 | 成都颉隆科技有限公司 | Variable-frequency and energy-saving control system for smart power grid |
| CN104797041A (en) * | 2015-03-30 | 2015-07-22 | 成都颉隆科技有限公司 | Bootstrap trigger type smart grid frequency conversion energy-saving control system |
-
2013
- 2013-02-06 CN CN2013200668625U patent/CN203301430U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103166584A (en) * | 2013-02-06 | 2013-06-19 | 苏州硅智源微电子有限公司 | Complementary metal-oxide-semiconductor transistor (CMOS) amplifier strengthening sinking current and driving capacitive load |
| CN104780670A (en) * | 2015-03-30 | 2015-07-15 | 成都颉隆科技有限公司 | Variable-frequency and energy-saving control system for smart power grid |
| CN104797041A (en) * | 2015-03-30 | 2015-07-22 | 成都颉隆科技有限公司 | Bootstrap trigger type smart grid frequency conversion energy-saving control system |
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| GR01 | Patent grant | ||
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131120 Termination date: 20140206 |