CN203133823U - Embedded type online simulation device - Google Patents
Embedded type online simulation device Download PDFInfo
- Publication number
- CN203133823U CN203133823U CN 201220580256 CN201220580256U CN203133823U CN 203133823 U CN203133823 U CN 203133823U CN 201220580256 CN201220580256 CN 201220580256 CN 201220580256 U CN201220580256 U CN 201220580256U CN 203133823 U CN203133823 U CN 203133823U
- Authority
- CN
- China
- Prior art keywords
- logic unit
- logical unit
- simulation device
- data
- goal systems
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The utility model relates to an embedded type online simulation device which comprises a protocol interface. The protocol interface is connected with a computer USB interface through a data line, a system state read-out logical unit and a series and parallel mechanism are connected on the protocol interface, a data verification unit and a register block are connected on the series and parallel mechanism, and a breaking point control logical unit, an address producing and control logical unit, a DMA control logical unit and a data distribution and state control logical unit are connected on the register block. The system state read-out logical unit is connected with the data verification unit and the breaking point control logical unit, and the system state read-out logical unit, the breaking point control logical unit, the address producing and control logical unit and the data distribution and state control logical unit are connected with a target system. The embedded type online simulation device has the advantages that the purpose that a designer can simulate and debug the target system online and in real time through a computer is achieved, and the function development and simulation debugging process on target system software and hardware are improved.
Description
Technical field
The utility model relates to a kind of built-in type on-line simulation device.
Background technology
IC design enterprise is when the design embedded chip, all wish early stage the chip to actual design as much as possible the software and hardware function and performance is assessed and anticipation, accomplish rational software and hardware planning, reach best function and performance combination, shorten the construction cycle as much as possible.And the chip after the processing need use special-purpose chip testing machine to test usually, because present domestic chip production producer power of test deficiency, professional test producer is rare, makes chip testing become the bottleneck that product is in time put on market.At present, embedded chip of a great variety has different software functions and external unit of numerous names, and the software and hardware function that how to realize embedded system effectively is the main target that the designer considers always.But common chip design and means of testing are difficult to satisfy the design needs of dissimilar embedded chips.Especially be difficult to save time in the construction cycle, a kind of like this idea that can realize that the designer carries out hardware and software debugging by computer real-time to goal systems more and more is much accounted of and becomes a kind of pressing for.
The utility model content
The purpose of this utility model provides a kind of built-in type on-line simulation device, realize that the designer finishes the planning of designing and developing of goal systems by computing machine, at goal systems design phase real-time online debug system software and hardware, to the software and hardware function of the chip of actual design with performance is assessed and anticipation, can accurately judge the working condition of goal systems, satisfy the needs that embedded chip designs in earlier stage, overcome the deficiency of existing chip design aspect.
The purpose of this utility model is to be achieved through the following technical solutions:
A kind of built-in type on-line simulation device, comprise protocol interface, described protocol interface is connected with the computing machine USB interface by data line, be connected with system state on the protocol interface and read logical block and string and mechanism, be connected with inspection unit, data school and register group in string and the mechanism, be connected with breakpoint steering logic unit, address generation and steering logic unit, dma control logic unit and data allocations and state control logic unit on the register group; Described system state is read logical block and data school inspection unit, breakpoint steering logic unit is connected, and system state is read logical block, breakpoint steering logic unit, address generation and all is connected with goal systems with the state control logic unit with steering logic unit, data allocations; Interconnect between the generation of described address and steering logic unit, dma control logic unit and data allocations and the state control logic unit.
The beneficial effects of the utility model are: realized that the designer carries out real-time online emulation and debugging by computing machine to goal systems, the utility model flexible Application measuring technology, working condition that can the accurate response goal systems, the perfect functional development of goal systems software and hardware and artificial debugging flow process; The utlity model has reasonable in design, stable performance simultaneously, control is convenient, debugging speed is fast, efficient is high, characteristics such as flexible and convenient to use.
Description of drawings
With reference to the accompanying drawings the utility model is described in further detail below.
Fig. 1 is the structured flowchart of the described a kind of built-in type on-line simulation device of the utility model embodiment;
Fig. 2 is the online synoptic diagram of the described a kind of built-in type on-line simulation device of the utility model embodiment;
Fig. 3 is the in-circuit emulation and debugging process flow diagram of the described a kind of built-in type on-line simulation device of the utility model embodiment.
Among the figure:
1, protocol interface; 2, string and mechanism; 3, data school inspection unit; 4, system state is read logical block; 5, register group; 6, breakpoint steering logic unit; 7, the address produces and the steering logic unit; 8, dma control logic unit; 9, data allocations and state control logic unit; 10, goal systems.
Embodiment
As shown in Figure 1, the described a kind of built-in type on-line simulation device of the utility model embodiment, comprise protocol interface 1, described protocol interface 1 is connected with the computing machine USB interface by data line, be connected with system state on the protocol interface 1 and read logical block 4 and string and mechanism 2, be connected with inspection unit 3, data school and register group 5 in string and the mechanism 2, be connected with breakpoint steering logic unit 6, address generation and steering logic unit 7, dma control logic unit 8 and data allocations and state control logic unit 9 on the register group 5; Described system state is read logical block 4 and data school inspection unit 3, breakpoint steering logic unit 6 is connected, and system state is read logical block 4, breakpoint steering logic unit 6, address generation and all is connected with goal systems 10 with state control logic unit 9 with steering logic unit 7, data allocations; Interconnect between the generation of described address and steering logic unit 7, dma control logic unit 8 and data allocations and the state control logic unit 9.
During concrete the use, as shown in Figure 2, the utility model is under emulation and debugging mode, and computing machine sends debug command, through the certain protocol conversion, sends to the built-in type on-line simulation device; The built-in type on-line simulation device receives and handles the debug command from computing machine, operation by the control goal systems realizes goal systems software and hardware function is carried out artificial debugging, comprises and have more than being limited to: hardware loading, software loading, stop or recovering execution user program, read/write register/storer, single step tracking and breakpoint arranging etc.Simultaneously, the state of realizing the read-write goal systems by the built-in type on-line simulation device is to computing machine, and the designer is by real-time online emulation and the debugging of computing machine to embedded system in realization.
Adopt the method by three big buses (data bus, address bus, control bus) of the control of built-in type on-line simulation device and monitoring objective system, realized the perfect adaptation of built-in type on-line simulation device and goal systems, and on using, can realize separately finishing goal systems being carried out hardware and software feature exploitation and artificial debugging with the goal systems of target processor core and external unit and interface structure.
The utility model can be realized following function: 1, by the direct communication of USB interface realization with computing machine; 2, function realizes separately, does not take any resource of goal systems; 3, the expanding of resource (data 8 and 16 controls, address from 16 until 22 controls); 4, can place the backstage to make goal systems independent operating or off-line operation; 5, DMA(Direct Memory Access, direct memory access) mode is directly finished the flash memory to FLASH ROM() read and write; 6, dma mode is directly finished writing and reading of storer to the space, full address, peripheral hardware address/data register, port address/data register etc.; 7, follow the trail of by computer realization instruction stream and data stream; 8,3 (63 kinds of modes) Hardware Breakpoints can be set; 9, provide 2 software breakpoints; 10, the reading of goal systems state, change and write-back; Refreshing in real time 11, storer (mainly referring to RAM(random access memory, random access memory)); 12, the single step run of goal systems programmed instruction; 13, the directly instruction of operational objective processor; 14, realization is to configuration and the flexible Application of various external units and interface.
As shown in Figure 3, in-circuit emulation of the present utility model is as follows with the debugging workflow:
1, beginning (Start), system is online and power on, and begins to carry out artificial debugging work;
2, system initialization (System initial), the hardware resource that needs is disposed in the work of built-in type on-line simulation device for goal systems;
3, download and install (Download ﹠amp; Reset), computing machine sends instructions and the software program on the computing machine is downloaded in the flash storer of goal systems with dma mode by the built-in type on-line simulation device.Simultaneously, goal systems is carried out the software reset and is made software program be parked in main label place;
4, goal systems state read/write (Status read ﹠amp; Write), the goal systems operation suspension, computing machine sends instruction and begins to read the goal systems state by the built-in type on-line simulation device, comprise general-purpose register, programmable counter, status register, stack pointer etc., write-back system state immediately after running through, and read content among ROM, the RAM with dma mode according to demand;
5, debugging breakpoints and setting (Debug ﹠amp; Set breakpoint), the designer can come hardware state and the running software situation of tracking target system by computing machine various types of software and hardware breakpoints of setting program operation as required, and the software and hardware of goal systems is carried out artificial debugging;
6, goal systems is moved and is stopped (Run ﹠amp; Interrupt), the software and hardware of goal systems carries out simulation run, and the built-in type on-line simulation device makes the goal systems operation suspension after detecting the system state of designer's setting;
7, state debugging and renewal (Debug status ﹠amp; Updata), the designer can revise the buffer status value by computing machine, revise content among ROM, the RAM etc., carries out in-circuit emulation and debugging and passes through the built-in type on-line simulation device with the various states of Update mode write-back goal systems; And according to demand with the content among dma mode modification ROM, the RAM;
8, tracing step (Step trace), computing machine sends instruction to carry out single step by the built-in type on-line simulation device to the software program of goal systems and carries out and follow the tracks of (after tracing step finishes, the designer as required can be by computer installation goal systems debug of hardware and software flow process, carry out debugging and the emulation of the operation of single step execution and breakpoint, repeat corresponding debud mode and flow process, if goal systems is absorbed in endless loop or program is made mistakes, the designer can send ICE software interrupt instruction by computer control built-in type on-line simulation device, make the goal systems operation suspension, also can carry out hardware reset, operations such as software reset and system's power-off reset);
9, end (end), the designer reaches the design effect of expection through after in-circuit emulation and the debugging exploitation of goal systems hardware and software feature and artificial debugging being finished repeatedly.
Novelly be not limited to above-mentioned preferred forms; anyone can draw other various forms of products under enlightenment of the present utility model; no matter but do any variation in its shape or structure; every have identical with a application or akin technical scheme, all drops within the protection domain of the present utility model.
Claims (1)
1. built-in type on-line simulation device, comprise protocol interface (1), described protocol interface (1) is connected with the computing machine USB interface by data line, it is characterized in that: be connected with system state on the protocol interface (1) and read logical block (4) and string and mechanism (2), be connected with inspection unit (3), data school and register group (5) in string and the mechanism (2), be connected with breakpoint steering logic unit (6), address generation and steering logic unit (7), dma control logic unit (8) and data allocations and state control logic unit (9) on the register group (5); Described system state is read logical block (4) and data school inspection unit (3), breakpoint steering logic unit (6) is connected, and system state is read logical block (4), breakpoint steering logic unit (6), address generation and all is connected with goal systems (10) with state control logic unit (9) with steering logic unit (7), data allocations; Interconnect between the generation of described address and steering logic unit (7), dma control logic unit (8) and data allocations and state control logic unit (9).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220580256 CN203133823U (en) | 2012-11-06 | 2012-11-06 | Embedded type online simulation device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220580256 CN203133823U (en) | 2012-11-06 | 2012-11-06 | Embedded type online simulation device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203133823U true CN203133823U (en) | 2013-08-14 |
Family
ID=48941781
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220580256 Expired - Fee Related CN203133823U (en) | 2012-11-06 | 2012-11-06 | Embedded type online simulation device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203133823U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106874796A (en) * | 2017-02-16 | 2017-06-20 | 深圳前海生生科技有限公司 | The safety detection and fault-tolerance approach of instruction stream in system operation |
-
2012
- 2012-11-06 CN CN 201220580256 patent/CN203133823U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106874796A (en) * | 2017-02-16 | 2017-06-20 | 深圳前海生生科技有限公司 | The safety detection and fault-tolerance approach of instruction stream in system operation |
| CN106874796B (en) * | 2017-02-16 | 2021-03-30 | 中云信安（深圳）科技有限公司 | Safety detection and fault-tolerant method for instruction stream in system operation |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101154183B (en) | Microcontroller built-in type on-line simulation debugging system | |
| CN102360329B (en) | Bus monitoring and debugging control device and methods for monitoring and debugging bus | |
| CA2695564C (en) | Modular re-configurable profiling core for multiprocessor systems-on-chip | |
| CN103136028A (en) | FLASH memorizer long-distance on-line upgrade method based on field programmable gate array (FPGA) | |
| CN101154184A (en) | JTAG debugging method for microcontroller | |
| CN101458652B (en) | Embedded on-line emulation debugging system for microcontroller | |
| CN105930186B (en) | The method for loading software of multi -CPU and software loading apparatus based on multi -CPU | |
| CN102929686A (en) | Functional verification method of on-chip multi-core processor | |
| CN101894591B (en) | Linear feedback shift register (LFSR)-based random test device for external storage interface | |
| WO2018018978A1 (en) | Universal serial bus controller verification method, system and device | |
| CN102623069B (en) | Random excitation flash model verification method | |
| CN205067685U (en) | Verification device of chip | |
| CN105512088A (en) | Processor architecture capable of being reconstructed and reconstruction method thereof | |
| CN100487668C (en) | Regulating technology of built-in processor | |
| Zhou et al. | A new architecture of open CNC system based on compiling mode | |
| CN103714190B (en) | Simple efficient on-line simulation method and simple efficient on-line simulation interface circuit | |
| CN105446859B (en) | The software condition monitoring of power consumption analysis and wave file automatic generation method | |
| CN202351406U (en) | Novel power cell detection control system | |
| CN202267954U (en) | Bus monitoring and debugging control device | |
| CN102073480A (en) | Method for simulating cores of multi-core processor by adopting time division multiplex | |
| CN203133823U (en) | Embedded type online simulation device | |
| CN100492315C (en) | Embedded signal processor simulator | |
| CN106610873B (en) | Method for predicting energy consumption of application program on Android device | |
| CN102193860A (en) | Microcontroller online debugging circuit and method as well as microcontroller | |
| CN101329650A (en) | Smart card emulator |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130814 Termination date: 20141106 |
|
| EXPY | Termination of patent right or utility model |