CN203025599U - Band-gap reference circuit with power supply ripple rejection under low voltage - Google Patents

Band-gap reference circuit with power supply ripple rejection under low voltage Download PDF

Info

Publication number
CN203025599U
CN203025599U CN 201220661777 CN201220661777U CN203025599U CN 203025599 U CN203025599 U CN 203025599U CN 201220661777 CN201220661777 CN 201220661777 CN 201220661777 U CN201220661777 U CN 201220661777U CN 203025599 U CN203025599 U CN 203025599U
Authority
CN
China
Prior art keywords
pipe
npn
type
transistor
pmos pipe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN 201220661777
Other languages
Chinese (zh)
Inventor
耿靖斌
孔阳阳
董晓敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Datang Microelectronics Technology Co Ltd
Original Assignee
Datang Microelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Datang Microelectronics Technology Co Ltd filed Critical Datang Microelectronics Technology Co Ltd
Priority to CN 201220661777 priority Critical patent/CN203025599U/en
Application granted granted Critical
Publication of CN203025599U publication Critical patent/CN203025599U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Landscapes

  • Amplifiers (AREA)

Abstract

The utility model provides a band-gap reference circuit with power supply ripple rejection under low voltage. The band-gap reference circuit with power supply ripple rejection under low voltage comprises a grid electrode of a first p-channel metal oxide semiconductor (PMOS) pipe and a grid electrode of a second PMOS pipe, wherein the grid electrode of the first PMOS pipe and the grid electrode of the second PMOS pipe are connected and respectively connected with an output end of an amplifier and a grid electrode of a third PMOS pipe. A drain electrode of the first PMOS pipe is connected with a negative input end of the amplifier. A drain electrode of the second PMOS pipe is connected with a positive input end of the amplifier. Source electrodes of the first PMOS pipe and the second PMOS pipe respectively act as an input end of reference current. A source electrode of the third PMOS pipe acts as a power supply input end of reference voltage. A drain electrode of the third PMOS pipe acts as an output end of the reference voltage. Very strong injection ability to large power supply ripples under low voltage can be improved in the premises that power supply voltage is not improved, sizes of chips are not increased, and stability is not influenced.

Description

The band-gap reference circuit that under a kind of low-voltage, the tool power supply ripple suppresses
Technical field
The utility model relates to the direct supply technology, relates in particular to the band-gap reference circuit device that under low-voltage, the tool power supply ripple suppresses.
Background technology
The inhibition ability that improves power supply ripple under low-voltage is an insoluble problem of direct supply always.Generally to realize by the isolation that increases between reference circuit and power supply to the inhibition of power supply ripple, mainly comprise and strengthen the metal-oxide-semiconductor length L, increase the number of plies of PMOS, or first realize built-in negative feedback closed loop environment, a relatively quietly power environment is provided, then reference circuit is placed wherein.Have in addition the ripple disturbance that utilizes certain means (as utilizing the circuit modules such as feedforward transconductance, driving buffer stage) to reproduce power supply in linear voltage-stabilizing circuit (LDO, Linear Drop Out) design, offset the fluctuation of power supply to the impact of output with this.
Usually, the number of plies that strengthens metal-oxide-semiconductor length L or increase PMOS inevitably can increase chip area, or reduces power supply nargin and improve supply voltage; Can affect to a certain extent Systems balanth and introduce feedback loop; Have again, the circuit modules such as the feedforward transconductance that linear voltage-stabilizing circuit adopts, driving buffer stage are realized the technology that ripple offsets, increased the complicacy of circuit structure, and circuit power consumption is also larger, and it is comparatively suitable in the linear stabilized power supply design, if but it is designed in reference source circuit, because this generic module can be worked always, and in order to realize Low Drift Temperature, can use resistance in a large number, so power consumption area large must can not be ignored all often.
Therefore, need the band-gap reference circuit that under a kind of low-voltage of design, the tool power supply ripple suppresses, can not improve supply voltage, not increase chip size and not affect the inhibition ability that promotes under the prerequisite of stability under low-voltage the large power supply ripple.
Summary of the invention
Technical problem to be solved in the utility model is to provide the band-gap reference circuit that tool power supply ripple under a kind of low-voltage suppresses, and can not increase chip size and not affect the inhibition ability that promotes under the prerequisite of stability under low-voltage the large power supply ripple.
In order to solve the problems of the technologies described above, the utility model provides the band-gap reference circuit that under a kind of low-voltage, the tool power supply ripple suppresses, comprise: produce a PMOS pipe and the 2nd PMOS pipe, the 3rd PMOS pipe that produces reference voltage and the amplifier that contains mirror image branch of reference current, wherein:
A PMOS pipe that links together and the grid of the 2nd PMOS pipe, be connected with the output terminal of this amplifier and the grid of the 3rd PMOS pipe respectively, the drain electrode of the one PMOS pipe is connected with the negative input end of this amplifier, the drain electrode of the 2nd PMOS pipe is connected with the positive input terminal of this amplifier, the one PMOS pipe and the 2nd PMOS manage separately source electrode respectively as the input end of reference current, the source electrode of the 3rd PMOS pipe is as the power input of reference voltage, and the drain electrode of the 3rd PMOS pipe is as the output terminal of reference voltage.
Further, amplifier comprise the first branch road that the 4th P type pipe and the first N-type pipe form, with the 5th P type pipe of the 4th P type pipe mirror image and the second branch road of forming with the second N-type pipe pipe of the first N-type pipe mirror image, wherein:
The 4th PMOS pipe that links together and the grid of a NMOS pipe, interconnect with the 4th PMOS pipe that links together and the drain electrode of a NMOS pipe, and interconnect with the grid of the 5th PMOS pipe that links together with a NMOS pipe, the 4th PMOS manages the input end that connects respectively power supply with the 5th PMOS pipe source electrode separately, the one NMOS pipe manages with the 2nd NMOS the input end that source electrode connects respectively bias current sources, the 5th PMOS pipe that links together and the output terminal of the drain electrode of the 2nd NMOS pipe as this amplifier.
Further, each effective two PMOS pipe series connection of the 4th PMOS pipe and the 5th PMOS pipe forms; Perhaps, each effective two NMOS pipe series connection of a NMOS pipe and the 2nd NMOS pipe forms; Perhaps, the in parallel formation of each effective two PMOS pipe of the 4th PMOS pipe and the 5th PMOS pipe; Perhaps, the in parallel formation of each effective two NMOS pipe of a NMOS pipe and the 2nd NMOS pipe.
In order to solve the problems of the technologies described above, the utility model provides the band-gap reference circuit that under a kind of low-voltage, the tool power supply ripple suppresses, comprise: produce a P transistor npn npn and the 2nd P transistor npn npn, the 3rd P transistor npn npn that produces reference voltage and the amplifier that contains mirror image branch of reference current, wherein:
A P transistor npn npn that links together and the base stage of the 2nd P transistor npn npn, be connected with the output terminal of this amplifier and the base stage of the 3rd P transistor npn npn respectively, the collector of the one P transistor npn npn is connected with the negative input end of this amplifier, the collector of the 2nd P transistor npn npn is connected with the positive input terminal of this amplifier, the one P transistor npn npn and the 2nd P transistor npn npn emitter-base bandgap grading separately are respectively as the input end of reference current, the emitter-base bandgap grading of the 3rd P transistor npn npn is as the power input of reference voltage, and the collector of the 3rd P transistor npn npn is as the output terminal of reference voltage.
Further, amplifier comprise the first branch road that the 4th P type pipe and the first N-type pipe form, with the 5th P type pipe of the 4th P type pipe mirror image and the second branch road of forming with the second N-type pipe pipe of the first N-type pipe mirror image, wherein:
the 4th P transistor npn npn that links together and the transistorized base stage of the first N-type, interconnect with the 4th P transistor npn npn that links together and the transistorized collector of the first N-type, and interconnect with the 5th P transistor npn npn that links together and the transistorized base stage of the first N-type, the 4th P transistor npn npn and the 5th P transistor npn npn emitter-base bandgap grading separately connect respectively the input end of power supply, the first N-type transistor be connected N-type transistor emitter-base bandgap grading and connect respectively the input end of bias current sources, the 5th P transistor npn npn that links together and the transistorized collector of the second N-type are as the output terminal of this amplifier.
Further, each effective two P transistor npn npns series connection of the 4th P transistor npn npn and the 5th P transistor npn npn forms; Perhaps, transistorized each effective two the N-type transistor series of the first N-type transistor and the second N-type form; Perhaps each effective two P transistor npn npn formation in parallel of the 4th P transistor npn npn and the 5th P transistor npn npn; Perhaps, transistorized each effective two the N-type transistor of the first N-type transistor and the second N-type formation in parallel.
The utility model is by introducing the power supply ripple of mirror image in the amplifier of band-gap reference circuit, and itself and power supply ripple self are being disappeared mutually, thereby can not improve supply voltage, increase chip size and do not affect under the prerequisite of stability and promote the inhibition ability very strong to the large power supply ripple under low-voltage.
Description of drawings
Fig. 1 is the band-gap reference circuit example structure of tool power supply ripple inhibition under low-voltage of the present utility model and the schematic diagram of interior amplifier structure thereof;
Fig. 2 is that the electric source disturbance of the band-gap reference circuit that under low-voltage of the present utility model, the tool power supply ripple suppresses is offset tactful schematic diagram;
Fig. 3 is that the electric source disturbance generation circuit of realizing with the CMOS pipe in circuit embodiments shown in Figure 1 is replaced in the embodiment that realizes with bipolar transistor;
Fig. 4 is the embodiment that in circuit embodiments shown in Figure 1, electric source disturbance produces two kinds of distortion circuit of circuit;
Fig. 5 is the embodiment that in circuit embodiments shown in Figure 1, electric source disturbance produces two kinds of distortion circuit of circuit.
Embodiment
Below in conjunction with accompanying drawing and preferred embodiment, the technical solution of the utility model is at length set forth.Should be appreciated that, the embodiment that below enumerates only is used for description and interpretation the utility model, and does not consist of the restriction to technical solutions of the utility model.
The band-gap reference circuit embodiment that under low-voltage of the present utility model, the tool power supply ripple suppresses, its structure comprises as shown in Fig. 1 (1): PM3 pipe and the amplifier Op of reference voltage managed, produce by the PM1 pipe that produces reference current with PM2, wherein:
The PM1 pipe that links together is connected with the output terminal of amplifier Op and the grid of PM3 pipe respectively with the grid of PM2 pipe, the drain electrode of PM1 pipe is connected with the negative input end of amplifier Op, the drain electrode of PM2 pipe is connected with the positive input terminal of amplifier Op, PM1 pipe and PM2 manage separately source electrode respectively as the input end of reference current, the source electrode of PM3 pipe is as the power input of reference voltage, and the drain electrode of this PM3 pipe is as the output terminal of reference voltage.
Due to certain mechanism (such as: receive, send data, electromagnetic interference (EMI) etc.) cause the power generation disturbance and be reflected on power lead, this disturbance mainly is positioned at the PM1 pipe and PM2 pipe, the PM3 pipe that produces reference voltage and the output terminal (Op-out) of operational amplifier Op that produces reference current at the said reference circuit part, see also shown in Fig. 1 (1).
In foregoing circuit embodiment,
The structure of amplifier Op as shown in Fig. 1 (2), comprise the first branch road that PM4 pipe and NM1 pipe form, with the PM5 pipe of PM4 pipe mirror image and the second branch road of forming with the NM2 pipe of NM1 pipe mirror image, wherein:
The PM4 pipe that links together and the grid of NM1 pipe, interconnect with the PM4 pipe that links together and the drain electrode of NM1 pipe, and interconnect with the grid of the PM5 pipe that links together with the NM1 pipe, PM4 manages the input end that the source electrode of being connected with PM5 separately connects respectively power supply, the NM1 pipe is connected the input end that source electrode connects respectively bias current sources with NM2, the drain electrode of the PM5 that links together pipe and NM2 pipe is as the output terminal of amplifier Op.
The amplifier Op that produces circuit as electric source disturbance in the heavy inferior amplitude of bias of electric current, electric source disturbance is reflected in branch road PM4 manages to equiphase and the drain and gate of NM1 pipe on; Another branch road of this amplifier Op that mirror image PM5 pipe by the PM4 pipe and the mirror image NM2 pipe of NM1 pipe form, the electric source disturbance that reflects in same width, the in phase drain electrode of image copying PM4 pipe and NM1 pipe is as shown in Fig. 1 (2).
The drain electrode of PM5 pipe and NM2 pipe is as the output terminal (Op-out) of amplifier Op, electric source disturbance 1 on the PM3 pipe source electrode of the mirror image disturbance of output and generation reference voltage is with the width homophase, therefore these two kinds of disturbances offset, as shown in Figure 2, make the ability of the anti-electric source disturbance of reference circuit significantly strengthen.
In foregoing circuit embodiment,
PM1 pipe, PM2 pipe, PM3 pipe, PM4 pipe, PM5 pipe are the PMOS pipe, and NM1 pipe and NM2 pipe are the NMOS pipe.
In other circuit embodiments, PM4 pipe, PM5 pipe, NM1 pipe and NM2 pipe also can replace with transistor.As being to produce circuit embodiments with the electric source disturbance that transistor is realized in Fig. 3, wherein correspondingly replace PM4 pipe, PM5 pipe with P transistor npn npn PNP4, PNP5, correspondingly replace NM1 pipe, NM2 pipe with N-type transistor NPN1, NPN2.Similarly, also available transistor replacement of PM1 pipe, PM2 pipe, PM3 pipe.
In the electric source disturbance of foregoing circuit embodiment produces circuit,
The series connection of effective two PMOS pipe of each of PM4 pipe and PM5 pipe forms, as shown in Fig. 4 (A); Perhaps, the series connection of effective two NMOS pipe of each of NM1 pipe and NM2 pipe forms, as shown in Fig. 4 (B); Perhaps, the in parallel formation of effective two PMOS pipe of each of PM4 pipe and PM5 pipe is as shown in Fig. 5 (A); The in parallel formation of effective two NMOS pipe of each of NM1 pipe and NM2 pipe is as shown in Fig. 5 (B).
Certainly, if the electric source disturbance of realizing with transistor as Fig. 3 produces circuit, similarly, effective two the P transistor npn npns series connection of each of PNP4 pipe and PNP5 pipe forms; Perhaps, each effective two N-type transistor series of NPN1 pipe, NPN2 pipe form; Perhaps, each effective two P transistor npn npn formation in parallel of PNP4 pipe and PNP5 pipe; The in parallel formation of effective two the N-type transistors of each of NPN1 pipe, NPN2 pipe.
said reference circuit of the present utility model is circuit topology commonly used in low voltage designs, stability is higher than the reference circuit of other type, in order to improve the ability of anti-electric source disturbance, amplifier and electric source disturbance generation circuit that feedback is used combine, when utilizing amplifier gain to realize feedback, the disturbance of power supply is also waited amplitude, equiphase copying generates, and this is copied disturbance and each branch road of reference current P type metal-oxide-semiconductor or the P type CMOS pipe (PM1 of acquisition, PM2, PM3) source electrode electric source disturbance offsets, to such an extent as to do not have the disturbance on power supply to occur in benchmark output.

Claims (6)

1. the band-gap reference circuit that under a low-voltage, the tool power supply ripple suppresses is characterized in that, comprising: produce a PMOS pipe and the 2nd PMOS pipe, the 3rd PMOS pipe that produces reference voltage and the amplifier that contains mirror image branch of reference current, wherein:
A PMOS pipe that links together and the grid of the 2nd PMOS pipe, be connected with the output terminal of this amplifier and the grid of the 3rd PMOS pipe respectively, the drain electrode of the one PMOS pipe is connected with the negative input end of this amplifier, the drain electrode of the 2nd PMOS pipe is connected with the positive input terminal of this amplifier, the one PMOS pipe and the 2nd PMOS manage separately source electrode respectively as the input end of reference current, the source electrode of the 3rd PMOS pipe is as the power input of reference voltage, and the drain electrode of the 3rd PMOS pipe is as the output terminal of reference voltage.
2. according to circuit claimed in claim 1, it is characterized in that, described amplifier comprise the first branch road that the 4th P type pipe and the first N-type pipe form, with the 5th P type pipe of the 4th P type pipe mirror image and the second branch road of forming with the second N-type pipe pipe of the first N-type pipe mirror image, wherein:
The 4th PMOS pipe that links together and the grid of a NMOS pipe, interconnect with the 4th PMOS pipe that links together and the drain electrode of a NMOS pipe, and interconnect with the grid of the 5th PMOS pipe that links together with a NMOS pipe, the 4th PMOS manages the input end that connects respectively power supply with the 5th PMOS pipe source electrode separately, the one NMOS pipe manages with the 2nd NMOS the input end that source electrode connects respectively bias current sources, the 5th PMOS pipe that links together and the output terminal of the drain electrode of the 2nd NMOS pipe as this amplifier.
3. according to circuit claimed in claim 2, it is characterized in that,
Each effective two PMOS pipe series connection of the 4th PMOS pipe and the 5th PMOS pipe forms; Perhaps, each effective two NMOS pipe series connection of a NMOS pipe and the 2nd NMOS pipe forms; Perhaps, the in parallel formation of each effective two PMOS pipe of the 4th PMOS pipe and the 5th PMOS pipe; Perhaps, the in parallel formation of each effective two NMOS pipe of a NMOS pipe and the 2nd NMOS pipe.
4. the band-gap reference circuit that under a low-voltage, the tool power supply ripple suppresses, it is characterized in that, comprise: produce a P transistor npn npn and the 2nd P transistor npn npn, the 3rd P transistor npn npn that produces reference voltage and the amplifier that contains mirror image branch of reference current, wherein:
A P transistor npn npn that links together and the base stage of the 2nd P transistor npn npn, be connected with the output terminal of this amplifier and the base stage of the 3rd P transistor npn npn respectively, the collector of the one P transistor npn npn is connected with the negative input end of this amplifier, the collector of the 2nd P transistor npn npn is connected with the positive input terminal of this amplifier, the one P transistor npn npn and the 2nd P transistor npn npn emitter-base bandgap grading separately are respectively as the input end of reference current, the emitter-base bandgap grading of the 3rd P transistor npn npn is as the power input of reference voltage, and the collector of the 3rd P transistor npn npn is as the output terminal of reference voltage.
5. according to circuit claimed in claim 4, it is characterized in that, described amplifier comprise the first branch road that the 4th P type pipe and the first N-type pipe form, with the 5th P type pipe of the 4th P type pipe mirror image and the second branch road of forming with the second N-type pipe pipe of the first N-type pipe mirror image, wherein:
the 4th P transistor npn npn that links together and the transistorized base stage of the first N-type, interconnect with the 4th P transistor npn npn that links together and the transistorized collector of the first N-type, and interconnect with the 5th P transistor npn npn that links together and the transistorized base stage of the first N-type, the 4th P transistor npn npn and the 5th P transistor npn npn emitter-base bandgap grading separately connect respectively the input end of power supply, the first N-type transistor be connected N-type transistor emitter-base bandgap grading and connect respectively the input end of bias current sources, the 5th P transistor npn npn that links together and the transistorized collector of the second N-type are as the output terminal of this amplifier.
6. according to circuit claimed in claim 5, it is characterized in that,
Effective two the P transistor npn npns series connection of each of the 4th P transistor npn npn and the 5th P transistor npn npn forms; Perhaps, transistorized each effective two the N-type transistor series of the first N-type transistor and the second N-type form; Perhaps each effective two P transistor npn npn formation in parallel of the 4th P transistor npn npn and the 5th P transistor npn npn; Perhaps, transistorized each effective two the N-type transistor of the first N-type transistor and the second N-type formation in parallel.
CN 201220661777 2012-12-04 2012-12-04 Band-gap reference circuit with power supply ripple rejection under low voltage Expired - Lifetime CN203025599U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201220661777 CN203025599U (en) 2012-12-04 2012-12-04 Band-gap reference circuit with power supply ripple rejection under low voltage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220661777 CN203025599U (en) 2012-12-04 2012-12-04 Band-gap reference circuit with power supply ripple rejection under low voltage

Publications (1)

Publication Number Publication Date
CN203025599U true CN203025599U (en) 2013-06-26

Family

ID=48649569

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201220661777 Expired - Lifetime CN203025599U (en) 2012-12-04 2012-12-04 Band-gap reference circuit with power supply ripple rejection under low voltage

Country Status (1)

Country Link
CN (1) CN203025599U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104317349A (en) * 2014-11-07 2015-01-28 圣邦微电子(北京)股份有限公司 Method and circuit for increasing power supply rejection ratio of low dropout regulator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104317349A (en) * 2014-11-07 2015-01-28 圣邦微电子(北京)股份有限公司 Method and circuit for increasing power supply rejection ratio of low dropout regulator
CN104317349B (en) * 2014-11-07 2016-03-09 圣邦微电子(北京)股份有限公司 A kind of Method and circuits improving low pressure difference linear voltage regulator Power Supply Rejection Ratio

Similar Documents

Publication Publication Date Title
Kim et al. A capacitorless LDO regulator with fast feedback technique and low-quiescent current error amplifier
Lai et al. A fully on-chip area-efficient CMOS low-dropout regulator with fast load regulation
CN106549564B (en) Power amplifying apparatus and method with supply modulation
CN102096436B (en) Low-voltage low-power band gap reference voltage source implemented by MOS device
JP2012003678A (en) Regulator circuit
KR20110109952A (en) Differential amplifying circuit
CN105940609A (en) Buffer circuits and methods
CN105955387A (en) Double-ring protection low drop out (LDO) linear voltage regulator
Hu et al. CMOS high efficiency on-chip power management
CN103944522A (en) Power amplifier
CN104950976A (en) Voltage stabilizing circuit based on slew rate increasing
CN202533828U (en) Linear voltage stabilizer with low voltage difference
CN102594299A (en) Square-wave generator circuit
CN102591393B (en) Low-dropout linear regulator
CN103713679B (en) A kind of LDO circuit based on discrete component
CN102645950B (en) Buffer applied to low-dropout regulator
CN203025599U (en) Band-gap reference circuit with power supply ripple rejection under low voltage
CN110377102A (en) A kind of low-dropout linear voltage-regulating circuit and integrated circuit
CN202533829U (en) Non-capacitance low-voltage-differential linear voltage stabilizing system and bias current adjusting circuit thereof
CN203800890U (en) Power amplifier
CN103729005A (en) Negative voltage regulating circuit
CN103684403A (en) Semiconductor device
CN210005943U (en) reference voltage source with adjustable output voltage
CN107422773A (en) Digital low-dropout regulator
CN103135642A (en) Loop circuit compensating circuit

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20130626

CX01 Expiry of patent term