CN203013702U - Packaging structure - Google Patents
Packaging structure Download PDFInfo
- Publication number
- CN203013702U CN203013702U CN 201220741041 CN201220741041U CN203013702U CN 203013702 U CN203013702 U CN 203013702U CN 201220741041 CN201220741041 CN 201220741041 CN 201220741041 U CN201220741041 U CN 201220741041U CN 203013702 U CN203013702 U CN 203013702U
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- China
- Prior art keywords
- encapsulating structure
- substrate
- metal
- metal column
- packing colloid
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- Expired - Lifetime
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Abstract
A packaging structure comprises a substrate possessing a conducting metal column, an electronic assembly arranged on the substrate and enabling the conducting metal column to be located in the periphery of the electronic assembly, and a metal retaining wall arranged on the substrate and located in the periphery of the conducting metal column. By designing the metal retaining wall, the forming range of a packaging colloid during a subsequent packaging process can be controlled.
Description
Technical field
The utility model relates to a kind of encapsulating structure, espespecially a kind of encapsulating structure with metal retaining wall.
Background technology
Flourish along with portable electronic product in recent years, all kinds of Related products are walked towards high density, high-performance and light, thin, short, little trend gradually, each style encapsulated layer is folded (package on package, PoP) also thereby coordinate and to weed out the old and bring forth the new, to meeting compact and highdensity requirement.
As shown in Figure 1, it is the cross-sectional schematic of existing encapsulation stack apparatus 1.As shown in Figure 1, this encapsulation stack apparatus 1 comprises the two encapsulating structure 1a that are stacked and another encapsulating structure 1b.
Wherein an encapsulating structure 1a comprises and has first and second relative surperficial 11a, the first substrate 11 of 11b, cover brilliant the first electronic building brick 10 in conjunction with this first substrate 11, be located at electric contact mat 111 on this first surface 11a, be formed on this first substrate 11 with the first packing colloid 13 of coating this first electronic building brick 10, be formed at this first packing colloid 13 perforate 130 in electric contact mat 111 on soldering tin material 114 and be located at this second surface 11b upper being used for and plant ball pad 112 in conjunction with soldered ball 14.
Another encapsulating structure 1b comprises second substrate 12, is incorporated into the second electronic building brick 15a on this second substrate 12 in the routing mode, 15b and being formed on this second substrate 12 to coat this second electronic building brick 15a, the second packing colloid 16 of 15b makes this second substrate 12 establish and be electrically connected on the electric contact mat 111 of this first substrate 11 by soldering tin material 114 is folded.
Yet, in existing encapsulation stack apparatus shown in Figure 1, to form the perforate 130 that exposes electric contact mat 111 in this first packing colloid 13 with laser technology, compared to circuit layer reinforced structure (the build-up structure that generally is formed in this first substrate 11, the figure summary) blind hole (via) in dielectric layer, the degree of depth of this perforate 130 is darker, causes Laser Time to increase, thereby raises the cost.
In addition, be subject to the thickness of semiconductor chip (i.e. the first electronic building brick 10), storehouse two encapsulating structure 1a, need keep height between the two during 1b, and the volume-diminished along with this encapsulation stack apparatus 1, the width of described perforate 130 also need dwindle, again because the laser that is projected on this encapsulating structure 1a is generally light beam wide at the top and narrow at the bottom, the high aspect ratio of described perforate 130 (being the degree of depth in hole and the ratio of width) is difficult to control the shape of laser beam, so can cause laser processing to be difficult for and cost increases.
In addition, printing tin material equipment in the past easily produces the space for the pass of this kind high aspect ratio in this perforate 130, and existing lower tin equipment usually once only can tin ball of output, lower tin amount like this is not sufficient to this perforate 130 of filling, and causing forming soldering tin material 114 increased in the time of this perforate 130.
In addition, in existing encapsulation stack apparatus 1, this two encapsulating structure 1a can form gap d between 1b, and make this two encapsulating structure 1a, and 1b has the anxiety that comes off to consider.
Again, the tolerance of the volume because of this soldering tin material 114 after reflow and height is large, not only contact easily produces defective, cause being electrically connected quality bad, and the palisade array (grid array) that is arranged in of this soldering tin material 114 easily to produce coplanarity (coplanarity) bad, cause contact stress (stress) imbalance and easily cause this two encapsulating structure 1a, be between 1b to tilt to connect and put, even produce the problem of contact skew.
Therefore, how to overcome variety of problems of the prior art, become in fact the problem of desiring most ardently at present solution.
The utility model content
In view of the disappearance of above-mentioned prior art, main purpose of the present utility model is to provide a kind of encapsulating structure, can control the shaping scope of the packing colloid of follow-up encapsulation procedure.
Encapsulating structure of the present utility model, it comprises: substrate has a plurality of metal columns that connect on its surface; Electronic building brick, it is located on this substrate surface and is electrically connected this substrate, and makes the described periphery that metal column is positioned at this electronic building brick that connects; And the metal retaining wall, it is located on the edge of this substrate and around the described periphery that connects metal column.
In aforesaid encapsulating structure, the height of this metal retaining wall connects the height of metal column greater than this, and this metal retaining wall ringwise or L shaped.
In aforesaid encapsulating structure, also comprise the assistant metal post of being located on this substrate, its height connects the height of metal column greater than this.Comprise that again being located at this connects soldering tin material on metal column.
In aforesaid encapsulating structure, also comprise another encapsulating structure, it is incorporated into described connecting on metal column, makes this another encapsulating structure be stacked over the top of this substrate and this electronic building brick.This metal retaining wall is against this another encapsulating structure again.Separately comprise packing colloid, it is formed between this another encapsulating structure and this substrate, and bonding this another encapsulating structure of this packing colloid and this substrate, and this packing colloid also coats described metal column and this electronic building brick of connecting.
As from the foregoing, the beneficial effects of the utility model are: in encapsulating structure of the present utility model, design by this metal retaining wall, can control the shaping scope of this packing colloid, and can promote mobility and the filler of this packing colloid, destroy this encapsulating structure to avoid this packing colloid overflow, so the quality of energy improving product.
In addition, connect metal column (non-scolding tin material) storehouse and be electrically connected this encapsulating structure by this, so after carrying out the storehouse processing procedure, be easy to control by this size variation that connects metal column, make it can overcome laser and the processing of lower tin is difficult for, tilt to connect between stack architecture and put and the problem of contact skew.
Again, the present invention is after another encapsulating structure of storehouse, form again packing colloid, make bonding this another encapsulating structure of this packing colloid and this substrate, so can avoid producing the gap between two encapsulating structures of the prior art, thereby can avoid having between encapsulating structure the anxiety that comes off to consider and have a better anti-warpage performance.
Description of drawings
Fig. 1 is the cross-sectional schematic of existing encapsulation stack apparatus;
Fig. 2 A to Fig. 2 E be encapsulating structure of the present utility model the first embodiment method for making and the encapsulation stack apparatus cross-sectional schematic; Wherein, Fig. 2 C ' is not for before Fig. 2 C(arranges this first electronic building brick) schematic top plan view, Fig. 2 E(a) to Fig. 2 E(c) be other execution mode of Fig. 2 C '; And
Fig. 3 A to Fig. 3 B is the cross-sectional schematic of the second embodiment and the encapsulation stack apparatus thereof of encapsulating structure of the present utility model; Wherein, Fig. 3 A ' is not for before Fig. 3 A(arranges this first electronic building brick) schematic top plan view.
The primary clustering symbol description
Embodiment
Below by particular specific embodiment, execution mode of the present utility model is described, those skilled in the art can understand other advantage of the present utility model and effect easily by content disclosed in the present specification.
Notice, the appended graphic structure that illustrates of this specification, ratio, size etc., equal contents in order to coordinate specification to disclose only, understanding and reading for those skilled in the art, be not to limit the enforceable qualifications of the utility model, so technical essential meaning of tool not, the adjustment of the modification of any structure, the change of proportionate relationship or size, do not affecting under the effect that the utility model can produce and the purpose that can reach, all should still drop on the technology contents that the utility model discloses and get in the scope that can contain.Simultaneously, quote in this specification as " on ", D score, " left side ", " right side ", " first ", " second " reach the term of " " etc., also only for ease of understanding of narrating, but not in order to limit the enforceable scope of the utility model, the change of its relativeness or adjustment, under without essence change technology contents, when also being considered as the enforceable category of the utility model.
Fig. 2 A to Fig. 2 E be encapsulating structure 2a of the present utility model the first embodiment method for making and the encapsulation stack apparatus 2 cross-sectional schematic.
As shown in Fig. 2 A, provide one to have relative first surface 21a and the first substrate 21 of second surface 21b, have a plurality of weld pad 211a on the first surface 21a of this first substrate 21 and be positioned at the electric contact mat 211b of described weld pad 211a periphery, and have a plurality of ball pads 212 of planting on the second surface 21b of this first substrate 21.First and second surperficial 21a of this first substrate 21 again; has for example insulating protective layer 213 of welding resisting layer on 21b; and this insulating protective layer 213 is formed with a plurality of perforate 213a that expose described weld pad 211a, electric contact mat 211b and plant ball pad 212; and form on the exposed surface of this electric contact mat 211b as the copper post connect metal column 210, and on the exposed surface of this weld pad 211a formation conductive projection 200a.
In the present embodiment, first form copper bump 200b on the exposed surface of this weld pad 211a, then form solder bump 200c on this copper bump 200b, to consist of this conductive projection 200a.
As shown in Fig. 2 B, form a metal retaining wall 27 on the edge of the first surface 21a of this first substrate 21, make this metal retaining wall 27 around the described periphery that connects metal column 210, as shown in Fig. 2 C '.
In the present embodiment, this metal retaining wall 27 is for copper material and be positioned at the adjacent places, two edges of this first substrate 21 (be the upside shown in Fig. 2 C ' and right side, be " L " font), and the height h of this metal retaining wall 27 connects the height t of metal column 210 higher than this.
As shown in Fig. 2 C, by described conductive projection 200a, at least one the first electronic building brick 20 is set on this weld pad 211a, make the described periphery that metal column 210 is positioned at this first electronic building brick 20 that connects, coat described conductive projection 200a with primer 201 again, namely the electronic pads 200 of this first electronic building brick 20 is electrically connected this first substrate 21 to cover crystal type, and plant on the exposed surface of ball pad 212 in conjunction with soldered ball 24, to consist of the first embodiment of encapsulating structure 2a of the present utility model at this.
In the present embodiment, this first electronic building brick 20 is driving component and/or passive component, this driving component for example: chip, and this passive component is for example: resistance, electric capacity and inductance.
As shown in Fig. 2 D, form soldering tin material 214 on the described exposed surface that connects metal column 210, so that another encapsulating structure of storehouse 2b connects on metal column 210 at this by this soldering tin material 214 of reflow.
In the present embodiment, this another encapsulating structure 2b is provided with the second electronic building brick 25a on a second substrate 22,25b, and this second electronic building brick 25a, 25b with the routing mode connect put and be electrically connected this second substrate 22(also can cover crystal type connect put and be electrically connected this second substrate 22), and coat this second electronic building brick 25a, 25b with packing colloid 26.
In addition, the height h of this metal retaining wall 27 equals this height summation L that connects metal column 210 and soldering tin material 214, makes this metal retaining wall 27 against this another encapsulating structure 2b.
As shown in Fig. 2 E, by for example sealing mould mode (molding), by this two encapsulating structure 2a, the side of 2b forms packing colloid 23 between this another encapsulating structure 2b and this first substrate 21, so that this packing colloid 23 coats described metal column 210 and the soldering tin material 214 of connecting, and bonding this another encapsulating structure 2b of this packing colloid 23 and this first substrate 21 are to consist of an encapsulation stack apparatus 2.
In the present embodiment, this metal retaining wall 27 is used for limiting the shaping scope of this packing colloid 23.Because this metal retaining wall 27 is positioned at place, the adjacent two edges of this first substrate 21, so this packing colloid 23 can be inserted by other side (downside as shown in Fig. 2 C ' and left side) of this first substrate 21, thereby this packing colloid 23 can coat this first electronic building brick 20.
Therefore, as Fig. 2 E(a) to Fig. 2 E(c) as shown in, this metal retaining wall 27a, 27b, if 27c is positioned at this first substrate 21 edges, this metal retaining wall 27a, 27b ringwise, 27c need have at least one breach 270, so that this packing colloid 23 is inserted between this another encapsulating structure 2b and this first substrate 21.
Encapsulating structure 2a of the present utility model is by the design of this metal retaining wall 27, can control the shaping scope of this packing colloid 23, and can promote mobility and the filler of this packing colloid 23, destroy this encapsulating structure 2a to avoid these packing colloid 23 overflows, so the quality of energy improving product.
Wherein on the one hand, after another encapsulating structure of storehouse 2b, form again this packing colloid 23, make bonding this another encapsulating structure 2b of this packing colloid 23 and this first substrate 21, so this two encapsulating structure 2a can not produce the gap between 2b, thereby can promote this two encapsulating structure 2a, the associativity of 2b is to avoid top encapsulating structure 2b to come off and to have better anti-warpage performance.
on the other hand, connect metal column 210 with storehouse and be electrically connected this two encapsulating structure 2a by this, 2b, because controlling this height that connects metal column 210 and volume, so after this soldering tin material 214 of reflow, this connects metal column 210 can not produce defective with the contact that this soldering tin material 214 consists of, thereby keep good electric connection quality, and this coplanarity (coplanarity) that connects the palisade array (grid array) that metal column 210 is arranged in is good, thereby contact stress (stress) keeps balance and can not cause this two encapsulating structure 2a, be between 2b to tilt to connect and put, to avoid producing the problem of contact skew.
Fig. 3 A to Fig. 3 B is the cross-sectional schematic of the second embodiment and the encapsulation stack apparatus 3 thereof of encapsulating structure 3a of the present utility model.The difference of the present embodiment and the first embodiment is newly-increased assistant metal post (dummy post) 37 as copper material, and other structure is roughly the same.
As shown in Fig. 3 A and Fig. 3 A ', be formed with a plurality of assistant metal posts 37 on the first surface 21a for this first substrate 21.
In the present embodiment, described assistant metal post 37 is respectively this connects between metal column 210 (connect as this inboard, the outside etc. of metal column 210 around) and this connects between metal column 210 and this first electronic building brick 20, to consist of the 3rd embodiment of encapsulating structure 3a of the present utility model.
In addition, the height of this assistant metal post 37 connects the height of metal column 210 greater than this, and the width of this assistant metal post 37 connects the width of metal column 210 less than this, namely connects metal column 210 compared to this, and this assistant metal post 37 is elongated cylinder.
As shown in Fig. 3 B, carry out another encapsulating structure of storehouse 2b, make described assistant metal post 37 against this another encapsulating structure 2b, form again packing colloid 23 between this another encapsulating structure 2b and this first substrate 21, make this packing colloid 23 coat described assistant metal post 37, to consist of an encapsulation stack apparatus 5.
The utility model is by the design of this assistant metal post 37, can not only promote mobility and the filler of this packing colloid 23, and can be directly against this another encapsulating structure 2b, so that better coplanarity (coplanarity) to be provided, make the encapsulating structure 2b of top more can keep balance and can not be inclination.
In sum, encapsulating structure of the present utility model, design by this metal retaining wall (and assistant metal post), can control the shaping scope of this packing colloid, and can promote mobility and the filler of this packing colloid, destroy this encapsulating structure to avoid this packing colloid overflow, so the quality of energy improving product.
In addition, this assistant metal major gene so that better coplanarity to be provided, makes the encapsulating structure of top more can keep balance and not tilt directly against the top encapsulating structure.
Again, connect the design of metal column by this, so can overcome that the processing of laser and lower tin is difficult for, tilt to connect between stack architecture and put and the problem of contact skew.
In addition, this encapsulating structure passes through bonding this another encapsulating structure of this packing colloid and this substrate, thereby effectively avoids coming off between encapsulating structure and having better anti-warpage performance.
Above-described embodiment is only in order to illustrative principle of the present utility model and effect thereof, but not is used for restriction the utility model.Any those skilled in the art all can under spirit of the present utility model and category, modify to above-described embodiment.So rights protection scope of the present utility model, should be as listed in claims.
Claims (8)
1. an encapsulating structure, is characterized in that, it comprises:
Substrate has a plurality of metal columns that connect on its surface;
Electronic building brick, it is located on this substrate surface and is electrically connected this substrate, and makes the described periphery that metal column is positioned at this electronic building brick that connects; And
The metal retaining wall, it is located on the edge of this substrate and around the described periphery that connects metal column.
2. encapsulating structure according to claim 1, is characterized in that, the height of this metal retaining wall connects the height of metal column greater than this.
3. encapsulating structure according to claim 1 and 2, is characterized in that, this metal retaining wall ringwise or L shaped.
4. encapsulating structure according to claim 1, is characterized in that, this encapsulating structure also comprises the assistant metal post of being located on this substrate, and its height connects the height of metal column greater than this.
5. according to claim 1 or 4 described encapsulating structures, is characterized in that, this encapsulating structure comprises that also being located at this connects soldering tin material on metal column.
6. encapsulating structure according to claim 1, is characterized in that, this encapsulating structure also comprises another encapsulating structure, and it is incorporated into described connecting on metal column, makes this another encapsulating structure be stacked over the top of this substrate and this electronic building brick.
7. encapsulating structure according to claim 6, is characterized in that, this metal retaining wall is against this another encapsulating structure.
8. encapsulating structure according to claim 6, it is characterized in that, this encapsulating structure also comprises packing colloid, it is formed between this another encapsulating structure and this substrate, and bonding this another encapsulating structure of this packing colloid and this substrate, this packing colloid also coats described metal column and this electronic building brick of connecting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220741041 CN203013702U (en) | 2012-12-28 | 2012-12-28 | Packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220741041 CN203013702U (en) | 2012-12-28 | 2012-12-28 | Packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203013702U true CN203013702U (en) | 2013-06-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 201220741041 Expired - Lifetime CN203013702U (en) | 2012-12-28 | 2012-12-28 | Packaging structure |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104576547A (en) * | 2013-10-25 | 2015-04-29 | Lg伊诺特有限公司 | Printed circuit board and manufacturing method thereof and semiconductor package using the same |
| CN104979314A (en) * | 2014-04-09 | 2015-10-14 | 日月光半导体制造股份有限公司 | Semiconductor packaging structure and semiconductor technologies |
| CN108321142A (en) * | 2013-07-26 | 2018-07-24 | 日月光半导体制造股份有限公司 | Semiconductor package part and its manufacturing method |
| CN108987370A (en) * | 2017-05-31 | 2018-12-11 | 矽品精密工业股份有限公司 | Electronic packing piece and its preparation method |
| CN112885825A (en) * | 2021-01-21 | 2021-06-01 | Tcl华星光电技术有限公司 | LED panel and preparation method thereof |
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2012
- 2012-12-28 CN CN 201220741041 patent/CN203013702U/en not_active Expired - Lifetime
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108321142A (en) * | 2013-07-26 | 2018-07-24 | 日月光半导体制造股份有限公司 | Semiconductor package part and its manufacturing method |
| CN108321142B (en) * | 2013-07-26 | 2020-08-28 | 日月光半导体制造股份有限公司 | Semiconductor package and method of manufacturing the same |
| CN104576547A (en) * | 2013-10-25 | 2015-04-29 | Lg伊诺特有限公司 | Printed circuit board and manufacturing method thereof and semiconductor package using the same |
| KR20150047747A (en) * | 2013-10-25 | 2015-05-06 | 엘지이노텍 주식회사 | Printed Circuit Board and Manufacturing Method thereof and Semiconductor Package Using the Same |
| CN104576547B (en) * | 2013-10-25 | 2020-05-05 | Lg伊诺特有限公司 | Printed circuit board, method of manufacturing the same, and semiconductor package having the same |
| KR102237870B1 (en) * | 2013-10-25 | 2021-04-09 | 엘지이노텍 주식회사 | Printed Circuit Board and Manufacturing Method thereof and Semiconductor Package Using the Same |
| CN104979314A (en) * | 2014-04-09 | 2015-10-14 | 日月光半导体制造股份有限公司 | Semiconductor packaging structure and semiconductor technologies |
| CN108987370A (en) * | 2017-05-31 | 2018-12-11 | 矽品精密工业股份有限公司 | Electronic packing piece and its preparation method |
| CN112885825A (en) * | 2021-01-21 | 2021-06-01 | Tcl华星光电技术有限公司 | LED panel and preparation method thereof |
| CN112885825B (en) * | 2021-01-21 | 2022-09-27 | Tcl华星光电技术有限公司 | LED panel and preparation method thereof |
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