CN104979314A - Semiconductor packaging structure and semiconductor process - Google Patents

Abstract

The invention relates to a semiconductor packaging structure and a semiconductor process. The semiconductor package structure includes a first substrate, a second substrate, a die, and a cladding material. At least part of the second conductive part of the second substrate is positioned in the groove of the first conductive part of the first substrate, or at least part of the first conductive part is positioned in the groove of the second conductive part. The die is electrically connected to the first substrate. The cladding material is located between the first substrate and the second substrate and wraps the bare chip, the first conductive part and the second conductive part. Therefore, the first conductive part and the second conductive part are ensured to have better electrical connection.

Description

Semiconductor packaging structure and semiconductor process

technical field

The invention relates to a semiconductor package structure and a semiconductor process. Specifically, the present invention relates to a stacked semiconductor package structure and semiconductor process thereof.

Background technique

The manufacturing method of a conventional stacked semiconductor package structure is as follows. First, a die and a plurality of solder balls are bonded to the upper surface of the lower substrate. Then, a molding material is formed on the upper surface of the lower substrate by using a molding process to cover the die and the solder balls. Next, after curing the sealing material, a high temperature laser is used to form a plurality of openings on the upper surface of the sealing material to expose the upper part of the solder ball. Next, placing the upper substrate on the sealing material, so that the solder located on the lower surface of the upper substrate contacts the solder balls. Next, a heating oven is used to heat for the first time, so that the solder and the solder balls are melted to form an internal connection component. Next, after forming a plurality of solder balls on the lower surface of the lower substrate, a reflow process is performed. Finally, the cutting step is performed.

In the conventional manufacturing method, when the high-temperature laser forms an opening in the sealing material, the high-temperature laser will simultaneously heat the upper part of the solder ball, so that an oxide layer is formed on the surface of the upper part of the solder ball. Therefore, during bonding, the solder contacts the oxide layer of the solder ball, and the oxide layer remains between the solder and the solder ball even after heating. Since the oxide layer is non-conductive, the electrical connection effect between the solder and the solder ball is reduced. In addition, when the high-temperature laser forms an opening on the encapsulant, the high-temperature laser may not be able to completely remove the encapsulant on the upper portion of the solder ball, that is, part of the encapsulant will remain on the solder ball. Formation of adhesive residue on the upper portion of the solder ball. Therefore, during the bonding process, the residual glue exists between the solder and the solder balls. Since the residual glue is not conductive, the electrical connection effect between the solder and the solder ball is reduced.

Contents of the invention

One aspect of the present disclosure relates to a semiconductor package structure. In one embodiment, the semiconductor package structure includes a first substrate, a second substrate, a die and a cladding material. The first substrate has an upper surface, a plurality of conductive pads on the first substrate and a plurality of first conductive parts, wherein the first conductive parts are located on the conductive pads on the first substrate. The second substrate has a lower surface, a plurality of conductive pads under the second substrate, and a plurality of second conductive parts, wherein the upper surface of the first substrate faces the lower surface of the second substrate, the The second conductive part is located on the conductive pad under the second substrate, and at least part of the second conductive part is located in the groove of the first conductive part, or at least part of the first conductive part is located in the second conductive part. in the groove of the part. The die is electrically connected to the upper surface of the first substrate. The cladding material is located between the upper surface of the first substrate and the lower surface of the second substrate, and covers the die, the first conductive part and the second conductive part.

Another aspect of the present disclosure relates to a semiconductor process. In one embodiment, the semiconductor process includes the following steps: (a) electrically connecting the die to the upper surface of the first substrate, wherein the first substrate further has a plurality of conductive pads on the first substrate , exposed on the upper surface of the first substrate; (b) forming a plurality of first conductive parts on the conductive pads on the first substrate; (c) applying a cladding material on the first substrate The surface is used to cover the bare chip and the first conductive part, wherein the covering material is a B-stage (B-stage) glue; (d) forming a plurality of openings in the covering material to expose the The first conductive part; (e) pressing the second substrate on the cladding material, so that the lower surface of the second substrate adheres to the cladding material, wherein the second substrate is further There are a plurality of conductive pads under the second substrate and a plurality of second conductive parts, wherein the conductive pads under the second substrate are exposed on the lower surface of the second substrate, and the second conductive parts are located on the second substrate on the bottom conductive pad, and the second conductive part is inserted into the first conductive part, or the first conductive part is inserted into the second conductive part; and (f) performing a heating step so that the covering material is cured into C-stage glue.

In this embodiment, since the second conductive part is inserted into the first conductive part, or the first conductive part is inserted into the second conductive part, it is ensured to pass through the residual glue and the oxide layer, and It can ensure better electrical connection effect between the second conductive part and the first conductive part.

Description of drawings

FIG. 1 shows a schematic cross-sectional view of an embodiment of a semiconductor package structure of the present invention.

FIG. 2 shows an enlarged schematic view of area A of FIG. 1 .

FIG. 3 shows an enlarged schematic view of area B of FIG. 2 .

FIG. 4 shows a schematic cross-sectional view of the first conductive portion and the second conductive portion of another embodiment of the semiconductor package structure of the present invention.

FIG. 5 shows a schematic cross-sectional view of the first conductive portion and the second conductive portion of another embodiment of the semiconductor package structure of the present invention.

6 to 13 are schematic diagrams showing an embodiment of the semiconductor process of the present invention.

14 to 18 are schematic diagrams showing an embodiment of the method for manufacturing the second conductive part of the second substrate of the present invention.

Detailed ways

Referring to FIG. 1 , it shows a schematic cross-sectional view of an embodiment of the semiconductor package structure of the present invention. The semiconductor package structure 1 includes a first substrate 10 , a second substrate 12 , a die 14 , a cladding material 18 and a plurality of lower solder balls 20 .

The first substrate 10 has an upper surface 101 , a lower surface 102 , a plurality of first upper substrate conductive pads 103 , a plurality of first lower substrate conductive pads 104 and a plurality of first conductive portions 15 . In this embodiment, the first substrate 10 is a packaging substrate, the conductive pad 104 under the first substrate is exposed on the lower surface 102 of the first substrate 10, and the conductive pad 104 on the first substrate Pads 103 are exposed on the upper surface 101 of the first substrate 10 . The conductive pad 104 under the first substrate is electrically connected to the conductive pad 103 on the first substrate. The first conductive part 15 is located on the conductive pad 103 on the first substrate. In this embodiment, the first conductive part 15 is a solder ball (Solder Ball) or a pre-solder (Pre-solder).

The second substrate 12 has an upper surface 121 , a lower surface 122 , a plurality of upper second substrate conductive pads 123 , a plurality of second lower substrate conductive pads 124 and a plurality of second conductive portions 16 . The upper surface 101 of the first substrate 10 faces the lower surface 122 of the second substrate 12 . In this embodiment, the second substrate 12 is a packaging substrate or an interposer, and the conductive pad 123 on the second substrate is exposed on the upper surface 121 of the second substrate 12, and the The conductive pad 124 under the second substrate is exposed on the lower surface 122 of the second substrate 12 . The conductive pad 123 on the second substrate is electrically connected to the conductive pad 124 under the second substrate. The second conductive portion 16 is located on the conductive pad 124 under the second substrate. In this embodiment, the second conductive part 16 is a pillar (Pillar), its material can be copper but not limited thereto, and the second conductive part 16 is inserted into the first conductive part 15, so that the two form an interconnected component. The first conductive part 15 is inserted into the second conductive part 16 to form a groove 151 , at least part of the second conductive part 16 is located in the groove 151 . That is, the groove 151 is defined by the at least part of the second conductive part 16 , and the at least part of the second conductive part 16 is covered by the first conductive part 15 . The distance between two adjacent first conductive portions 15 is defined as a gap (Gap) ( FIG. 2 ). In other embodiments, the first conductive part 15 is a column, and the second conductive part 16 is a solder ball or pre-solder, then the first conductive part 15 is inserted into the second conductive part 16 . The second conductive part 16 is inserted into the first conductive part 15 to form a groove, at least part of the first conductive part 15 is located in the groove. That is, the groove is defined by the at least part of the first conductive part 15 , and the at least part of the first conductive part 15 is covered by the second conductive part 16 .

The die 14 is electrically connected to the upper surface 101 of the first substrate 10 . In this embodiment, the die 14 is flip-chip bonded to the upper surface 101 of the first substrate 10 .

The cladding material 18 is located between the upper surface 101 of the first substrate 10 and the lower surface 122 of the second substrate 12, and covers the die 14 and the interconnection components (by the formed by the first conductive portion 15 and the second conductive portion 16). The cladding material 18 adheres to the upper surface 101 of the first substrate 10 and the lower surface 122 of the second substrate 12 respectively, and the cladding material 18 and the upper surface of the first substrate 10 The adhesion force between the surfaces 101 is substantially the same as the adhesion force between the coating material 18 and the lower surface 122 of the second substrate 12 . In this embodiment, the covering material 18 is a non-conductive film (Non Conductive Film, NCF), non-conductive paste (Non Conductive Paste, NCP) or ABF (Ajinomoto Build-up Film). In other embodiments, the covering material 18 may be a conventional molding compound.

In addition, in this embodiment, the coating material 18 further has a plurality of filler particles (Fillers) 182 , and the filler particles 182 have different particle diameters and are evenly distributed in the coating material 18 . At the same time, the content of the filler particles 182 (Filler Content) (in weight percent) is also uniform in the coating material 18. It should be noted that in the process, the uniform distribution of filling particles 182 can facilitate the uniformity of the laser drilled holes on the cladding material 18, thereby improving the uniformity of the internal connection components, and improving the package. Structure 1 reliability (reliability). In this embodiment, the average particle size of the filling particles 182 is less than 5 microns (μm).

Furthermore, the filling particles 182 do not need to pass through the flow process of the mold channel (molding channel), so the overall thickness of the coating material 18 can be reduced, especially the coating material 18 on the second substrate 12. and the thickness between the die 14 . In one embodiment, the thickness of the cladding material 18 between the second substrate 12 and the die 14 may not be greater than the maximum particle size of the filling particles 182; in another embodiment, The thickness of the cladding material 18 between the second substrate 12 and the die 14 is less than 20 microns (μm).

For example, area A1 and area A2 in the figure respectively represent the cladding material _{18 on} the left side and the cladding material 18 on the right side, wherein the area A1 is the leftmost edge _of the cladding material 18 extending to the right A default distance, the default distance is 10% of the maximum width of the covering material 18 , and the area A ₂ is the rightmost edge of the covering material 18 extending to the left by the default distance. The particle size distribution and content (FillerContent) (by weight percentage _{) of} the filler particles 182 located in the area A1 and the area A2 are the same. _In the actual experiment, search for any small part of the measurement area in area A1 and area A2 respectively, wherein the measurement area includes _{about 100} filled particles, and it can be found that the measurement area in area A1 and the measurement area in area _A2 In the measurement area, the particle size distribution and Filler Content (by weight percentage) of the two are substantially the same.

The lower solder balls 20 are located on the conductive pads 104 under the first substrate for electrical connection to external components.

Referring to FIG. 2 , it shows an enlarged schematic view of area A of FIG. 1 . In this embodiment, the first conductive portion 15 is a solder ball or pre-solder. The second conductive portion 16 is a cylinder having a base 161 and a tip 162 , and the tip 162 of the second conductive portion 16 is inserted into the first conductive portion 15 to form the groove 151 . The base portion 161 is located on the conductive pad 124 under the second substrate. The tip 162 is located on the base 161 . The tip 162 has a first end 1621 and a second end 1622 , the first end 1621 is opposite to the second end 1622 . The first end 1621 is connected to the base 161 , and the width of the tip 162 decreases from the first end 1621 to the second end 1622 to form a protruding cone. The second end 1622 is inserted into the first conductive portion 15 . Because the pointed part 162 is in the shape of a protruding cone, it can help the insertion of the second conductive part 16, and can help the deformation of the first conductive part 15 to be small and not easy to expand, so that the gap g1 is small, and the adjacent The first conductive portion 15 is less likely to be bridged or shorted. In addition, after the second end 1622 is inserted into the first conductive part 15, the relative position between the second conductive part 16 and the first conductive part 15 can be fixed, so that the first substrate The relative positions of the first substrate 10 and the second substrate 12 are also fixed, and there will be no shift (Shift) between the first substrate 10 and the second substrate 12 during transportation.

The second conductive portion 16 has a maximum height H, the base portion 161 has a height h ₁ , and the height h ₁ of the base portion 161 is related to the rigidity of the second conductive portion 16 . The pointed portion 162 has a height h ₂ , and the height h ₂ of the pointed portion 162 is related to the sharpness of the second end 1622 . When h ₁ ≧H/2, then the rigidity of the second conductive part 16 is relatively good, and it is not easy to bend, but if h ₁ is too large and h ₂ is too small, then the pointed part 162 may not be sharp enough to be easily inserted into the inside the first conductive portion 15. When h ₂ ≧H/2, then the tip 162 is sharper and easier to insert into the first conductive part 15, but if h2 is too large, then the rigidity of the second conductive part 16 may be too small and easy to insert into the first conductive part 15. bent. Therefore, preferably, h ₁ :h ₂ is 2:1 to 1:1. In this embodiment, the maximum height H of the second conductive part is 60 μm to 120 μm, the height h ₁ of the base is equal to the height h ₂ of the tip, which is half of the maximum height H of the second conductive part (for example : 30μm to 60μm).

The second conductive portion 16 has a maximum width W, and the second end 1622 of the pointed portion 162 has a width W ₁ , 0≦W ₁ <W/2, that is, W ₁ is less than half of W. In the case of the same maximum width W, the smaller W ₁ makes the second end 1622 of the pointed portion 162 sharper and easier to insert into the first conductive portion 15 . In this embodiment, the maximum width W of the second conductive portion is 60 μm to 120 μm, and the width W ₁ of the second end is less than 60 μm, or less than 30 μm. In this embodiment, the width W ₁ of the second end is 10 μm, and the distance between two adjacent first conductive portions 15 is a gap g ₁ .

In this embodiment, the pointed portion 162 is inserted into and contacts the first conductive portion 15 to form a contact portion 1623 , and the contact portion 1623 has a height h ₃ , where h ₃ ≧h ₂ /3. That is, the height h3 is greater than or equal to one _{- third} of the height h2. In the process of this embodiment, the cladding material 18 needs to be laser drilled to expose the upper portion of the first conductive portion 15 . However, because the laser processing cannot completely remove the coating material 18 above the first conductive portion 15 , part of the coating material 18 remains on the top of the first conductive portion 15 to form adhesive residue. In addition, the surface of the first conductive portion 15 is oxidized due to heat generated during the laser processing, and an oxide layer is formed to cover the upper portion of the first conductive portion 15 . Through the above-mentioned design that the height h3 is greater than or equal to one _{- third} of the height h2, it can ensure that the tip 162 passes through the residual glue and oxide layer on the first conductive part 15, thereby ensuring that the The second conductive portion 16 has a better electrical connection effect with the first conductive portion 15 . Because, if the height h3 is less than one- _third of the height h2, then the _second conductive part 16 may not pass through the residual glue and oxide layer on the first conductive part 15, and is not electrified. sexual connection.

If the second substrate 12 has a smiling face warp, then the height h of the contact portion 1623 after the second conductive portion 16 at the center of the second substrate 12 is inserted into the first conductive portion 15 ₃ must be greater than h ₂ /2, so as to ensure that the height h ₃ of the contact portion 1623 after the second conductive portion 16 at the peripheral position of the second substrate 12 is inserted into the first conductive portion 15 is greater than h ₂ /3. In addition, if the lengths of all the second conductive parts 16 are not uniform, the height h ₃ of the contact part 1623 after the shortest second conductive part 16 is inserted into the first conductive part 15 must be greater than h ₂ / 3, to ensure that the height h ₃ of the contact portion 1623 after the other second conductive portion 16 is inserted into the first conductive portion 15 is greater than h ₂ /3.

Referring to FIG. 3 , an enlarged schematic view of area B of FIG. 2 is shown. In the process of this embodiment, after the pointed portion 162 is inserted into the first conductive portion 15 , the residual glue 181 on the upper part of the first conductive portion 15 will be located on the contact portion 1623 along with the pointed portion 162 , that is, part of the covering material 18 will remain in the contact portion 1623 . The residual glue 181 is discontinuously distributed. In this embodiment, the contact part 1623 can be divided into a first part I and a second part II, the first part I includes the second end 1622 of the pointed part 162, and the second part II is far away from the pointed part II. The second end 1622 of the portion 162. Preferably, the height of the first part I is half of the height h3 _of the contact part, and the height of the second part II is half of the height h3 _of the contact part. The thickness of the adhesive residue 181 attached to the second part II is greater than the thickness of the adhesive residue 181 attached to the first part I. In this embodiment, the thickness of the adhesive residue 181 attached to the second part II is greater than 1 μm, and the thickness of the adhesive residue 181 attached to the first part I is less than 1 μm. In addition, the gap between the adhesive residues 181 attached to the second part II is smaller than the gap between the adhesive residues 181 attached to the first part I. Since the residual glue does not conduct electricity, it will hinder the electrical connection. Therefore, compared with the second part II, the contact area between the tip 162 and the first conductive part 15 is smaller. large to ensure their electrical connection with each other.

In addition, where there is no barrier from the residual glue 181, an intermetallic compound (Intermetallic Compound, IMC) 19 (such as copper-tin alloy) will be formed between the tip portion 162 and the first conductive portion 15, and is located in the first portion The thickness of the interface metal compound 19 in I is greater than the thickness of the interface metal compound 19 in the second part II. In this embodiment, the thickness of the interface metal compound 19 located in the first part I is greater than 1 μm, and the thickness of the interface metal compound 19 located in the second part II is less than 1 μm. Since the interfacial metal compound 19 is conductive, it can ensure electrical connection, therefore, the first part I is easier to form a better electrical connection effect than the second part II.

Referring to FIG. 4 , it shows a schematic cross-sectional view of the first conductive portion and the second conductive portion of another embodiment of the semiconductor package structure of the present invention. In this embodiment, the width W ₁ of the second end of the pointed portion 162 is 30 μm, and the distance between two adjacent first conductive portions 15 is defined as a gap g ₂ . The pitch (Pitch) between the first conductive parts 15 in this embodiment is the same as the pitch between the first conductive parts 15 in the embodiment of FIG. ₁ , but the gap g2 in this embodiment is smaller than the gap g1 in FIG. ₁ , this is because the width W _{1 of} the second end 1622 of the pointed portion 162 in the embodiment of FIG. The pointed portion 162 of the embodiment is sharper, and is easier to insert into the first conductive portion 15, and displaces fewer first conductive portions 15, so that adjacent first conductive portions 15 are less likely to be bridged (Bridge). ) or short circuit (short). Therefore, the smaller the width W ₁ of the second end 1622 of the pointed portion 162 is, the easier it is to meet the requirement of fine pitch.

Referring to FIG. 5 , it shows a schematic cross-sectional view of the first conductive portion and the second conductive portion of another embodiment of the semiconductor package structure of the present invention. In this embodiment, the second conductive portion 16 only has the pointed portion 162 without the base portion 161, and the first end 1621 of the pointed portion 162 is located on the conductive pad 124 under the second substrate. . At this time, the maximum height H of the second conductive portion 16 is the height h ₂ of the pointed portion 162 .

Referring to FIG. 6 to FIG. 13 , schematic diagrams of an embodiment of the semiconductor process of the present invention are shown. Referring to FIG. 6 , the die 14 and the first substrate 10 are provided. The first substrate 10 has an upper surface 101 , a lower surface 102 , a plurality of conductive pads 103 on the first substrate and a plurality of conductive pads 104 under the first substrate. In this embodiment, the first substrate 10 is a packaging substrate, the conductive pad 104 under the first substrate is exposed on the lower surface 102 of the first substrate 10, and the conductive pad 104 on the first substrate Pads 103 are exposed on the upper surface 101 of the first substrate 10 . The conductive pad 104 under the first substrate is electrically connected to the conductive pad 103 on the first substrate. Next, the die 14 is electrically connected to the upper surface 101 of the first substrate 10 . In this embodiment, the die 14 is attached to the upper surface 101 of the first substrate 10 by flip-chip bonding.

Referring to FIG. 7 , a plurality of first conductive portions 15 are formed on the conductive pads 103 on the first substrate, and the first conductive portions 15 surround the die 14 . In this embodiment, the first conductive portion 15 is a plurality of solder balls. However, in other embodiments, the first conductive portion 15 may be a pillar.

Referring to Figure 8, the cladding material 18 is provided. In this embodiment, the covering material 18 is a non-conductive film (NonConductive Film, NCF), non-conductive glue (Non Conductive Paste, NCP) or ABF (Ajinomoto Build-upFilm), in other embodiments, the The covering material 18 can be a conventional molding compound (Molding Compound). In this embodiment, the coating material 18 has a plurality of filler particles (Fillers) 182 . The filling particles 182 have different particle diameters and are uniformly distributed in the coating material 18 . At this time, the covering material 18 is in the state of a B-stage glue.

Referring to FIG. 9 , the covering material 18 is applied on the upper surface 101 of the first substrate 10 to cover the die 14 and the first conductive portion 15 . At this time, the cladding material 18 is still in the B-stage state. In this embodiment, the cladding material 18 is formed on the upper surface 101 of the first substrate 10 from top to bottom or from bottom to top by pressing or printing. Therefore, the first conductive part 15 will not affect the flow of the filling particles 182 in the coating material 18, and the filling particles 182 do not need to pass through the flow process of the mold channel (Molding Channel), so that the filling particles 182 are still uniformly distributed in the coating Covering material 18.

Referring to FIG. 10 , a plurality of openings 183 are formed on the covering material 18 to expose the upper portion of the first conductive portion 15 . In this embodiment, the opening 183 is formed by using a cryogenic laser. At this point, the cladding material 18 is still in the B-stage state. After laser processing, the upper part of the first conductive part 15 is exposed. However, because laser processing cannot completely remove the coating material above the first conductive portion 15 , part of the coating material 18 remains on the top of the first conductive portion 15 to form adhesive residue. In addition, the surface of the first conductive portion 15 is oxidized due to heat generated during the laser processing, and an oxide layer is formed to cover the upper portion of the first conductive portion 15 . The residue and the oxide layer are not conductive, which hinder electrical connection.

Referring to FIG. 11 , the second substrate 12 is provided. The second substrate 12 has an upper surface 121, a lower surface 122, a plurality of conductive pads 123 on the second substrate, a plurality of conductive pads 124 under the second substrate, a plurality of second conductive parts 125 and a plurality of second conductive pads. Section 16. The lower surface 122 of the second substrate 12 faces the upper surface 101 of the first substrate 10 . In this embodiment, the second substrate 12 is a packaging substrate or an interposer, and the conductive pad 123 on the second substrate is exposed on the upper surface 121 of the second substrate 12, and the The conductive pad 124 under the second substrate is exposed on the lower surface 122 of the second substrate 12 . The conductive pad 123 on the second substrate is electrically connected to the conductive pad 124 under the second substrate. The second conductive part 16 is located on the conductive pad 124 under the second substrate.

Referring to FIG. 11A , a partially enlarged schematic diagram of area C in FIG. 11 is shown. In this embodiment, the second conductive portion 16 is a cylinder having a base 161 and a tip 162 . The tip 162 is located on the base 161 . The pointed portion 162 has a first end 1621 and a second end 1622, the first end 1621 is connected to the base portion 161, and the width of the pointed portion 162 decreases gradually from the first end 1621 to the second end 1622 , forming a prominent cone.

The second conductive portion 16 has a maximum height H, the base portion 161 has a height h ₁ , and the height h ₁ of the base portion 161 is related to the rigidity of the second conductive portion 16 . The pointed portion 162 has a height h ₂ , and the height h ₂ of the pointed portion 162 is related to the sharpness of the second end 1622 . When h ₁ ≧H/2, then the rigidity of the second conductive part 16 is relatively good, and it is not easy to bend, but if h ₁ is too large and h ₂ is too small, then the pointed part 162 may not be sharp enough to be easily inserted into the inside the first conductive portion 15. When h ₂ ≧H/2, then the pointed portion 162 is sharper and easier to insert into the first conductive portion 15, but if h ₂ is too large, the rigidity of the second conductive portion 16 may be too small, Easy to bend. Therefore, preferably, h ₁ :h ₂ is 2:1 to 1:1. In this embodiment, the maximum height H of the second conductive part is 60 μm to 120 μm, the height h ₁ of the base is equal to the height h ₂ of the tip, which is half of the maximum height H of the second conductive part (for example : 30μm to 60μm).

The second conductive portion 16 has a maximum width W, and the second end 1622 of the pointed portion 162 has a width W ₁ , 0≦W ₁ <W/2, that is, W ₁ is less than half of W. In the case of the same maximum width W, the smaller W ₁ makes the second end 1622 of the pointed portion 162 sharper and easier to insert into the first conductive portion 15 . In this embodiment, the maximum width W of the second conductive portion is 60 μm to 120 μm, and the width W ₁ of the second end is less than 60 μm, or less than 30 μm. In this embodiment, the width W ₁ of the second end is 10 μm.

Referring to FIG. 12 , a downward force is applied to press-fit the second substrate 12 onto the cladding material 18 . Since the cladding material 18 is still in the B-stage state, the lower surface 122 of the second substrate 12 can be adhered to the cladding material 18, and the cladding material 18 and the first The adhesion force between the upper surface 101 of the substrate 10 is substantially the same as the adhesion force between the coating material 18 and the lower surface 122 of the second substrate 12 . According to one embodiment, the pressing force is applied while heating to about 80° C., at this time, the covering material 18 is in a flowable state and can fill any gaps. In addition, since the covering material 18 does not need to reserve a mold channel (Molding Channel) for its flow, therefore, by controlling the amount of the covering material 18 and the pressing force, the thickness of the overall packaging structure can be greatly reduced.

At this time, since the first conductive part 15 becomes soft due to heating, the second end 1622 of the tip 162 of the second conductive part 16 can be inserted into the first conductive part 15 . As shown in FIG. 3 , in this embodiment, the pointed portion 162 is inserted into the first conductive portion 15 to form a contact portion 1623 , at this time, the residual glue 181 on the top of the first conductive portion 15 will follow The pointed portion 162 is located at the contact portion 1623 , that is, part of the covering material 18 will remain in the contact portion 1623 . The contact portion 1623 has a height h ₃ , h ₃ ≧h ₂ /3. That is, the height h3 is greater than or equal to one _{- third} of the height h2, thereby ensuring that the tip 162 passes through the residual glue and oxide layer on the first conductive part 15, thereby ensuring that the The second conductive portion 16 and the first conductive portion 15 have a better electrical connection effect. Because, if the height h3 is less than one- _third of the height h2, then the _second conductive part 16 may not pass through the residual glue and oxide layer on the first conductive part 15, and thus is not electrified. sexual connection.

The residual glue 181 is discontinuously distributed. In this embodiment, the contact part 1623 can be divided into a first part I and a second part II, the first part I includes the second end 1622 of the pointed part 162, and the second part II is far away from the pointed part II. The second end 1622 of the portion 162. Preferably, the height of the first part I is half of the height h3 _of the contact part, and the height of the second part II is half of the height h3 _of the contact part. The thickness of the adhesive residue 181 attached to the second part II is greater than the thickness of the adhesive residue 181 attached to the first part I. In this embodiment, the thickness of the adhesive residue 181 attached to the second part II is greater than 1 μm, and the thickness of the adhesive residue 181 attached to the first part I is less than 1 μm. In addition, the gap between the adhesive residues 181 attached to the second part II is larger than the gap between the adhesive residues 181 attached to the first part I. Since the residual glue does not conduct electricity, it will hinder the electrical connection. Therefore, compared with the second part II, the contact area between the tip 162 and the first conductive part 15 is smaller. large to ensure their electrical connection with each other.

Next, heat the oven for the first time. The working temperature at this time is about 245°C. It should be noted that, in the process of moving to the heating oven, the lower surface 122 of the second substrate 12 has been adhered to the cladding material 18, therefore, the second substrate 12 and the The sealing material 18 will not be offset. In this embodiment, the second conductive portion 16 has been inserted into the first conductive portion 15 to form an internal connection component, and at this time, the covering material 18 can contact and cover the internal connection component.

At this time, as shown in FIG. 3 , an intermetallic compound (Intermetallic Compound, IMC) 19 (such as a copper-tin alloy) will be formed between the pointed portion 162 and the first conductive portion 15 where there is no barrier of the residual glue 181. , and the thickness of the interface metal compound 19 located in the first part I is greater than the thickness of the interface metal compound 19 located in the second part II. In this embodiment, the thickness of the interface metal compound 19 located in the first part I is greater than 1 μm, and the thickness of the interface metal compound 19 located in the second part II is less than 1 μm. Since the interfacial metal compound 19 is conductive, it can ensure electrical connection, therefore, the first part I is easier to form a better electrical connection effect than the second part II. After heating for a period of time, the cladding material 18 solidifies into a C-stage adhesive.

Referring to FIG. 13 , a plurality of lower solder balls 20 are formed on the lower conductive pad 104 of the first substrate. Next, reflow is performed. It should be noted that at this time, the second substrate 12 has been tightly attached to the sealing material 18 and the first substrate 10, so after reflow, the first substrate 10, the first substrate 10 Although the coefficients of thermal expansion (CTE) of the two substrates 12, the cladding material 18, the first conductive portion 15, and the second conductive portion 16 are inconsistent, because the first substrate 10 and the second substrate The bottom 12 has been stuck by the covering material 18, and the second end 1622 of the tip 162 of the second conductive part 16 is inserted into the first conductive part 15, and can be regarded as a whole, so that The warping behavior of the first substrate 10 and the second substrate 12 will be consistent (for example: the first substrate 10 and the second substrate 12 are warped for a sad face at the same time, or for a smiling face at the same time. warping). Therefore, the first conductive portion 15 and the second conductive portion 16 can always maintain a contact state to maintain the interconnection components, thereby improving product reliability and yield. Next, cutting is performed to form a plurality of semiconductor package structures 1 as shown in FIG. 1 . During the cutting process, the second substrate 12 is also closely attached to the sealing material 18 and the first substrate 10, so the stress generated during cutting causes the second substrate 12 to peel off. The problem doesn't happen either.

Referring to FIG. 14 to FIG. 18 , schematic views of an embodiment of the method for manufacturing the second conductive part of the second substrate of the present invention are shown. Referring to Fig. 14, the second substrate 12 is provided. The second substrate 12 has an upper surface 121 , a lower surface 122 , a plurality of upper second substrate conductive pads 123 , a plurality of second lower substrate conductive pads 124 and a plurality of second conductive portions 125 .

Next, a first photoresist layer 30 (for example: dry film (Dry Film)) is formed on the lower surface 122, wherein the first photoresist layer 30 has a plurality of openings 301, and the openings 301 correspond to and expose the Conductive pad 124 under the second substrate. Next, metal posts 40 are formed in each of the openings 301 by electroplating. The metal post 40 not only fills the opening 301 , but also protrudes from the first photoresist layer 30 . That is, the metal post 40 has a protruding portion 41 protruding from the upper surface of the first photoresist layer 30 .

Referring to FIG. 15 , the protruding portion 41 of the metal pillar 40 is removed by grinding, so that the upper surface of the metal pillar 40 is substantially coplanar with the upper surface of the first photoresist layer 30 .

Referring to FIG. 16 , the outer edge of the metal post 40 is removed by etching, so that the metal post 40 forms the second conductive portion 16 . The second conductive portion 16 has the base portion 161 and the tip portion 162 .

Referring to FIG. 17 , the first photoresist layer 30 is removed by stripping.

Referring to FIG. 18 , the second conductive portion 16 is etched again, so that the pointed portion 162 becomes sharper (that is, W ₁ becomes smaller).

However, the above-mentioned embodiments are only to illustrate the principles and effects of the present invention, not to limit the present invention. Therefore, those skilled in the art can modify and change the above embodiments without departing from the spirit of the present invention. The scope of rights of the present invention should be listed in the following claims.

Claims (23)

1. a semiconductor package, it comprises:

First substrate, it has conductive pad and multiple first conductive part on upper surface, multiple first substrate, and wherein said first conducting position is conductive pad on described first substrate;

Second substrate, it has conductive pad and multiple second conductive part under lower surface, multiple second substrate, the lower surface of described second substrate faced by the upper surface of wherein said first substrate, described second conducting position is conductive pad under described second substrate, and at least partly described second conducting position in the groove of described first conductive part, or at least partly described first conducting position in the groove of described second conductive part;

Nude film, it is electrically connected to the upper surface of described first substrate; And

Clad material, between the lower surface of its upper surface at described first substrate and described second substrate, and coated described nude film, described first conductive part and described second conductive part.

2. semiconductor package according to claim 1, wherein said clad material adheres to the upper surface of described first substrate and the lower surface of described second substrate.

3. semiconductor package according to claim 2, the adhesion between the upper surface of wherein said clad material and described first substrate is approximately identical to the adhesion between the lower surface of described clad material and described second substrate.

4. semiconductor package according to claim 1, the groove of wherein said first conductive part defined by described described second conductive part at least partly, or the groove of described second conductive part defined by described described first conductive part at least partly.

5. semiconductor package according to claim 1, wherein said second conductive part is cylinder, and described first conductive part is soldered ball, and described second conductive part has tip, and at least part of described tip is positioned at the groove of described first conductive part.

6. semiconductor package according to claim 5, wherein said second conductive part has more base portion, and described tip is positioned on described base portion.

7. semiconductor package according to claim 6, described second conductive part has maximum height H, and described base portion has height h ₁, h ₁≤ H/2.

8. semiconductor package according to claim 5, wherein said tip has first end and the second end, and described first end is relatively described second end, and the width of described tip is successively decreased to described second end by described first end.

9. semiconductor package according to claim 5, wherein said second conductive part has maximum height H, and described tip has height h ₂, h ₂≤ H/2.

10. semiconductor package according to claim 8, wherein said second conductive part has Breadth Maximum W, and described second end of described tip has width W ₁, 0≤W ₁<W/2.

11. semiconductor packages according to claim 5, the first conductive part described in wherein said tip contacts and form contact site, described contact site has height h ₃, described tip has height h ₂, h ₃≤ h ₂/ 3.

12. semiconductor packages according to claim 5, contact site is formed in first conductive part described in wherein said tip contacts, the described clad material of part remains in described contact site and forms cull, described contact site can divide into Part I and Part II, described Part I comprises the second end of described tip, described Part II is away from the second end of described tip, and the thickness being attached to the cull of described Part II is greater than the thickness of the cull being attached to described Part I.

13. semiconductor packages according to claim 12, wherein said contact site has height h ₃, the height of described Part I is h ₃half, and the height of described Part II is h ₃half.

14. semiconductor packages according to claim 5, contact site is formed in first conductive part described in wherein said tip contacts, described contact site can divide into Part I and Part II, described Part I comprises the second end of described tip, described Part II is away from the second end of described tip, form interface metal Compound I MC between described tip and described first conductive part, and the thickness being positioned at the interface metal compound of described Part I is greater than the thickness of the interface metal compound being positioned at described Part II.

15. semiconductor packages according to claim 1, wherein said clad material is non-conductive film NCF, non-conductive adhesive NCP or ABF Ajinomoto Build-up Film.

16. 1 kinds of semiconductor technologies, it comprises following steps:

A nude film is electrically connected to the upper surface of the first substrate by (), wherein said first substrate has more conductive pad on multiple first substrate, and it is revealed in the upper surface of described first substrate;

B () forms multiple first conductive part on described first substrate on conductive pad;

C () applies the upper surface of clad material in described first substrate with coated described nude film and described first conductive part, wherein said clad material is second rank glue materials;

D () is formed and is multiplely opened on described clad material to appear described first conductive part;

E () pressing second substrate is on described clad material, the lower surface of described second substrate is made to adhere on described clad material, wherein said second substrate has more conductive pad and multiple second conductive part under multiple second substrate, under wherein said second substrate, conductive pad is revealed in the lower surface of described second substrate, described second conducting position is under described second substrate on conductive pad, and described second conductive part inserts in described first conductive part, or described first conductive part inserts in described second conductive part; And

F () carries out heating steps, make described clad material be solidified into the third rank glue material.

17. semiconductor technology according to claim 16, wherein in step (a), described first substrate has more conductive pad under lower surface and multiple first substrate, and under described first substrate, conductive pad is revealed in described first substrate lower surface; More comprise after described step (f):

G () forms multiple lower soldered ball under described first substrate on conductive pad;

H () carries out reflow; And

I () cuts, to form multiple semiconductor package.

18. semiconductor technology according to claim 16, in wherein said step (b), described first conductive part is soldered ball, in described step (e), described second conductive part is cylinder, and described second conductive part has tip, and described tip is inserted in described first conductive part.

19. semiconductor technologies according to claim 18, wherein said tip has first end and the second end, and described first end is relatively described second end, and the width of described tip is successively decreased to described second end by described first end.

20. semiconductor technology according to claim 19, wherein said second conductive part has more base portion, and described tip is positioned on described base portion.

21. semiconductor technologies according to claim 18, in wherein said step (e), described tip is inserted in described first conductive part and forms contact site, and described contact site has height h ₃, described tip has height h ₂, h ₃≤ h ₂/ 3.

22. semiconductor technologies according to claim 18, in wherein said step (d), the described clad material of part can remain on described first conductive part and form cull; In described step (e), described tip is inserted in described first conductive part and forms contact site, the described cull of part can be positioned at described contact site, described contact site can divide into Part I and Part II, described Part I comprises the second end of described tip, described Part II is away from the second end of described tip, and the thickness being attached to the cull of described Part II is greater than the thickness of the cull being attached to described Part I.

23. semiconductor technologies according to claim 18, in wherein said step (e), described tip is inserted in described first conductive part and forms contact site, described contact site can divide into Part I and Part II, described Part I comprises the second end of described tip, and described Part II is away from the second end of described tip; In described step (f), between described tip and described first conductive part, form interface metal Compound I MC, and the thickness being positioned at the interface metal compound of described Part I is greater than the thickness of the interface metal compounds content being positioned at described Part II.