CN202903860U - Differential signal detection apparatus - Google Patents

Differential signal detection apparatus Download PDF

Info

Publication number
CN202903860U
CN202903860U CN 201220583714 CN201220583714U CN202903860U CN 202903860 U CN202903860 U CN 202903860U CN 201220583714 CN201220583714 CN 201220583714 CN 201220583714 U CN201220583714 U CN 201220583714U CN 202903860 U CN202903860 U CN 202903860U
Authority
CN
China
Prior art keywords
amplifier
output
differential signal
signal
threshold voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn - After Issue
Application number
CN 201220583714
Other languages
Chinese (zh)
Inventor
范方平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IPGoal Microelectronics Sichuan Co Ltd
Original Assignee
IPGoal Microelectronics Sichuan Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IPGoal Microelectronics Sichuan Co Ltd filed Critical IPGoal Microelectronics Sichuan Co Ltd
Priority to CN 201220583714 priority Critical patent/CN202903860U/en
Application granted granted Critical
Publication of CN202903860U publication Critical patent/CN202903860U/en
Anticipated expiration legal-status Critical
Withdrawn - After Issue legal-status Critical Current

Links

Images

Landscapes

  • Amplifiers (AREA)

Abstract

The utility model discloses a differential signal detection apparatus. The apparatus comprises a secondary amplifier, a prepositive receiver and a final amplifier, wherein the prepositive receiver and the final amplifier are connected with the secondary amplifier, and the final amplifier is also connected with a signal output device; the prepositive receiver receives two differential signals and a reference threshold voltage which are input from the external, and performs differential conversion on the two differential signals; the secondary amplifier receives and amplifies signals output by the prepositive receiver and outputs signals amplified again; the final amplifier performs differential amplification on the signals output by the secondary amplifier and outputs two differentiated signals; and the signal output device receives the two differentiated signals output by the final amplifier, and outputs the two differentiated signals after logical combination. The differential signal detection apparatus is advantageous in that the amplitude of a high-speed differential signal can be accurately detected, and the detection threshold of the high-speed differential signal can be changed by changing the reference threshold voltage, providing high flexibility.

Description

The differential signal pick-up unit
Technical field
The utility model relates to the input field, relates more specifically to a kind of differential signal pick-up unit.
Background technology
The differential signal pick-up unit is used for differential signal is detected.Well-known, the equipment owing to physical connection in the differential signal pick-up unit can be introduced noise, thereby affects the reception of signal receiver.Usually, for noise is filtered, need to carry out threshold test to differential signal, when namely only having the threshold value that the amplitude of differential signal surpass to set, just signal is considered to effectively could normally be received; And when the amplitude of differential signal was lower than the threshold value of setting, it is invalid that signal is considered to, and can not be received by the receiver.
In the prior art, the differential signal pick-up unit can't carry out high-precision detection to the amplitude of high-speed differential signal (high-speed differential signal refers to that the frequency of differential signal is more than Gigahertz), can not satisfy simultaneously high precision and requirement at a high speed; Usually in order to satisfy requirement at a high speed, need to sacrifice the precision that detects.
Therefore, be necessary to provide a kind of improved differential signal pick-up unit to overcome defects.
The utility model content
The purpose of this utility model provides a kind of differential signal pick-up unit, differential signal pick-up unit of the present utility model can detect accurately to the amplitude of high-speed differential signal, and can change by changing the reference valve threshold voltage detection threshold of high-speed differential signal, have very large dirigibility.
For achieving the above object, the utility model provides a kind of differential signal pick-up unit, it comprise level amplifier and respectively be connected preposition receiver and the output amplifier that secondary amplifier connects, described output amplifier also with is connected signal output device and connects; Described preposition receiver is the receiver of high bandwidth low gain, receive simultaneously two paths of differential signals and the reference valve threshold voltage of outside input, described preposition receiver amplifies two paths of differential signals and the reference valve threshold voltage of outside input simultaneously, and to the two paths of differential signals of outside input carry out the two paths of differential signals after output is amplified after the differential conversion and amplify after the reference valve threshold voltage; Described secondary amplifier is the amplifier that gains in the high bandwidth, and described secondary amplifier receives and amplify reference valve threshold voltage and the two paths of differential signals of described preposition receiver output, and two paths of differential signals and the reference valve threshold voltage of output after again amplifying; Described output amplifier is the amplifier of low bandwidth high-gain, and described output amplifier carries out differential amplification with the two paths of differential signals of secondary amplifier output respectively with the reference valve threshold voltage of described secondary amplifier output, and the output two-way is through differentiated signal; Described signal output device receives the signal behind the two-pass DINSAR of described output amplifier output, and after the signal behind this two-pass DINSAR carried out logical combination, will meet the signal output of designing requirement.
Preferably, described preposition receiver has three output ports, and described three output ports are respectively in order to the reference valve threshold voltage of output after the two paths of differential signals behind the described preposition receiver differential amplification and amplification.
Preferably, described secondary amplifier comprises first level amplifier and second subprime amplifier, and described first level amplifier and second subprime amplifier all have two input ends and two output terminals.
Preferably, two input ends of described first level amplifier respectively be connected two output terminals of preposition receiver and connect, its two output terminal be connected output amplifier and connect, described first level amplifier receives one road differential signal and the reference valve threshold voltage of described preposition receiver output, and the road differential signal that receives and reference valve threshold voltage are amplified simultaneously and export described output amplifier to through two output terminal.
Preferably, two input ends of described second subprime amplifier respectively be connected two output terminals of preposition receiver and connect, its two output terminal be connected the second output amplifier and connect, described second subprime amplifier receives another road differential signal and the reference valve threshold voltage of described preposition receiver output, and to another road differential signal of receiving with the reference valve threshold voltage amplifies simultaneously and export described the second output amplifier to through two output terminal.
Preferably, described first level amplifier comprises the first one-level amplifier and the first two-stage amplifier, described the first one-level amplifier and the first two-stage amplifier all have two input ends and two output terminals, and two input ends of described the first one-level amplifier be connected two output terminals of preposition receiver and connect, its two output terminal be connected the input end of the first two-stage amplifier and connect, two output terminals of described the first two-stage amplifier be connected output amplifier and connect, and described the first one-level amplifier and the first two-stage amplifier carry out two-stage to one road differential signal of described preposition receiver output and reference valve threshold voltage successively and amplify.
Preferably, described second subprime amplifier comprises the second one-level amplifier and the second two-stage amplifier, described the second one-level amplifier and the second two-stage amplifier all have two input ends and two output terminals, and two input ends of described the second one-level amplifier be connected two output terminals of preposition receiver and connect, its two output terminal be connected the input end of the second two-stage amplifier and connect, two output terminals of described the second two-stage amplifier be connected output amplifier and connect, and described the second one-level amplifier and the second two-stage amplifier carry out two-stage to another road differential signal of described preposition receiver output and reference valve threshold voltage successively and amplify.
Preferably, described output amplifier comprises the first output amplifier and the second output amplifier, and described the first output amplifier and the second output amplifier all have two input ends and an output terminal, two input ends of described the first output amplifier be connected two output terminals of first level amplifier and connect, its output terminal is connected with signal output device, and described the first output amplifier receives differential signal and the reference valve threshold voltage of described first level amplifier output, and differential signal and the reference valve threshold voltage that receives carried out differential amplification, and export one road differential signal; Two input ends of described the second output amplifier be connected two output terminals of second subprime amplifier and connect, its output terminal is connected with signal output device, and described the second output amplifier receives differential signal and the reference valve threshold voltage of described second subprime amplifier output, and differential signal and the reference valve threshold voltage that receives carried out differential amplification, and export one road differential signal.
Preferably, described signal output device is and gate circuit or OR circuit, and described two input ends of being connected OR circuit with gate circuit respectively be connected the output terminal connection of output terminal and the second output amplifier of the first output amplifier.
Be compared with existing technology, differential signal pick-up unit of the present utility model is because the receiver that described preposition receiver is high bandwidth low gain, described secondary amplifier is the amplifier that gains in the high bandwidth, described output amplifier is the amplifier of low bandwidth high-gain, so that differential signal pick-up unit of the present utility model can effective and undamped ground receive high-speed differential, and the high-speed differential signal after receiving is carried out differential amplification export, simultaneously the reference valve threshold voltage of input amplified, so that the amplitude difference between high-speed differential signal and the reference valve threshold voltage is also amplified by equal proportion, thereby can detect exactly the amplitude difference between high-speed differential signal and the reference valve threshold voltage, improve high-speed differential signal amplitude detection precision; And can change by changing the reference valve threshold voltage detection threshold of high-speed differential signal, improve the use dirigibility that whole differential signal pick-up unit detects high-speed differential signal.
By following description also by reference to the accompanying drawings, it is more clear that the utility model will become, and these accompanying drawings are used for explaining the utility model.
Description of drawings
Fig. 1 is the structured flowchart of the utility model signal supervisory instrument.
Fig. 2 is the circuit structure diagram of the utility model signal supervisory instrument.
Fig. 3 is the circuit theory diagrams of the utility model signal supervisory instrument.
Embodiment
With reference now to accompanying drawing, describe embodiment of the present utility model, similar element numbers represents similar element in the accompanying drawing.As mentioned above, the utility model provides a kind of differential signal pick-up unit, differential signal pick-up unit of the present utility model can detect accurately to the amplitude of high-speed differential signal, and can change by changing the reference valve threshold voltage detection threshold of high-speed differential signal, have very large dirigibility.
Please refer to Fig. 1, Fig. 1 is the structured flowchart of the utility model signal supervisory instrument.As shown in the figure, signal supervisory instrument of the present utility model comprises preposition receiver, secondary amplifier, output amplifier and signal output device; Wherein, described preposition receiver is the high bandwidth low gain receiver, receive simultaneously two paths of differential signals and the reference valve threshold voltage of outside input, and the differential signal that described preposition receiver receives is high-speed differential signal, that is to say that the frequency of two paths of differential signals is more than Gigahertz, described preposition receiver amplifies two paths of differential signals and reference valve threshold voltage simultaneously, and to two paths of differential signals carry out output two paths of differential signals after the differential conversion and amplify after the reference valve threshold voltage; Described secondary amplifier is the amplifier that gains in the high bandwidth, and described secondary amplifier receives and amplify reference valve threshold voltage and the two paths of differential signals of described preposition receiver output, and two paths of differential signals and the reference valve threshold voltage of output after again amplifying; Described output amplifier is the amplifier of low bandwidth high-gain, and described output amplifier carries out differential amplification with the two paths of differential signals of secondary amplifier output respectively with the reference valve threshold voltage of described secondary amplifier output, and the output two-way is through differentiated signal; Thereby described output amplifier compares amplitude and the described reference valve threshold voltage of differential signal, and when the amplitude of differential signal during less than described reference valve threshold voltage, constant high level or the low level of described intermediate amplifier output, and when the amplitude of differential signal during greater than described reference valve threshold voltage, described intermediate amplifier is exported described differential signal, thereby realizes the high-speed differential signal of input is carried out amplitude detection and selects output; Described signal output device receives the signal behind the two-pass DINSAR of described output amplifier output, and after the signal behind this two-pass DINSAR carried out logical combination, will meet the signal output of designing requirement.
Please combination is with reference to figure 2 again, and Fig. 2 is the circuit structure diagram of the utility model differential signal pick-up unit.Described preposition receiver PRE_RCV has three receiving ends and three output terminals, because described preposition receiver PRE_RCV is the high bandwidth low gain receiver, thereby the high-speed differential signal Vin of outside input and Vip and reference valve threshold voltage Vref input described preposition receiver PRE_RCV by three receiving ends of described preposition receiver PRE_RCV respectively undampedly; Described preposition receiver PRE_RCV carries out differential amplification to high-speed differential signal Vin and the Vip of input, described preposition receiver PRE_RCV carries out exporting difference Von and Vop behind the differential amplification to high-speed differential signal Vin and Vip particularly, Von=A1(Vin-Vip wherein), described signal Vop=A1(Vip – Vin), A1 is the DC current gain of preposition receiver PRE_RCV, that is to say that described preposition receiver PRE_RCV detects the differential amplitude of high-speed differential signal Vin and Vip; Correspondingly, described reference valve threshold voltage Vref passes through identical path with high-speed differential signal Vin and Vip in described preposition receiver PRE_RCV, also namely amplify with described signal Vin-Vip and Vip – Vin equal proportion ground, i.e. reference valve threshold voltage Vof=A1*Vref after the output; Described signal Von, Vop and Vof export described secondary amplifier to by three output terminals of described preposition receiver PRE_RCV respectively.
Described secondary amplifier comprises first level amplifier SEC_APM1 and second subprime amplifier SEC_APM2; Described first level amplifier SEC_APM1 is the amplifier that gains in the high bandwidth, thus receive high-speed differential and high-speed differential signal amplified effectively; Described first level amplifier SEC_APM1 has two input ends and two output terminals, its two input end respectively be connected two output terminals of preposition receiver PRE_RCV and connect, receiving signal Von and the Vof of described preposition receiver PRE_RCV output, its two output terminal respectively be connected output amplifier and connect; Described first level amplifier SEC_APM1 amplifies signal Von and the Vof that receives, and by signal V12a and V12b after its two output terminals output amplification; V12a=A2*Von wherein, V12b=A2*Vof, A2 are the DC current gain of described first level amplifier SEC_APM1, amplify thereby described first level amplifier SEC_APM1 carries out equal proportion to signal Von and Vof.In preferred implementation of the present utility model, described first level amplifier SEC_APM1 and second subprime amplifier SEC_APM2 have identical structure Te Tezheng and function, no longer structure and the function of second subprime amplifier SEC_APM2 are described in detail at this; Signal Vop and Vof input to two input ends of described second subprime amplifier SEC_APM2, and after amplifying two output terminals output V22a and the V22b by described second subprime amplifier SEC_APM2, V22a=A2*Vop wherein, V22b=A2*Vof.
Described output amplifier comprises the first output amplifier BAK_AMP1 and the second output amplifier BAK_AMP2; Described the first output amplifier BAK_AMP1 is the amplifier of low bandwidth high-gain, thus receive high-speed differential and high-speed differential signal amplified effectively; Described the first output amplifier BAK_AMP1 has two input ends and an output terminal, and two input end respectively be connected two output terminals of first level amplifier SEC_APM1 and connect, to receive signal V12a and V12b, its output terminal is connected with signal output device OUT; Described the first output amplifier BAK_AMP1 carries out differential amplification and passes through its output terminal output signal Vout1, wherein Vout1=A3(V12b-V12a signal V12a and the V12b that receives), A3 is the DC current gain of described the first output amplifier BAK_AMP1; From the above, signal Vout1 is high-speed differential signal Vin and Vip and the signal of reference valve threshold voltage Vref through exporting after repeatedly amplification is changed of outside input, its amplitude is far longer than the amplitude of signal Vin and Vip, thereby with respect to signal Vin and Vip, described signal Vout1 is easier to detect, that is to say, differential amplitude between the high-speed differential signal can be detected exactly by differential signal pick-up unit of the present utility model, realized the high-speed differential signal amplitude is detected accurately.Particularly, as V12b-V12a〉0 the time, the amplitude of high-speed differential signal Vin and Vip that then illustrates is greater than standard valve threshold voltage Vref, and namely high-speed differential signal Vin and the Vip of input are useful signal, and this moment, Vout1 was characterized by normal signal output; When V12b-V12a≤0, the amplitude of high-speed differential signal Vin and Vip that then illustrates is less than standard valve threshold voltage Vref, and namely high-speed differential signal Vin and the Vip of input are invalid signals, and this moment, Vout1 was characterized by constant high level or low level.In preferred implementation of the present utility model, described the first output amplifier BAK_AMP1 has identical architectural feature and function with the second output amplifier BAK_AMP2, no longer structure and the function of described the second output amplifier BAK_AMP2 is elaborated at this; Two input ends of described the second output amplifier BAK_AMP2 receive signal V22a and V22b, and this two signal is carried out differential amplification, and by its output terminal output signal Vout2, wherein Vout2=A3(V22b-V22a); As V22b-V22a〉0 the time, the high-speed differential signal Vin of input and Vip are useful signal, Vout2 is characterized by normal signal output; When V22b-V22a≤0, high-speed differential signal Vin and the Vip of input are invalid signals, and Vout2 is characterized by constant high level or low level.In said process, the two paths of differential signals that described output amplifier will be exported after described secondary amplifier amplifies is carried out differential amplification output with the reference valve threshold voltage respectively, whether meet designing requirement with the amplitude that detects two paths of differential signals V12a and V22a with respect to reference valve threshold voltage V12b or V22b, whether the two-way high-speed differential signal Vin and the Vip that also namely detect outside input be effective; When the amplitude of two paths of differential signals V12a and V22a does not meet designing requirement, described output amplifier is not then exported corresponding differential signal, on the contrary, when the amplitude of two paths of differential signals V12a and V22a met designing requirement, described output amplifier is normal output difference sub-signal then; Thereby described output amplifier detects by the amplitude of differential signal to input, and according to the output of testing result control differential signal, only exports effective differential signal, has realized the high-precision detection to the high-speed differential signal of outside input.
Described signal output device OUT has two input ends and an output terminal, two input ends of described signal output device OUT respectively be connected the first output amplifier BAK_AMP1 be connected the output terminal of output amplifier BAK_AMP2 and connect, to receive the two paths of differential signals of described output amplifier output, and this two paths of signals carried out making up will meet the signal output of designing requirement, that is to say that output amplitude meets the differential signal of designing requirement with respect to the reference valve threshold voltage.Wherein, described signal output device OUT is and gate circuit or OR circuit, and the concrete logic circuit structure of described signal output device OUT is selected to determine according to the characteristic features of the signal of described output amplifier output; For example, when V12b-V12a≤0 or V22b-V22a≤0, when Vout1 or Vout2 were characterized by constant low level, described signal output device OUT was OR circuit; On the contrary, when V12b-V12a≤0 or V22b-V22a≤0, when Vout1 or Vout2 were characterized by constant high level, described signal output device OUT was and gate circuit.
Please combination is with reference to figure 3 again, and Fig. 3 is the circuit theory diagrams of the utility model signal supervisory instrument.As shown in the figure, described preposition receiver PRE_RCV comprises field effect transistor Mn1a, field effect Mn1b, field effect Mn2a, field effect Mn2b, field effect Mp1a, field effect Mp1b, field effect Mp2a, field effect Mp2b, current source I1 and current source I2; Wherein, high-speed differential signal Vin is from the grid input of described field effect transistor Mn1a, and high speed signal Vip inputs to described preposition receiver PRE_RCV from the grid of described field effect Mn1br, and described reference valve threshold voltage Vref is from the grid input of described field effect Mn2a and field effect Mn2b; Differential signal Von is through grid and the drain electrode output of described field effect Mp1a, and differential signal Vop is through grid and the drain electrode output of described field effect Mp1b, and reference valve threshold voltage Vof is through grid and the drain electrode output of described field effect Mp2b.Described first level amplifier SEC_APM1 comprises the first one-level amplifier and the first two-stage amplifier, described the first one-level amplifier comprises resistance R 1, resistance R 2, resistance R 3, field effect transistor M1a, field effect transistor M1b and current source I4, differential signal Von is from the grid input of described field effect transistor M1a, and reference valve threshold voltage Vof is from the grid input of described field effect transistor M1b; Thereby described the first one-level amplifier carries out the one-level amplification and exports described the first two-stage amplifier to signal Von and Vof.Described the first two-stage amplifier comprises resistance R 4, resistance R 5, resistance R 6, field effect transistor M2a, field effect transistor M2b and current source I5, and described the first two-stage amplifier and the first one-level amplifier have identical structure and function, differential signal V12a after the drain electrode output of described field effect transistor M2a is amplified by described the first two-stage amplifier, after the drain electrode of described field effect transistor M2b output is amplified by described the first two-stage amplifier reference valve threshold voltage V12b, and described signal V12b and V12a are input to respectively described output amplifier; Thereby described first level amplifier SEC_APM1 carries out two-stage amplification output, output difference sub-signal V12a and reference valve threshold voltage V12b to the road differential signal Von and the reference valve threshold voltage Vof that receive through described preposition receiver PRE_RCV and carry out after differential amplification is exported.In preferred implementation of the present utility model, described second subprime amplifier SEC_APM2 has and described first identical architectural feature of level amplifier SEC_APM1 and function, at this, described second subprime amplifier SEC_APM2 is not described in detail; Described second subprime amplifier SEC_APM2 comprises the second one-level amplifier and the second two-stage amplifier, and described the second one-level amplifier comprises resistance R 7, resistance R 8, resistance R 9, field effect transistor M4a, field effect transistor M4b and current source I7; Described the second two-stage amplifier comprises resistance R 10, resistance R 11, resistance R 12, field effect transistor M5a, field effect transistor M5b and current source I8; The effect of described second subprime amplifier SEC_APM2 is that signal Vop and Vof are carried out the two-stage amplification, and differential signal V22a and the reference valve threshold voltage V22b of output after amplifying.Described output amplifier comprises the first output amplifier BAK_AMP1 and the second output amplifier BAK_AMP2; Described the first output amplifier BAK_AMP1 comprises field effect transistor M3a, field effect transistor M3b, field effect transistor Mp1, field effect transistor Mp2 and current source I6, the grid of described differential signal V12a by described field effect transistor M3a input to described the first output amplifier BAK_AMP1, and described reference valve threshold voltage V12b inputs to described the first output amplifier BAK_AMP1 by the grid of described field effect transistor M3b, described the first output amplifier BAK_AMP1 carries out differential amplification to described signal V12b and V12a, and the signal Vout1 behind the output differential amplification, and Vout1=A3(V12b-V12a), the size of described signal Vout1 has been reacted the differential amplitude of described differential signal Vin and Vip and the relation between the reference valve threshold voltage Vref, when V12b-V12a≤0, the differential signal Vin and the Vip that then show input are invalid signal, Vout1 is characterized by the constant high level of no signal, as V12b-V12a〉0 the time, the differential signal Vin and the Vip that then show input are effective differential signal, and Vout1 is characterized by normal signal output.Described the first output amplifier BAK_AMP1 and the second output amplifier BAK_AMP2 have identical architectural feature and function; And described the second output amplifier BAK_AMP2 comprises field effect transistor M6a, field effect transistor M6b, field effect transistor Mp3, field effect transistor Mp4 and current source I9; Described the second output amplifier BAK_AMP2 carries out differential amplification to differential signal V22a and the reference valve threshold voltage V22b of input, and the signal Vout2 behind the output differential amplification, wherein, the sign of described signal Vout2 and signal Vout1 are identical, no longer carefully state at this.From the above, when V12b-V12a≤0 or V22b-V22a≤0, described signal Vout1 and Vout2 correspondence are characterized by high level; Therefore in preferential embodiment of the present utility model, described signal output device OUT be and gate circuit, and describedly comprises field effect transistor Mn1, field effect transistor Mn2, field effect transistor Mn3, field effect transistor Mp5, field effect transistor Mp6 and field effect transistor Mp7 with gate circuit; Described and the described signal Vout1 of goalkeeper and Vout2 carry out logic and and final output signal Vout.The annexation of each parts of the utility model differential signal pick-up unit is not described in detail at this specifically as shown in Figure 3.
The principle of work of the utility model signal supervisory instrument is described below in conjunction with Fig. 1-3:
In described preposition receiver PRE_RCV, DC current gain: A1=gmn/gmp, wherein gmn=gmn1=gmn1b=gmn2a=gmn2b, and gmn1, gmn1b, gmn2a, gmn2b are respectively the small-signal transconductance of corresponding N-type field effect transistor Mn1a, Mn1b, Mn2a, Mn2b; Gmp=gmp1a=gmp1b=gmp2a=gmp2b, and gmp1a, gmp1b, gmp2a, gmp2b are respectively the small-signal transconductance of corresponding P type field effect transistor Mp1a, Mp1b, Mp2a, Mp2b; As everyone knows, the mutual conductance of N-type field effect transistor only is slightly larger than the mutual conductance of P type field effect transistor, that is to say that gmn is slightly larger than gmp, and namely so that the value of DC current gain A1 is less than normal, thereby described preposition receiver PRE_RCV has low gain;
AC characteristic: p1=gmp/C1, wherein C1 is the equivalent capacity of preposition receiver PRE_RCV output terminal, p1 is the limit of preposition receiver PRE_RCV output terminal; Mutual conductance gmp is larger as everyone knows, and C1 is less, thereby limit p1 is larger, thereby described preposition receiver PRE_RCV has high bandwidth.
In described first level amplifier SEC_APM1 and second subprime amplifier SEC_APM2k, because first level amplifier SEC_APM1 is identical with architectural feature and the function of second subprime amplifier SEC_APM2r, only describes described first level amplifier SEC_APM1 at this.
DC current gain: A2=(gm2*R) 2Gm2=gm1a=gm1b=gm2a=gm2b=gm4a=gm4b=gm5a=gm5b wherein, and gm1a, gm1b, gm2a, gm2b, gm4a, gm4b, gm5a, gm5b are respectively the small-signal transconductance of field effect transistor M1a, M1b, M2a, M2b, M4a, M4b, M5a, M5b, R is the resistance of resistance R 1, R2, R4, R5, R7, R8, R10, R11, be R=R1=R2=R4=R5=R7=R8=R10=R11, the value of R is less in actual use, less than 5K Ω, so that the value of A2 is not too large, thereby described first level amplifier SEC_APM1 namely has medium gain;
AC characteristic: p2=1/ (R*C2), wherein C2 is the equivalent capacity of first level amplifier SEC_APM1 output terminal, p2 is the limit of first level amplifier SEC_APM1 output terminal, because R is less and C2 is less, as seen limit p2 is all larger, and namely described first level amplifier SEC_APM1 has high bandwidth; Setting p3 is the limit of second subprime amplifier SEC_APM2 output terminal, because p2, p3 overlap, namely whole secondary amplifier has filter action, can decay rapidly greater than the noise of signal frequency.
In described first level amplifier SEC_APM1 and second subprime amplifier SEC_APM2, because described first level amplifier SEC_APM1 is identical with architectural feature and the function of second subprime amplifier SEC_APM2, only describes level amplifier SEC_APM1 first time at this.
DC current gain: A3=gm3* (ron ∥ rop), gm3=gm3a=gm3b=gm6a=gm6b wherein, gm3a, gm3b, gm6a, gm6b are the small-signal transconductance of field effect transistor M3a, M3b, M6a, M6b, rop is the small-signal resistance of field effect transistor Mp2, Mp4, and ron is the small-signal resistance of field effect transistor M3b, M6b; And ron, rop are usually larger, and generally greater than 100K Ω, so that DC current gain A3 is larger, namely described first level amplifier SEC_APM1 has high-gain;
AC characteristic: p4=1/ (C3* (ron ∥ rop)), wherein C3 is the equivalent capacity of first level amplifier SEC_APM1 output terminal, p4 is the limit of first level amplifier SEC_APM1 output terminal, because ron, rop are larger, therefore limit p4 is less, namely described first level amplifier SEC_APM1 has low bandwidth.
Abovely in conjunction with most preferred embodiment the utility model is described, but the utility model is not limited to the embodiment of above announcement, and should contains various modification, equivalent combinations of carrying out according to essence of the present utility model.

Claims (9)

1. a differential signal pick-up unit is characterized in that, comprise level amplifier and respectively be connected preposition receiver and the output amplifier that secondary amplifier connects, described output amplifier also with is connected signal output device and connects; Described preposition receiver is the receiver of high bandwidth low gain, receive simultaneously two paths of differential signals and the reference valve threshold voltage of outside input, described preposition receiver amplifies two paths of differential signals and the reference valve threshold voltage of outside input simultaneously, and to the two paths of differential signals of outside input carry out the two paths of differential signals after output is amplified after the differential conversion and amplify after the reference valve threshold voltage; Described secondary amplifier is the amplifier that gains in the high bandwidth, and described secondary amplifier receives and amplify reference valve threshold voltage and the two paths of differential signals of described preposition receiver output, and two paths of differential signals and the reference valve threshold voltage of output after again amplifying; Described output amplifier is the amplifier of low bandwidth high-gain, and described output amplifier carries out differential amplification with the two paths of differential signals of secondary amplifier output respectively with the reference valve threshold voltage of described secondary amplifier output, and the output two-way is through differentiated signal; Described signal output device receives the signal behind the two-pass DINSAR of described output amplifier output, and after the signal behind this two-pass DINSAR carried out logical combination, will meet the signal output of designing requirement.
2. differential signal pick-up unit as claimed in claim 1, it is characterized in that, described preposition receiver has three output ports, and described three output ports are respectively in order to the reference valve threshold voltage of output after the two paths of differential signals behind the described preposition receiver differential amplification and amplification.
3. differential signal pick-up unit as claimed in claim 2, it is characterized in that, described secondary amplifier comprises first level amplifier and second subprime amplifier, and described first level amplifier and second subprime amplifier all have two input ends and two output terminals.
4. differential signal pick-up unit as claimed in claim 3, it is characterized in that, two input ends of described first level amplifier respectively be connected two output terminals of preposition receiver and connect, its two output terminal be connected output amplifier and connect, described first level amplifier receives one road differential signal and the reference valve threshold voltage of described preposition receiver output, and the road differential signal that receives and reference valve threshold voltage are amplified simultaneously and export described output amplifier to through two output terminal.
5. differential signal pick-up unit as claimed in claim 4, it is characterized in that, two input ends of described second subprime amplifier respectively be connected two output terminals of preposition receiver and connect, its two output terminal be connected output amplifier and connect, described second subprime amplifier receives another road differential signal and the reference valve threshold voltage of described preposition receiver output, and another road differential signal of receiving and reference valve threshold voltage are amplified simultaneously and export described output amplifier to through two output terminal.
6. differential signal pick-up unit as claimed in claim 4, it is characterized in that, described first level amplifier comprises the first one-level amplifier and the first two-stage amplifier, described the first one-level amplifier and the first two-stage amplifier all have two input ends and two output terminals, and two input ends of described the first one-level amplifier be connected two output terminals of preposition receiver and connect, its two output terminal be connected the input end of the first two-stage amplifier and connect, two output terminals of described the first two-stage amplifier be connected output amplifier and connect, and described first order amplifier and the first two-stage amplifier carry out two-stage to one road differential signal of described preposition receiver output and reference valve threshold voltage successively and amplify.
7. differential signal pick-up unit as claimed in claim 5, it is characterized in that, described second subprime amplifier comprises the second one-level amplifier and the second two-stage amplifier, described the second one-level amplifier and the second two-stage amplifier all have two input ends and two output terminals, and two input ends of described the second one-level amplifier be connected two output terminals of preposition receiver and connect, its two output terminal be connected the input end of the second two-stage amplifier and connect, two output terminals of described the second two-stage amplifier be connected output amplifier and connect, and described the second one-level amplifier and the second two-stage amplifier carry out two-stage to another road differential signal of described preposition receiver output and reference valve threshold voltage successively and amplify.
8. differential signal pick-up unit as claimed in claim 5, it is characterized in that, described output amplifier comprises the first output amplifier and the second output amplifier, and described the first output amplifier and the second output amplifier all have two input ends and an output terminal, two input ends of described the first output amplifier be connected two output terminals of first level amplifier and connect, its output terminal is connected with signal output device, and described the first output amplifier receives differential signal and the reference valve threshold voltage of described first level amplifier output, and differential signal and the reference valve threshold voltage that receives carried out differential amplification, and export one road differential signal; Two input ends of described the second output amplifier be connected two output terminals of second subprime amplifier and connect, its output terminal is connected with signal output device, and described the second output amplifier receives differential signal and the reference valve threshold voltage of described second subprime amplifier output, and differential signal and the reference valve threshold voltage that receives carried out differential amplification, and export one road differential signal.
9. differential signal pick-up unit as claimed in claim 8, it is characterized in that, described signal output device is and gate circuit or OR circuit, and described two input ends of being connected OR circuit with gate circuit respectively be connected the output terminal connection of output terminal and the second output amplifier of the first output amplifier.
CN 201220583714 2012-11-07 2012-11-07 Differential signal detection apparatus Withdrawn - After Issue CN202903860U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201220583714 CN202903860U (en) 2012-11-07 2012-11-07 Differential signal detection apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220583714 CN202903860U (en) 2012-11-07 2012-11-07 Differential signal detection apparatus

Publications (1)

Publication Number Publication Date
CN202903860U true CN202903860U (en) 2013-04-24

Family

ID=48124517

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201220583714 Withdrawn - After Issue CN202903860U (en) 2012-11-07 2012-11-07 Differential signal detection apparatus

Country Status (1)

Country Link
CN (1) CN202903860U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102944714A (en) * 2012-11-07 2013-02-27 四川和芯微电子股份有限公司 Differential signal detecting device
CN105652070A (en) * 2016-01-21 2016-06-08 烽火通信科技股份有限公司 Differential signal amplitude detection circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102944714A (en) * 2012-11-07 2013-02-27 四川和芯微电子股份有限公司 Differential signal detecting device
CN102944714B (en) * 2012-11-07 2015-07-08 四川和芯微电子股份有限公司 Differential signal detecting device
CN105652070A (en) * 2016-01-21 2016-06-08 烽火通信科技股份有限公司 Differential signal amplitude detection circuit
CN105652070B (en) * 2016-01-21 2018-11-30 烽火通信科技股份有限公司 A kind of differential signal amplitude detection circuit

Similar Documents

Publication Publication Date Title
CN101388651B (en) Receiver of high speed digital interface
CN100483989C (en) Multi-input variable gain amplifier
CN102288899A (en) Precise constant-current constant-voltage applying test circuit
CN102882526A (en) ADC (analog to digital converter) sampling circuit
CN101501975A (en) Low power wide dynamic range rms-to-dc converter
CN102435835A (en) Rms and envelope detector
CN102944714B (en) Differential signal detecting device
CN202903860U (en) Differential signal detection apparatus
CN103873032A (en) Rail to rail input hysteresis comparator
CN104748858A (en) InGaAs shortwave infrared detector signal processing system
CN102384999B (en) A kind of high-speed transmission event detection method and circuit
CN101626232A (en) High speed phase splitting circuit
WO2011140728A1 (en) Differential analog front end apparatus for low frequency signal detection and transmission system
CN114337557A (en) Differential signal amplifying circuit
CN206147611U (en) Bidirectional's low -speed signal amplitude detection circuitry
CN107222228A (en) Automatic gain control circuit and its control method, receiver
CN102749528B (en) High-speed signal detection circuit and system
CN104991599B (en) There is imbalance eliminate the photoelectric current monitoring circuit of function and apply the preamplifier of this monitoring circuit
CN106026938A (en) Fully differential comparator
CN102832956B (en) Envelope detector and correlation technique
CN103219960B (en) Amplifier and transceiver devices
EP3139502B1 (en) Single-ended to differential conversion circuit and signal processing module
CN202720278U (en) High speed signal detection circuit
CN204457763U (en) A kind of receiving circuit of three-component induction logging loop construction
CN100529675C (en) Double passage differential anti-jamming current amplification circuit

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee
CP02 Change in the address of a patent holder

Address after: 610041 Sichuan city of Chengdu province high tech Zone Kyrgyzstan Road 33 block A No. 9

Patentee after: IPGoal Microelectronics (Sichuan) Co., Ltd.

Address before: 402 room 7, building 610041, incubator Park, hi tech Zone, Sichuan, Chengdu

Patentee before: IPGoal Microelectronics (Sichuan) Co., Ltd.

AV01 Patent right actively abandoned

Granted publication date: 20130424

Effective date of abandoning: 20150708

RGAV Abandon patent right to avoid regrant