CN202838320U - Configurable Peripheral Component Interface Express (PCIE) 2.0 shifting serial port terminal - Google Patents
Configurable Peripheral Component Interface Express (PCIE) 2.0 shifting serial port terminal Download PDFInfo
- Publication number
- CN202838320U CN202838320U CN 201220526670 CN201220526670U CN202838320U CN 202838320 U CN202838320 U CN 202838320U CN 201220526670 CN201220526670 CN 201220526670 CN 201220526670 U CN201220526670 U CN 201220526670U CN 202838320 U CN202838320 U CN 202838320U
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- pcie
- interface
- serial port
- port terminal
- peripheral component
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- 230000002093 peripheral effect Effects 0.000 title abstract 2
- 238000004891 communication Methods 0.000 abstract description 8
- 230000005540 biological transmission Effects 0.000 abstract description 5
- 238000005516 engineering process Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
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Abstract
The utility model provides a configurable Peripheral Component Interface Express (PCIE) 2.0 shifting serial port terminal, and belongs to the field of data communication transmission. Structure of the PCIE 2.0 shifting serial port terminal comprises a PCIE 2.0 interface, a plurality of serial ports, and an Electrically Erasable Programmable Read-Only Memory (EEPROM) interface. PCIE 2.0 interface is connected with the EEPROM interface and the serial ports respectively. The PCIE 2.0 interface is provided with a configuration register. Compared with the prior art, the PCIE 2.0 shifting serial port terminal has the advantages of being reasonable in design, simple in structure, convenient to use, and capable of improving transmission speed and the like.
Description
Technical field
The utility model relates to the data communication field, and specifically a kind of configurable PCIE turns serial port terminal, has the configurable technical characterstic of number, pattern and baud rate of serial ports.
Background technology
Serial line interface refers to that the data step-by-step sequentially transmits, and its communication line is simple, only needs a pair of transmission line just can realize two-way communication, thereby greatly reduces cost.According to the direction of transfer of information, serial communication can be further divided into three kinds of single worker, half-duplex and full duplexs.Cost is low but transfer rate is slow, because its cheap cost often is applied to some in the not high equipment of data transmission rate request.
Summary of the invention
Technical assignment of the present utility model is for the deficiencies in the prior art, provides a kind of configurable PCIE2.0 reasonable in design, that transmission speed is high to turn serial port terminal.
The technical scheme that its technical matters that solves the utility model adopts is:
A kind of configurable PCIE2.0 turns serial port terminal, comprises PCIE2.0 interface and several serial ports, also comprises the EEPROM interface, and described PCIE2.0 interface is connected together with EEPROM interface, serial ports respectively, is provided with configuration register on the described PCIE2.0 interface.
PCI Express 2.0 standards are compared with 1.0 on data rate great upgrading, namely from before the 2.5Gbps bus frequency double to 5.0Gbps, this that is to say before PCI Express 2.0 x16 interfaces can be doubled the 10GB/s bus bandwidth (1GB/s=8Gbps) that reaches surprising.
Configurable PCIE2.0 of the present utility model turns serial port terminal compared with prior art, and the beneficial effect that produces is:
PCIE2.0 interface and serial ports are combined can the expanding system equipment of serial, solves the demand that some need a plurality of serial communication equipment, has greatly improved data rate.Terminal can change configuration according to user's demand, and it configures quantity, pattern and the baud rate of required serial ports by EEPROM.
Description of drawings
Accompanying drawing 1 is work structuring block diagram of the present utility model.
Embodiment
Below in conjunction with accompanying drawing the utility model is described in detail below.
As shown in drawings, configurable PCIE2.0 of the present utility model turns serial port terminal, its structure comprises PCIE2.0 interface and eight serial ports, also comprise the EEPROM interface, described PCIE2.0 interface is connected together with EEPROM interface, eight serial ports respectively, is provided with configuration register on the described PCIE2.0 interface.
The utility model mainly is data communication and the transfer rate coupling that realizes having multi-serial communication equipment.External input device can pass through RS-232, RS-485 and full serial ports, data is inputted configurable PCIE turn serial port terminal, finally transfers data on the mainboard.Otherwise also can be by terminal to equipment sending data by mainboard.
Except the described technical characterictic of instructions, be those skilled in the art's known technology.
Claims (1)
1. a configurable PCIE2.0 turns serial port terminal, comprise PCIE2.0 interface and several serial ports, characterized by further comprising the EEPROM interface, described PCIE2.0 interface is connected together with EEPROM interface, serial ports respectively, is provided with configuration register on the described PCIE2.0 interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220526670 CN202838320U (en) | 2012-10-16 | 2012-10-16 | Configurable Peripheral Component Interface Express (PCIE) 2.0 shifting serial port terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220526670 CN202838320U (en) | 2012-10-16 | 2012-10-16 | Configurable Peripheral Component Interface Express (PCIE) 2.0 shifting serial port terminal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202838320U true CN202838320U (en) | 2013-03-27 |
Family
ID=47949973
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220526670 Expired - Lifetime CN202838320U (en) | 2012-10-16 | 2012-10-16 | Configurable Peripheral Component Interface Express (PCIE) 2.0 shifting serial port terminal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202838320U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109359074A (en) * | 2018-09-30 | 2019-02-19 | 天津市英贝特航天科技有限公司 | A kind of PCIE signal expansion equipment and communication test method |
-
2012
- 2012-10-16 CN CN 201220526670 patent/CN202838320U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109359074A (en) * | 2018-09-30 | 2019-02-19 | 天津市英贝特航天科技有限公司 | A kind of PCIE signal expansion equipment and communication test method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130327 |
|
| CX01 | Expiry of patent term |