CN202772872U - Circuit design structure for scanning of keyboard and expansion reuse of IO port - Google Patents

Circuit design structure for scanning of keyboard and expansion reuse of IO port Download PDF

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Publication number
CN202772872U
CN202772872U CN201220424170.9U CN201220424170U CN202772872U CN 202772872 U CN202772872 U CN 202772872U CN 201220424170 U CN201220424170 U CN 201220424170U CN 202772872 U CN202772872 U CN 202772872U
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China
Prior art keywords
circuit design
design structure
keyboard
interface
latch
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Expired - Lifetime
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CN201220424170.9U
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Chinese (zh)
Inventor
江瑞峰
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Shanghai Yaohua Weighing System Co Ltd
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Shanghai Yaohua Weighing System Co Ltd
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Priority to CN201220424170.9U priority Critical patent/CN202772872U/en
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Abstract

The utility model discloses a circuit design structure for scanning of a keyboard and expansion reuse of an IO port. The circuit design structure comprises a processor, N row lines and M column lines, wherein the N row lines and the M column lines are in crossed connection. A crossed point between each N row line and each M column line is provided with a key, and all keys form an N*M matrix keyboard. The N row lines and the M column lines are respectively connected with an I/O port of the processor. The circuit design structure further comprises more than one latch. According to the circuit design structure, resources of the I/O port can be saved or expanded, flexibility of a system design is improved, the number of the keys that can be controlled simultaneously is high, and costs for controlling the keyboard are lowered.

Description

A kind of keyboard scan and the multiplexing circuit design structure of IO mouth expansion
Technical field
This product relates to a kind of keyboard equipment, particularly the multiplexing circuit design structure of a kind of keyboard scan and IO mouth expansion.
Background technology
In the application of microsystem, keyboard is the required modal input equipment of man-machine communication, and in recent years, the structure of microsystem gradually complicated, function gets more and more, and same microsystem uses the situation of a plurality of keyboards more and more simultaneously.At present, most popular on the market is matrix keyboard, the input/output interface (I/O interface) that matrix keyboard needs is many, in traditional N * N matrix keyboard, be provided with a line and an ordinate behind each button, each line or ordinate all will be connected with the input/output interface of controller, therefore, have N root line and N root ordinate in N * N matrix keyboard, at least 2 a N input/output interface need to be arranged, common controller, the number of pins of its chip is less, and the quantity of its I/O interface is fewer, and the number of the button that can control seldom, if and controller needs the I/O interface many, will inevitably cause the significantly rising of controller chip cost.
The utility model content
The purpose of this utility model is, provides the expansion of a kind of keyboard scan and IO mouth multiplexing circuit design structure, and the I/O interface that effectively solves the controller that exists in N * N matrix keyboard is not enough, and the number of control button is few, and production cost is crossed high problems.
For achieving the above object, the utility model provides following technical scheme:
A kind of keyboard scan and the multiplexing circuit design structure of IO mouth expansion, comprise processor and cross-coupled N root line and M root alignment, the place, crosspoint of each line and each alignment arranges a button, all buttons form one N * Metzler matrix keyboard, described N root line, described M root alignment are connected with the I/O interface of described processor respectively, also comprise more than one latch.
Described N root line respectively with the N of described latch the corresponding connection of parallel input interface, described M root alignment respectively with the M of described latch the corresponding connection of parallel input interface, each line is connected with a pull-up resistor, each pull-up resistor all with one on draw power supply to be connected.
The I/O interface of described processor respectively with the N of described latch the corresponding connection of parallel input interface, described N root line respectively with the corresponding connection of N parallel output interface of described latch.
Described N root line is connected with respectively an output interface.
Described M is natural number, and described N is natural number.
Described M equates with described N.
The utility model has the advantage of, provide the expansion of a kind of keyboard scan and IO mouth multiplexing circuit design structure, can save or the expansion I/O interface resource, improve the flexibility of system, the number that can control simultaneously button is many, has reduced the cost of Keyboard Control.
Description of drawings
Fig. 1 is the structural representation of the utility model embodiment 1;
Fig. 2 is the structural representation of the utility model embodiment 1;
Mark is as follows among the figure:
1, processor, 11, the I/O interface of processor,
2, line, 3, alignment, 4, button,
5, latch, 51, the parallel input interface of latch, 52, the parallel output interface of latch,
6, pull-up resistor, 7, on draw power supply.
Embodiment
Describe embodiment of the present utility model in detail below in conjunction with accompanying drawing, those skilled in the art is more clearly understood how to put into practice the utility model.Although should be appreciated that in conjunction with its preferred specific embodiments and described the utility model, these embodiments are intended setting forth, rather than limit scope of the present utility model.
Embodiment 1
Embodiment 1 relates to a kind of keyboard scan and the multiplexing circuit design structure of IO mouth expansion, as shown in Figure 1, comprise processor 1 and cross-coupled N root line 2 and M root alignment 3 among Fig. 1, the place, crosspoint of each line 2 and each alignment 3 arranges a button 4, all buttons form one N * Metzler matrix keyboard, N root line 2, M root alignment 3 are connected with the I/O interface 11 of processor 1 respectively, also comprise more than one latch 5.N root line 2 respectively with the N of latch 5 parallel input interface 51 corresponding connections, M root alignment 3 respectively with the M of latch 5 parallel input interface 51 corresponding connections, each line 2 is connected with a pull-up resistor 6, each pull-up resistor 6 all with one on draw power supply 7 to be connected.Described M is natural number, and described N is natural number.Described M can equate with described N.
In the present embodiment, M=N=4, the place, crosspoint of 4 lines and 4 alignments arranges a button 4, all buttons have 16, form one 4 * 4 matrix keyboard, the number of latch 5 is 3, three interface clock signals on the processor 1 are connected with the interface clock signal of three latchs respectively, 8 I/O interfaces 11 of processor are received the parallel input interface 51 of 3 latchs with bus form, the parallel output interface 52 of 3 latchs becomes new I/O interface, like this, the present embodiment also expands 24 I/O interfaces except building one 4 * 4 matrix keyboard.
Embodiment 2
Embodiment 2 relates to a kind of keyboard scan and the multiplexing circuit design structure of IO mouth expansion, as shown in Figure 2, comprise processor 1 and cross-coupled N root line 2 and M root alignment 3 among Fig. 2, the place, crosspoint of each line 2 and each alignment 3 arranges a button 4, all buttons form one N * Metzler matrix keyboard, N root line 2, M root alignment 3 are connected with the I/O interface 11 of processor 1 respectively, also comprise more than one latch 5.The I/O interface 11 of processor 1 respectively with the N of latch 5 parallel input interface 51 corresponding connections, N root line 2 respectively with N the parallel output interface 52 corresponding connections of latch 5.N root line 2 is connected with respectively an output interface.Described M is natural number, and described N is natural number.Described M can equate with described N.
In the present embodiment, M=3, N=8, the place, crosspoint of 8 lines and 3 alignments arranges a button 4, all buttons have 24, form one 3 * 8 matrix keyboard, the number of latch 5 is 1, an interface clock signal on the processor 1 is connected with the interface clock signal of latch, 8 I/O interfaces 11 of processor are received the parallel input interface 51 of latch with bus form, the parallel output interface 52 of latch 5 is connected with 8 lines respectively, and 8 lines are connected with respectively an output interface, become new I/O interface, can carry out simple logic control and use.Like this, the present embodiment also expands 8 I/O interfaces except building one 3 * 8 matrix keyboard.
The above only is preferred implementation of the present utility model; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the utility model principle; can also make some improvements and modifications, these improvements and modifications also should be considered as protection range of the present utility model.

Claims (6)

1. the multiplexing circuit design structure of a keyboard scan and IO mouth expansion, comprise processor and cross-coupled N root line and M root alignment, the place, crosspoint of each line and each alignment arranges a button, all buttons form one N * Metzler matrix keyboard, described N root line, described M root alignment are connected with the I/O interface of described processor respectively, it is characterized in that, also comprise more than one latch.
2. a kind of keyboard scan as claimed in claim 1 and IO mouth are expanded multiplexing circuit design structure, it is characterized in that, described N root line respectively with the N of described latch the corresponding connection of parallel input interface, described M root alignment respectively with the M of described latch the corresponding connection of parallel input interface, each line is connected with a pull-up resistor, each pull-up resistor all with one on draw power supply to be connected.
3. a kind of keyboard scan as claimed in claim 1 and IO mouth are expanded multiplexing circuit design structure, it is characterized in that, the I/O interface of described processor respectively with the N of described latch the corresponding connection of parallel input interface, described N root line respectively with the corresponding connection of N parallel output interface of described latch.
4. the multiplexing circuit design structure of a kind of keyboard scan as claimed in claim 3 and IO mouth expansion is characterized in that, described N root line is connected with respectively an output interface.
5. such as the multiplexing circuit design structure of each described a kind of keyboard scan and IO mouth expansion among the claim 1-4, it is characterized in that, described M is natural number, and described N is natural number.
6. such as the multiplexing circuit design structure of each described a kind of keyboard scan and IO mouth expansion among the claim 1-4, it is characterized in that, described M equates with described N.
CN201220424170.9U 2012-05-18 2012-08-25 Circuit design structure for scanning of keyboard and expansion reuse of IO port Expired - Lifetime CN202772872U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201220424170.9U CN202772872U (en) 2012-05-18 2012-08-25 Circuit design structure for scanning of keyboard and expansion reuse of IO port

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CN201220225345.3 2012-05-18
CN201220225345 2012-05-18
CN201220424170.9U CN202772872U (en) 2012-05-18 2012-08-25 Circuit design structure for scanning of keyboard and expansion reuse of IO port

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CN202772872U true CN202772872U (en) 2013-03-06

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109613863A (en) * 2018-12-10 2019-04-12 南京木牛自动化系统有限公司 A kind of input port expansion circuit with delivery outlet multiplexing function
CN110989457A (en) * 2019-12-23 2020-04-10 广东速美达自动化股份有限公司 Expansion method of IO points
WO2021068979A1 (en) * 2019-10-11 2021-04-15 深圳市道通智能航空技术股份有限公司 Microprocessor pin expansion circuit, battery equalization control circuit, and unmanned aerial vehicle

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109613863A (en) * 2018-12-10 2019-04-12 南京木牛自动化系统有限公司 A kind of input port expansion circuit with delivery outlet multiplexing function
WO2021068979A1 (en) * 2019-10-11 2021-04-15 深圳市道通智能航空技术股份有限公司 Microprocessor pin expansion circuit, battery equalization control circuit, and unmanned aerial vehicle
CN110989457A (en) * 2019-12-23 2020-04-10 广东速美达自动化股份有限公司 Expansion method of IO points

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Granted publication date: 20130306

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