CN202721662U - Phase lock frequency modulation circuit temperature drift compensation apparatus - Google Patents

Phase lock frequency modulation circuit temperature drift compensation apparatus Download PDF

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Publication number
CN202721662U
CN202721662U CN 201220204232 CN201220204232U CN202721662U CN 202721662 U CN202721662 U CN 202721662U CN 201220204232 CN201220204232 CN 201220204232 CN 201220204232 U CN201220204232 U CN 201220204232U CN 202721662 U CN202721662 U CN 202721662U
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voltage
signal
frequency
output
controlled oscillator
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CN 201220204232
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孙文友
胡永红
张小林
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Northwestern Polytechnical University
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Northwestern Polytechnical University
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Abstract

The utility model discloses a phase lock frequency modulation circuit temperature drift compensation apparatus. According to the utility model, a baseband signal is output to one end of an adjustable potentiometer through a signal receiver, and the other end of the adjustable potentiometer is grounded; a divider resistor network is composed of two divider resistors in series connection, and the divider resistor network is arranged between and connected with a center tap of the adjustable potentiometer and a voltage output terminal of a temperature sensor; the common port of the two divider resistors is connected with a voltage tuning terminal of a voltage controlled oscillator in a phase lock frequency modulation circuit, and a signal output by the common port of the two divider resistors is the baseband signal. The phase lock frequency modulation circuit temperature drift compensation apparatus provided by the utility model overcomes the problem that output frequency modulation signal bandwidth is influenced by changes of ambient temperature in the prior art.

Description

A kind of PLL―FM temperature drift compensation device
Technical field
The present invention relates to analog signal processing technology, especially the analog compensation device of PLL―FM temperature drift.
Background technology
At present, PLL―FM is known phase-locked loop circuit, be comprised of frequency divider, voltage controlled oscillator, loop low pass filter etc., baseband signal to be modulated is directly accessed the voltage tuning end of the voltage controlled oscillator in the phase-locked loop circuit, phase-locked loop circuit output is FM signal.When work, the FM signal bandwidth of existing PLL―FM depends on the baseband signal amplitude of input and the electricity accent sensitivity of voltage controlled oscillator, and the baseband signal amplitude increases with the ambient temperature reduction, the electricity of voltage controlled oscillator transfers sensitivity to reduce also increase with ambient temperature, thereby make PLL―FM FM signal bandwidth when low temperature become large, the FM signal bandwidth diminishes during high temperature.The baseband signal amplitude that the tuning termination of voltage-controlled oscillator voltage is received in the PLL―FM and the temperature drift of voltage controlled oscillator device itself cause exporting the FM signal bandwidth and change, and final result will affect FM receiver sensitivity.
Summary of the invention
Deficiency for the FM signal bandwidth that overcomes prior art output is affected by variation of ambient temperature the invention provides a kind of analog compensation device, and this analog compensation device can reduce variation of ambient temperature to the impact of PLL―FM FM signal bandwidth.
The technical solution adopted for the present invention to solve the technical problems is: comprise signal receiving circuit and temperature-compensation circuit.
Described signal receiving circuit comprises signal receiver and adjustable potentiometer.Baseband signal exports an end of adjustable potentiometer to by signal receiver; The other end ground connection of adjustable potentiometer.The function of described adjustable potentiometer RP is to the baseband signal dividing potential drop, adjusts PLL―FM FM signal bandwidth.
Described temperature-compensation circuit comprises resistor voltage divider network and temperature sensor.Described resistor voltage divider network is composed in series by two divider resistances, be connected between the centre cap and temperature sensor voltage output end of adjustable potentiometer, the voltage tuning end of voltage controlled oscillator in the public termination PLL―FM of two divider resistances, the signal of the common port output of two divider resistances is the baseband signal after the compensation.
Described signal receiver adopts the RS-485 signal receiver.
Described temperature sensor adopts the Voltage-output temperature sensor.
The resistance R of described two divider resistances 1And R 2For In the formula, R pBe the resistance of adjustable potentiometer RP, R P1For the adjustable potentiometer centre cap to the resistance between the ground connection, K aThe temperature coefficient of the output voltage of described temperature sensor when being 25 ° of C, K vBe the voltage-controlled sensitivity of voltage controlled oscillator in the described PLL―FM, K V1Be the temperature coefficient of voltage-controlled sensitivity, K V2Be the temperature coefficient of described signal receiver output high level amplitude, K V3Temperature coefficient for the low level amplitude.
Described PLL―FM is general known phase-locked loop circuit, comprises frequency reference source, synthesizer chip, single-chip microcomputer, loop low pass filter and voltage controlled oscillator.Described frequency reference source provides reference frequency for synthesizer chip, and in synthesizer chip frequency division or frequency multiplication as phase demodulation frequency f pIn the phase discriminator of synthesizer chip, voltage controlled oscillator output signal behind frequency division with phase demodulation frequency f pCarry out the phase bit comparison, output direct-flow error voltage U dU dBy being input to the voltage tuning end of voltage controlled oscillator after loop low pass filter filtering phase demodulation frequency and the high-frequency noise, finish the phase-locked control of closed loop of phase-locked loop circuit.Described single-chip microcomputer is the internal register of configuration frequency chip combiner.Baseband signal after the described compensation is loaded into the voltage tuning end of voltage controlled oscillator, and the output signal of voltage controlled oscillator is FM signal.
The invention has the beneficial effects as follows: owing to adopted the analog compensation device, the amplitude temperature drift of baseband signal and the voltage-controlled sensitivity temperature drift of voltage controlled oscillator have been compensated, thereby reduced the impact of ambient temperature on PLL―FM output FM signal bandwidth, the present invention has overcome prior art and has exported the impact that the FM signal bandwidth is subjected to variation of ambient temperature.
Description of drawings
Fig. 1 is schematic diagram of the present invention;
Among the figure, 1-baseband signal, 2-signal receiving circuit, the 3-temperature-compensation circuit, the baseband signal after the 4-compensation, 5-resistor voltage divider network, the 6-PLL―FM, 7-analog compensation device, 8-frequency reference source, the 9-synthesizer chip, the 10-single-chip microcomputer, 11-loop low pass filter, 12-voltage controlled oscillator, the 13-FM signal, the 14-temperature sensor.
Embodiment
The present invention relates to analog compensation device and PLL―FM.Described analog compensation device comprises signal receiving circuit, temperature-compensation circuit.
Described signal receiving circuit is comprised of RS-485 signal receiver and adjustable potentiometer RP.Baseband signal enters described RS-485 signal receiver, and the output of RS-485 signal receiver connects the end of adjustable potentiometer RP; The other end ground connection of described adjustable potentiometer RP, the centre cap of adjustable potentiometer RP is connected with temperature-compensation circuit.The function of described adjustable potentiometer RP is to the baseband signal dividing potential drop, adjusts PLL―FM FM signal bandwidth.
Described temperature-compensation circuit is comprised of resistor voltage divider network and temperature sensor.Described resistor voltage divider network is by resistance R 1And R 2Be composed in series.Described temperature sensor adopts the Voltage-output temperature sensor, temperature sensor Voltage-output termination resistor voltage divider network b end.Adjustable potentiometer RP centre cap in the described resistor voltage divider network a termination signal receiving circuit; R in the described resistor voltage divider network 1And R 2Between public c termination PLL―FM in the voltage tuning end of voltage controlled oscillator, R in the resistor voltage divider network 1And R 2Between the signal of public c end output be baseband signal after the compensation.
Described PLL―FM is general known phase-locked loop circuit, comprises the frequency reference source, synthesizer chip, single-chip microcomputer, loop low pass filter, voltage controlled oscillator.Described frequency reference source provides reference frequency for synthesizer chip, and in synthesizer chip frequency division or frequency multiplication as phase demodulation frequency f pIn the phase discriminator of synthesizer chip, voltage controlled oscillator output signal behind frequency division with phase demodulation frequency f pCarry out the phase bit comparison, output direct-flow error voltage U dU dBy being input to the voltage tuning end of voltage controlled oscillator after loop low pass filter filtering phase demodulation frequency and the high-frequency noise, finish the phase-locked control of closed loop of phase-locked loop circuit.Described single-chip microcomputer is the internal register of configuration frequency chip combiner.Baseband signal after the described compensation is loaded into the voltage tuning end of voltage controlled oscillator, and the output signal of voltage controlled oscillator is FM signal.
In described analog compensation device, by selecting suitable R 1And R 2Resistance can guarantee that the voltage of described resistor voltage divider network c end does not change with temperature.In the described resistor voltage divider network, R 1And R 2Resistance value jointly determined by the temperature coefficient of RS-485 signal receiver output level and the voltage-controlled sensitivity temperature coefficient of voltage controlled oscillator.
Along with ambient temperature improves, RS-485 signal receiver output high level amplitude can reduce, the low level amplitude can increase, and the voltage-controlled sensitivity meeting of voltage controlled oscillator reduces, and the output voltage of temperature sensor then increases.Otherwise along with ambient temperature reduces, RS-485 signal receiver output high level amplitude can increase, the low level amplitude can reduce, and the voltage-controlled sensitivity meeting of voltage controlled oscillator increases, and the output voltage of temperature sensor then reduces.The increase of the voltage-controlled sensitivity of voltage controlled oscillator or reduce can be equivalent to the increase of the baseband signal peak-to-peak amplitude that is loaded into the tuning end of voltage-controlled oscillator voltage or reduces.
Known, the temperature coefficient of the output voltage of described temperature sensor is K when 25 ° of C aMV/ ° of C; The voltage-controlled sensitivity of voltage controlled oscillator is K in the described PLL―FM v(kHz/mV), the temperature coefficient of voltage-controlled sensitivity is K V1(kHz/ ℃), the temperature coefficient of amounting to into voltage is K V1/ K v(mV/ ℃); The temperature coefficient of described RS-485 signal receiver output high level amplitude is K V2(mV/ ℃), the temperature coefficient of low level amplitude are K V3(mV/ ℃), then the temperature coefficient of RS-485 signal receiver output peak-to-peak level amplitude is (K V2-K V3) (mV/ ℃).
As [(K V2-K V3) K vR P1+ R pK V1] K a, select R according to equation (1) at＜0 o'clock 1And R 2:
R 2 R 1 = | R p K v K a ( K v 2 - K v 3 ) K v R p 1 + R p K v 1 | - - - ( 1 )
In the formula, R pBe the resistance of adjustable potentiometer RP, the k Ω of unit;
R P1For the adjustable potentiometer centre cap to the resistance between the ground connection, the k Ω of unit.
The present invention is further described below in conjunction with drawings and Examples.
Device embodiment: with reference to Fig. 1, the inventive system comprises analog compensation device 7 and PLL―FM 6.Described analog compensation device 7 contains signal receiving circuit 2, temperature-compensation circuit 3.Described temperature-compensation circuit 3 contains temperature sensor 14 and resistor voltage divider network 5.Described signal receiving circuit 2 contains RS-485 signal receiver and adjustable potentiometer RP.
The end of described RS-485 signal receiver output termination adjustable potentiometer RP.The other end ground connection of described adjustable potentiometer RP, the centre cap of adjustable potentiometer RP connect a end of resistor voltage divider network 5.The voltage output end of the b termination temperature sensor 14 of described resistor voltage divider network 5, the voltage tuning end of the c termination voltage controlled oscillator 12 of resistor voltage divider network 5.Described temperature sensor 14 is selected the voltage-type temperature sensor TMP36F of ADI company positive temperature coefficient.The effect of described adjustable potentiometer RP is the amplitude of adjusting the baseband signal of RS-485 signal receiver output, finally adjusts the bandwidth of the output FM signal 13 of PLL―FM 6.R in the described resistor voltage divider network 5 1, R 2Calculate according to formula (1).
PLL―FM 6 is general known phase-locked loop circuits, comprises frequency reference source 8, synthesizer chip 9, single-chip microcomputer 10, loop low pass filter 11, voltage controlled oscillator 12.Described synthesizer chip 9 connects frequency reference source 8, single-chip microcomputer 10 and loop low pass filter 11.Described loop low pass filter 11 outputs connect the voltage tuning end of voltage controlled oscillator 12, and the loop bandwidth of loop low pass filter 11 requires less than 1/2nd of the code check of baseband signal to be modulated.Described single-chip microcomputer 10 is internal registers of configuration frequency chip combiner.
Described baseband signal 1 entering signal receiving circuit 2, the output jointing temp compensating circuit 3 of signal receiving circuit 2, the baseband signal 4 after the temperature-compensation circuit 3 output compensation.Baseband signal 4 after the described compensation enters in the PLL―FM 6, is connected with the voltage tuning end of voltage controlled oscillator 12.The output FM signal 13 of described PLL―FM 6 is the FM signal after the compensation.

Claims (4)

1. PLL―FM temperature drift compensation device, comprise signal receiving circuit and temperature-compensation circuit, it is characterized in that: described signal receiving circuit comprises signal receiver and adjustable potentiometer, baseband signal exports an end of adjustable potentiometer, the other end ground connection of adjustable potentiometer to by signal receiver; Described temperature-compensation circuit comprises resistor voltage divider network and temperature sensor, described resistor voltage divider network is composed in series by two divider resistances, be connected between the centre cap and temperature sensor voltage output end of adjustable potentiometer, the voltage tuning end of voltage controlled oscillator in the public termination PLL―FM of two divider resistances, the signal of the common port output of two divider resistances is the baseband signal after the compensation.
2. PLL―FM temperature drift compensation device according to claim 1 is characterized in that: described signal receiver employing RS-485 signal receiver.
3. PLL―FM temperature drift compensation device according to claim 1 is characterized in that: described temperature sensor employing Voltage-output temperature sensor.
4. PLL―FM temperature drift compensation device according to claim 1, it is characterized in that: described PLL―FM comprises frequency reference source, synthesizer chip, single-chip microcomputer, loop low pass filter and voltage controlled oscillator, described frequency reference source provides reference frequency for synthesizer chip, and in synthesizer chip frequency division or frequency multiplication as phase demodulation frequency f p, in the phase discriminator of synthesizer chip, voltage controlled oscillator output signal behind frequency division with phase demodulation frequency f pCarry out the phase bit comparison, output direct-flow error voltage U d, U dBy being input to the voltage tuning end of voltage controlled oscillator after loop low pass filter filtering phase demodulation frequency and the high-frequency noise, finish the phase-locked control of closed loop of phase-locked loop circuit, described single-chip microcomputer is the internal register of configuration frequency chip combiner, baseband signal after the described compensation is loaded into the voltage tuning end of voltage controlled oscillator, and the output signal of voltage controlled oscillator is FM signal.
CN 201220204232 2012-05-09 2012-05-09 Phase lock frequency modulation circuit temperature drift compensation apparatus Expired - Fee Related CN202721662U (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102647182A (en) * 2012-05-09 2012-08-22 西北工业大学 Analog compensation device capable of reducing temperature drift of phase locking frequency modulation circuit
CN104378107A (en) * 2014-11-10 2015-02-25 西北工业大学 Digital processing device improving phase lock frequency modulation circuit broadband modulation flatness
CN104617945A (en) * 2014-11-25 2015-05-13 西安爱生技术集团公司 Digital compensation device for keeping stable phase lock frequency modulation circuit output bandwidth
CN105245222A (en) * 2015-11-30 2016-01-13 成都西科微波通讯有限公司 Novel help lock circuit in broadband phase-locked loop
CN105466460A (en) * 2015-12-18 2016-04-06 深圳市贝沃德克生物技术研究院有限公司 Circuit temperature drift compensation system and method of biosensor

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102647182A (en) * 2012-05-09 2012-08-22 西北工业大学 Analog compensation device capable of reducing temperature drift of phase locking frequency modulation circuit
CN104378107A (en) * 2014-11-10 2015-02-25 西北工业大学 Digital processing device improving phase lock frequency modulation circuit broadband modulation flatness
CN104378107B (en) * 2014-11-10 2017-05-24 西北工业大学 Digital processing device improving phase lock frequency modulation circuit broadband modulation flatness
CN104617945A (en) * 2014-11-25 2015-05-13 西安爱生技术集团公司 Digital compensation device for keeping stable phase lock frequency modulation circuit output bandwidth
CN104617945B (en) * 2014-11-25 2017-10-03 西安爱生技术集团公司 A kind of digital compensation device for keeping PLL―FM output bandwidth stable
CN105245222A (en) * 2015-11-30 2016-01-13 成都西科微波通讯有限公司 Novel help lock circuit in broadband phase-locked loop
CN105466460A (en) * 2015-12-18 2016-04-06 深圳市贝沃德克生物技术研究院有限公司 Circuit temperature drift compensation system and method of biosensor
CN105466460B (en) * 2015-12-18 2019-08-30 深圳市贝沃德克生物技术研究院有限公司 The circuit temperature drift compensating system and method for biosensor

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Granted publication date: 20130206

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