CN202522316U

CN202522316U - Vibration signal synchronous acquisition circuit

Info

Publication number: CN202522316U
Application number: CN 201120541580
Authority: CN
Inventors: 宋恒; 徐彤
Original assignee: Shaanxi Qianshan Avionics Co Ltd
Current assignee: Shaanxi Qianshan Avionics Co Ltd
Priority date: 2011-12-16
Filing date: 2011-12-16
Publication date: 2012-11-07
Anticipated expiration: 2021-12-16

Abstract

The present utility model belongs to the avionics technology, and relates to a vibration signal synchronous acquisition circuit. The vibration signal synchronous acquisition circuit comprises a pluraltiy of vibration signal conditioning channels, an analog-to-digital conversion circuit, a programming logic device, a hysteresis comparison circuit and a DSP. The vibration signal conditioning channels are corresponding to a group of vibration signals, the vibration signal conditioning channels are all connected with the analog-to-digital conversion circuit, the analog-to-digital conversion circuit is connected with the programming logic device, and the programming logic device is connected with the DSP. The programming logic device is provided with a logic control channel of the analog-to-digital conversion circuit and a setting channel for gain setting, and the programming logic device is used by inputting synchronous signals through the hysteresis comparison circuit. In the vibration signal synchronous acquisition circuit, FPGA is used to realize logic control of an A/D conversion module, parallel acquisition of multi-path vibration signals can be realized, complete period sampling of single-channel vibration signals can be guaranteed, and phase information between a plurality of sampling channels is maintained by synchronous acquisition of multi-path vibration signals.

Description

A kind of vibration signal synchronous Acquisition Circuit

Technical field

The utility model belongs to avionics, relates to a kind of vibration signals collecting circuit.

Background technology

In the test of helicopter rotary part; The analysis of vibration signal method is one of effective ways of realizing fault diagnosis; Through vibration signal is done spectrum analysis, obtain the frequency domain characteristic of vibration signal, carry out the fault diagnosis and the analysis of mechanical system; Judge the parts current working state according to suitable fault model simultaneously, for system's operation and maintenance provides appropriate message.

But vibration signal is normally astable at random, so must carry out the synchronous acquisition and the processing of vibration signal.And present existing vibration test system, it is complicated that hardware is realized, and real-time is poor, is difficult for realization multiple signals synchronous high-speed and gathers and handle.

The utility model content

The utility model purpose is: provide a kind of and can realize the circuit to vibration signal multi-channel high-speed synchronous acquisition.

The utility model technical scheme is: a kind of vibration signal synchronous Acquisition Circuit; It comprises some vibration signal conditioning passages, analog to digital conversion circuit, PLD, hysteresis comparator circuit and dsp processor; Wherein, the corresponding one group of vibration signal of said vibration signal conditioning passage, said vibration signal conditioning passage all is connected on the analog to digital conversion circuit; And analog to digital conversion circuit is connected on the PLD; Said PLD links to each other with dsp processor, and PLD has the steering logic passage of analog to digital conversion circuit, and is used for the passage that is provided with that the pga circuit gain is provided with; In addition, PLD has synchronizing signal through the input of hysteresis comparator circuit.

Said vibration signal conditioning passage is made up of the vibration transducer interface circuit, pga circuit and the anti-aliasing filter circuit that link to each other in order.

Said vibration transducer interface circuit is a constant-current source circuit.

Said anti-aliasing filter circuit adopts integrated continuous time filter.

Analog-digital conversion circuit as described comprises 6 tunnel separate 16 successive approximation A/D converters.

Said PLD adopts the XC4VLX25 chip.

The utility model technique effect is: the utility model vibration signal synchronous Acquisition Circuit uses PLD to realize the analog to digital conversion circuit logic control; Realize multichannel vibration signal parallel acquisition; Be independent of each other between the analog-to-digital conversion module, can realize 32 road vibration signals collectings, the single channel sampling rate reaches as high as 150kbps; According to the Shannon sampling thheorem, can satisfy vibration signals collecting requirement in most cases.And by synchronizing signal triggering vibration signals collecting; Ability bonding passage vibration signal is integer-period sampled; It is a plurality of by the phase information between the sampled signal that the collection of multichannel vibration signal synchronous keeps, and selects 16 analog to digital converters simultaneously for use, can realize the high precision collecting of vibration signal.

Description of drawings

Fig. 1 is the utility model vibration signal synchronous Acquisition Circuit synoptic diagram;

Fig. 2 is the equivalent schematic of programming device logic control,

Wherein, 1-vibration signal interface circuit, 2-pga circuit, 3-anti-aliasing filter circuit, 4-analog to digital conversion circuit, 5-PLD, 6-DSP processor, 7-hysteresis comparator circuit, 8-analog to digital conversion steering logic, 9-control register, 10-clock module, 11-status register, 12-data buffer area.

Embodiment

Through specific embodiment the utility model is further specified below:

See also Fig. 1, it is the utility model vibration signal synchronous Acquisition Circuit synoptic diagram.Said vibration signal synchronous Acquisition Circuit comprises some vibration signal conditioning passages, analog to digital conversion circuit, PLD, hysteresis comparator circuit and dsp processor.Wherein, the corresponding one group of vibration signal of said vibration signal conditioning passage, it is made up of the vibration transducer interface circuit 1, pga circuit 2 and the anti-aliasing filter circuit 3 that link to each other in order.Said vibration signal conditioning passage all is connected on the analog to digital conversion circuit 4, and analog to digital conversion circuit is connected on the PLD 5.And said PLD links to each other with dsp processor 6, and simultaneously, this PLD has the steering logic passage of analog to digital conversion circuit, and the passage that is provided with that is used for pga circuit gain setting.In addition, PLD has synchronizing signal through 7 inputs of hysteresis comparator circuit.

In the utility model, said PLD (FPGA) adopts the XC4VLX25 chip, also can select for use other inside to have the FPGA of equivalent logical block.

Said vibration transducer interface circuit is a constant-current source circuit, drives vibration transducer and converts vibration signal into voltage signal, and the output signal is through Hi-pass filter, the DC component in the filtered signal.

And vibration signal all need carry out signal and fit accent before carrying out analog to digital conversion.The programmable amplifier that the utility model adopted suitably amplifies vibration signal, makes it satisfy the requirement of A/D input range.Enlargement factor optional 1,2,4,8.Through the enlargement factor that control register is regulated input signal in the PLD is set, can the enlargement factor of every road acquisition channel be provided with separately.

Said anti-aliasing filter circuit adopts integrated continuous time filter, is used for the undesired signal of filtered signal medium frequency greater than 1/2 SF, through the basic filtering of high-frequency signal that passband is outer, prevents that the frequency spectrum of acquired signal from producing repeatedly mixed.

Said hysteresis comparator circuit adopts comparer that synchronizing signal is nursed one's health, and is output as square-wave signal, receives programmable logic device pin through buffer, and in the PLD program with the trigger pip of this signal as the A/D modular converter sampling period.

Analog-digital conversion circuit as described comprise 6 the tunnel separate 16, at a high speed, low-power consumption, successive approximation A/D converter, sampling rate can reach 250kbps, supply voltage ± 5V～± 15V.Can be with mode and external circuits interface parallel and serial, output signal compatibility 3.3V or 5V level.

Said DSP is used to be provided with the employing control register of PLD, comprises sampling length, SF etc.And said PLD is according to synchronizing signal and control register value, generates A/D conversion and control sequential, and reads transformation result and leave in the internal data buffer zone.

During the real work of the utility model vibration signal synchronous Acquisition Circuit, as shown in Figure 2, provided the equivalent schematic of programming device logic control.

Step 1: PLD control register initialization

Vibration transducer interface circuit by each vibration signal conditioning passage receives vibration signal, vibration signal is amplified with filtering nurse one's health then.By control register 9 in the DSP initialization PLD, clear status register 11, PLD detects synchronizing signal;

Step 2: PLD starts vibration signals according to synchronizing signal

When PLD (FPGA) detects synchronous signal input end generation saltus step, start this sampling period, at first; FPGA sends multichannel analog to digital conversion steering logic 8 simultaneously to the modulus conversion chip respective channel, starts conversion CONVST signal through tfi module 10, and modulus conversion chip begins conversion; Modulus conversion chip BUSY pin output high level; When FPGA detected the BUSY pin and is low level, this A/D converted, and FPGA produces the read data sequential; Transformation result is read in the data buffer 12 successively; According to the some vibration signals of setting of counting of SF continuous acquisition, completion should be gathered in the cycle, and PLD is provided with corresponding state register 11;

Step 3:DSP is according to status register value in the PLD; From the PLD data buffer, read sampled data; Clear then status register 11; And sampled data carried out subsequent treatment and analysis, and extract the eigenwert of vibration signal, analysis result is sent to host computer through the RS-422 interface;

Step 4: whether repeating step 2, FPGA continue to detect synchronizing signal effective, to carry out next periodic sampling.

The utility model vibration signal synchronous Acquisition Circuit uses FPGA to realize the logic control of A/D modular converter; Realize multichannel vibration signal parallel acquisition; Be independent of each other between the A/D modular converter, can realize 32 road vibration signals collectings, the single channel sampling rate reaches as high as 150kbps; According to the Shannon sampling thheorem, can satisfy vibration signals collecting requirement in most cases.And by synchronizing signal triggering vibration signals collecting; Ability bonding passage vibration signal is integer-period sampled; It is a plurality of by the phase information between the sampled signal that the collection of multichannel vibration signal synchronous keeps, and selects 16 A/D converters simultaneously for use, can realize the high precision collecting of vibration signal.

Claims

1. vibration signal synchronous Acquisition Circuit; It is characterized in that: comprise some vibration signal conditioning passages, analog to digital conversion circuit, PLD, hysteresis comparator circuit and dsp processor; Wherein, the corresponding one group of vibration signal of said vibration signal conditioning passage, said vibration signal conditioning passage all is connected on the analog to digital conversion circuit; And analog to digital conversion circuit is connected on the PLD; Said PLD links to each other with dsp processor, and PLD has the steering logic passage of analog to digital conversion circuit, and is used for the passage that is provided with that the pga circuit gain is provided with; In addition, PLD has synchronizing signal through the input of hysteresis comparator circuit.

2. vibration signal synchronous Acquisition Circuit according to claim 1 is characterized in that: said vibration signal conditioning passage is made up of the vibration transducer interface circuit, pga circuit and the anti-aliasing filter circuit that link to each other in order.

3. vibration signal synchronous Acquisition Circuit according to claim 2 is characterized in that: said vibration transducer interface circuit is a constant-current source circuit.

4. vibration signal synchronous Acquisition Circuit according to claim 3 is characterized in that: said anti-aliasing filter circuit adopts integrated continuous time filter.

5. according to each described vibration signal synchronous Acquisition Circuit of claim 1 to 4, it is characterized in that: analog-digital conversion circuit as described comprises 6 tunnel separate 16 successive approximation A/D converters.

6. vibration signal synchronous Acquisition Circuit according to claim 5 is characterized in that: said PLD adopts the XC4VLX25 chip.