CN202394869U - Base-free chip repeater sphere gate matrix packaging structure - Google Patents

Base-free chip repeater sphere gate matrix packaging structure Download PDF

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Publication number
CN202394869U
CN202394869U CN201120473851XU CN201120473851U CN202394869U CN 202394869 U CN202394869 U CN 202394869U CN 201120473851X U CN201120473851X U CN 201120473851XU CN 201120473851 U CN201120473851 U CN 201120473851U CN 202394869 U CN202394869 U CN 202394869U
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CN
China
Prior art keywords
pin
chip
outer pin
front surface
metal wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN201120473851XU
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Chinese (zh)
Inventor
王新潮
梁志忠
谢洁人
吴昊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JCET Group Co Ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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Publication date
Application filed by Jiangsu Changjiang Electronics Technology Co Ltd filed Critical Jiangsu Changjiang Electronics Technology Co Ltd
Priority to CN201120473851XU priority Critical patent/CN202394869U/en
Application granted granted Critical
Publication of CN202394869U publication Critical patent/CN202394869U/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

The utility model relates to a base-free chip repeater sphere gate matrix packaging structure which comprises outer pins (1), wherein the front surface of each outer pin (1) forms an inner pin (2) in a multilayer electroplating mode; a chip (3) is bridged between the front surface of the inner pin (2) and the front surface of the inner pin (2); the front surface of the chip (3) and the front surface of the inner pin (2) are connected through a metal wire (4); the upper part of the inner pin (2), the chip (3) and the metal wire (4) are coated with a plastic sealing material (6); the peripheral region of the outer pin (1), and the region between the outer pin (1) and the outer pin (1) are embedded with a gap filler (7); and the back surface of each outer pin (1) is provided with a tin sphere (8). The utility model saves the high-temperature-resistant adhesive film on the back surface, and lowers the packaging cost; the quality of ball bonding and, and the reliability and stability of the product are good; and the binding capacity between the plastic sealing body and the metal pins is high, thereby implementing high-density capacity of the inner pins.

Description

Do not have basic island chip and directly put ball grid array package structure
Technical field
The utility model relates to a kind of no basic island chip and directly puts ball grid array package structure, belongs to the semiconductor packaging field.
Background technology
Traditional lead frame structure mainly contains two kinds:
First kind: after adopting metal substrate to carry out chemical etching and plating, stick the resistant to elevated temperatures glued membrane of one deck at the back side of metal substrate and form the leadframe carrier (as shown in Figure 2) that to carry out encapsulation process;
Second kind: employing is at first carried out chemistry at the back side of metal substrate and is etched partially; Again sealing of plastic packaging material carried out in the aforementioned zone that has etched partially through chemistry; The chemical etching of pin in afterwards the front of metal substrate being carried out; Carry out the plating on pin surface in the lead frame after the completion again, promptly accomplish the making (as shown in Figure 4) of lead frame.
And there has been following not enough point in above-mentioned two kinds of lead frames in encapsulation process:
First kind:
1, but the lead frame of this kind must stick the glued membrane of one deck costliness high temperature resistance because of the back side, so directly increased high cost;
2, but also because such a lead frame must be affixed on the back layer of high temperature of the film, during the packaging process so that the loading process can use conductive or non-conductive adhesive material, and can not be used completely eutectic solder process technology and for loading, so choose the types of products have greater limitations;
3, again because but the glued membrane of one deck high temperature resistance must be sticked in the back side of the lead frame of this kind; And in the metal wire bonding technology in encapsulation process; Because but the glued membrane of this high temperature resistance is a soft materials; So caused the instability of metal wire bonding parameter, seriously influenced the quality of metal wire bonding and the stability of production reliability;
4, again because but the glued membrane of one deck high temperature resistance must be sticked in the back side of the lead frame of this kind; And the plastic package process process in encapsulation process; Infiltrate plastic packaging material because the injecting glue pressure during plastic packaging is easy to cause between lead frame and the glued membrane, and be that the kenel of conduction is because infiltrated plastic packaging material and become insulation pin (as shown in Figure 3) on the contrary the former metal leg that should belong to.
Second kind:
1, because carried out the etching operation of secondary respectively, so increased the cost of operation operation more;
2, the composition of lead frame be metallics add epoxy resin material (plastic packaging material) thus at high temperature easily because the expansion of different material and shrinkage stress inequality, generation lead frame warpage issues;
3, also because the warpage of lead frame directly has influence on the precision of the device chip in the packaging process and thereby yield is produced in the smooth and easy influence of lead frame transport process;
4, also because the warpage of lead frame directly has influence on the aligning accuracy of the metal wire bonding in the packaging process and thereby yield is produced in the smooth and easy influence of lead frame transport process;
5, because the positive interior pin of lead frame is to adopt etched technology, must be so the pin of pin is wide in the etching greater than 100 μ m, and the gap of interior pin and interior pin also must be greater than 100 μ m, so difficult high density ability of accomplishing interior pin.
Summary of the invention
The purpose of the utility model is to overcome above-mentioned deficiency; Provide a kind of no basic island chip directly to put ball grid array package structure, it has saved the high temperature resistant glued membrane at the back side, has reduced packaging cost; Selectable product category is wide; The quality of ball bonding and the good stability of production reliability, the constraint ability of plastic-sealed body and metal leg is big, has realized the high density ability of interior pin.
The purpose of the utility model is achieved in that a kind of no basic island chip directly puts ball grid array package structure; Be characterized in: it comprises outer pin; Said outer pin front forms interior pin through the multilayer plating mode, said between the positive and interior pin front of pin cross-over connection chip is arranged, be connected with metal wire between said chip front side and the interior pin front; Pin top and chip and metal wire are encapsulated with plastic packaging material outward in said; Zone that said outer pin is peripheral and the zone between outer pin and the outer pin all are equipped with gap filler, and the back side of outer pin exposes outside the gap filler, and the outer pin back side outside exposing gap filler is provided with the tin ball.
Said the first metal layer can adopt nickel, copper, nickel, palladium, five layers of metal level of gold or nickel, copper, silver-colored three-layer metal layer, perhaps other similar structures.With nickel, copper, nickel, palladium, five layers of metal level of gold is example; Wherein the ground floor nickel dam mainly plays the effect on anti-etching barrier layer; And middle copper layer, nickel dam and palladium layer mainly play a part to combine to increase, and outermost gold layer mainly plays the effect with the metal wire bonding.
Compared with prior art, the beneficial effect of the utility model is:
1, but the glued membrane of the expensive high temperature resistance of one deck need not sticked in the back side of this kind lead frame, so directly reduced high cost;
2, because the back surface of the lead frame does not require such a layer of paste-resistant temperature of the film, so that during the process of the package in addition to the conductive or non-conductive adhesive material, but also with eutectic process as well as soft solder process for loading, so a wider choice of species;
3,, guaranteed the stability of ball bonding bonding parameter, guaranteed the stability of reliability of quality and the product of ball bonding again because but the glued membrane of one deck high temperature resistance need not sticked in the back side of the lead frame of this kind;
, thereby in the technical process of encapsulation, can not cause between lead frame and the glued membrane fully and infiltrate plastic packaging material 4, again because but the glued membrane of one deck high temperature resistance need not sticked in the back side of the lead frame of this kind;
5, because the fine rule electric plating method has been adopted in the front, so positive pin widths minimum can reach 25 μ m, and reach 25 μ m apart from minimum between interior pin and the interior pin, embody the high density ability of the interior pin of lead frame fully;
6, owing to used the plating mode and the back etched technology of positive interior pin; So can the pin in lead frame front be extended to as much as possible the next door of Ji Dao; Impel chip and pin distance significantly to shorten, so the cost of metal wire also can significantly reduce (the especially metal wire of expensive proof gold matter);
7, also because the shortening of metal wire makes the also speedup (especially the product of storage class and need the calculating of mass data more outstanding) significantly of signal output speed of chip; Because the length of metal wire has shortened, so also significantly reduce in the interference of the existing dead resistance of metal wire, parasitic capacitance and stray inductance to signal;
8, because of having used the plating elongation technology of interior pin,, make the volume and the area of encapsulation significantly to dwindle so can be easy to produce the distance between high pin number and highdensity pin and the pin;
9, because volume after being encapsulated is significantly dwindled, more directly embody material cost and significantly descend, because the minimizing of material usage has also reduced environmental issue puzzlements such as discarded object significantly.
10, when the plastic-sealed body paster is to pcb board; Because of implanting or be coated with the tin ball in the position at plastic-sealed body pin and Ji Dao; It is big that spacing between the plastic-sealed body back side and the pcb board becomes, and especially the problem that causes tin fusion difficulty can not blown because of hot blast in the inner ring pin of plastic-sealed body or zone, basic island.
When if 11 plastic-sealed body pasters are not fine to pcb board, need do over again again heavily and to paste, because there are enough height at the tin cream place, cleaning agent cleans easily, maintenance easily behind the tin ball of burn-oning does not weld to take away like the tin ball and welds a ball again again behind the tin ball and get final product.
Description of drawings
Fig. 1 is directly put the ball grid array package structure sketch map for a kind of no basic island of the utility model chip.
Fig. 2 was not for there was the sketch map that high temperature resistant glued membrane is sticked at the pin lead frame back side on four sides in the past.
The sketch map of flash when the four sides that Fig. 3 sticks high temperature resistant glued membrane for the back side does not in the past have the pin leadframe package.
Fig. 4 was for sealed the structural representation of two-sided etched lead frame in the past in advance.
Wherein:
Outer pin 1
Interior pin 2
Chip 3
Metal wire 4
Conduction or non-conductive bonding material 5
Plastic packaging material 6
Gap filler 7
Tin ball 8.
Embodiment
Referring to Fig. 1; A kind of no basic island of the utility model chip is directly put ball grid array package structure; It comprises outer pin 1, pin 2 in said outer pin 1 front forms through the multilayer plating mode, and said interior pin 2 is the first metal layer; Through conduction or 5 cross-over connections of non-conductive bonding material chip 3 is arranged between pin 2 fronts and interior pin 2 fronts in said; Said chip 3 positive with interior pin 2 fronts between is connected with metal wire 4, be encapsulated with plastic packaging materials 6 outside pin 2 tops and chip 3 and the metal wire 4 in said, the zone between regional and the outer pin 1 and the outer pin 1 of said outer pin 1 periphery all is equipped with gap filler 7; And expose outside the gap filler 7 at the back side of outer pin 1, and outer pin 1 back side outside exposing gap filler 7 is provided with tin ball 8.

Claims (1)

1. a no basic island chip is directly put ball grid array package structure; It is characterized in that: it comprises outer pin (1); Said outer pin (1) is positive to form interior pin (2) through the multilayer plating mode; Cross-over connection has chip (3) between said interior pin (2) front and interior pin (2) front; Said chip (3) positive with interior pin (2) front between is connected with metal wire (4), be encapsulated with plastic packaging material (6) outside pin (2) top and chip (3) and the metal wire (4) in said, the zone between regional and the outer pin (1) and the outer pin (1) of said outer pin (1) periphery all is equipped with gap filler (7); And expose outside the gap filler (7) at the back side of outer pin (1), and outer pin (1) back side outside exposing gap filler (7) is provided with tin ball (8).
CN201120473851XU 2011-11-25 2011-11-25 Base-free chip repeater sphere gate matrix packaging structure Expired - Lifetime CN202394869U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201120473851XU CN202394869U (en) 2011-11-25 2011-11-25 Base-free chip repeater sphere gate matrix packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201120473851XU CN202394869U (en) 2011-11-25 2011-11-25 Base-free chip repeater sphere gate matrix packaging structure

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Publication Number Publication Date
CN202394869U true CN202394869U (en) 2012-08-22

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102376672A (en) * 2011-11-30 2012-03-14 江苏长电科技股份有限公司 Foundation island-free ball grid array packaging structure and manufacturing method thereof
CN106409696A (en) * 2016-10-24 2017-02-15 上海凯虹科技电子有限公司 Packaging method and packaging body

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102376672A (en) * 2011-11-30 2012-03-14 江苏长电科技股份有限公司 Foundation island-free ball grid array packaging structure and manufacturing method thereof
CN106409696A (en) * 2016-10-24 2017-02-15 上海凯虹科技电子有限公司 Packaging method and packaging body

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GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20120822

CX01 Expiry of patent term