CN202344105U

CN202344105U - Width modulation type soft-switch inverter welding machine

Info

Publication number: CN202344105U
Application number: CN201120476362XU
Authority: CN
Inventors: 郭昊
Original assignee: TAIYUAN NEBULA WELDING EQUIPMENT CO Ltd
Current assignee: TAIYUAN NEBULA WELDING EQUIPMENT CO Ltd
Priority date: 2011-11-25
Filing date: 2011-11-25
Publication date: 2012-07-25
Anticipated expiration: 2021-11-25

Abstract

The utility model relates to a soft-switch inverter welding machine, and in particular relates to a width modulation type soft-switch inverter welding machine. The soft-switch inverter welding machine in the utility model can be used for solving the problem that the existing soft-switch inverter welding machine cannot implement PWM (Pulse-Width Modulation) control of a soft switch during idle load and light load. The width modulation type soft-switch inverter welding machine has a working circuit which comprises a soft switch main circuit and a soft switch drive circuit, wherein the soft switch main circuit comprises an IGBT (Insulated Gate Bipolar Translator) inverter circuit composed of first-fourth IGBT tubes connected together; absorbing capacitors are connected in parallel among power supplies of the IGBT inverter circuits; first resonance capacitors are connected in parallel between a collector electrode and an emitter electrode of the first IGBT tube; second resonance capacitors are connected in parallel between the collector electrode and the emitter electrode of the second IGBT tube; and grid electrodes of the first-fourth IGBT tubes are connected with the output end of the soft switch drive circuit. The width modulation type soft-switch inverter welding machine disclosed by the utility model effectively solves the problem that the existing soft-switch inverter welding machine cannot implement the PWM control of the soft switch, and is suitable for various welding machines.

Description

Transfer wide type soft-switching inversion welding machine

Technical field

The utility model relates to the soft-switching inversion welding machine, specifically is the wide type soft-switching inversion of a kind of accent welding machine.

Background technology

Existing soft-switching inversion welding machine adopts the PWM control technology of Fixed width phase shift type usually; The limitation of this technology is that leading arm pulsewidth is in maximum pulse width always; Turn-off time is short; When unloaded and underloading, be difficult to realize that no-voltage turns on and off, welding machine loss and IGBT stress are also bigger than hard switching circuit on the contrary when causing unloaded and underloading.Based on this, be necessary to invent a kind of brand-new soft-switching inversion welding machine, can't realize problem that soft-switch PWM control unloaded during with underloading to solve existing soft-switching inversion welding machine.

Summary of the invention

The utility model can't be realized problem that soft-switch PWM control unloaded during with underloading in order to solve existing soft-switching inversion welding machine, and the wide type soft-switching inversion of a kind of accent welding machine is provided.

The utility model is to adopt following technical scheme to realize: transfer wide type soft-switching inversion welding machine, its operating circuit comprises soft switch main circuit and soft switch driving circuit; Said soft switch main circuit comprises the IGBT inverter circuit that is made up of the connection of first-Di, four IGBT pipe; Be parallel with absorption electric capacity between the power supply of IGBT inverter circuit; Be parallel with first resonant capacitance between the colelctor electrode of the one IGBT pipe and the emitter stage; Be parallel with second resonant capacitance between the colelctor electrode of the 2nd IGBT pipe and the emitter stage; The primary coil, capacitance, the resonant inductance that are connected with between the mid point of two brachium pontis of IGBT inverter circuit by main transformer are connected in series the series arm that forms; The secondary change of current inductance that is serially connected with of active transformer; Initiatively be connected with by first diode and second diode between the positive output end of the secondary coil two ends of transformer and soft switch main circuit and connect the parallel branch that forms, be connected with by reactance and current divider between the centre tap of the secondary coil of active transformer and the negative output terminal of soft switch main circuit and be connected in series the series arm that forms; The grid of first-Di, four IGBT pipe connects the output of soft switch driving circuit.

During work, the input of IGBT inverter circuit is connected with electrical network, absorbs the transient voltage that electric capacity is used to absorb the electrical network input.The positive and negative output of soft switch main circuit plays arc circuit with the high-frequency impulse of welding machine and is connected.Through turning on and off of soft switch driving circuit control IGBT inverter circuit,, can realize the soft switch control of welding machine in conjunction with the resonance effect of first resonant capacitance, second resonant capacitance, resonant inductance.In control procedure, capacitance can prevent that the IGBT pipe that causes because of the skew of active transformer from damaging.The effect of change of current inductance is to be that former limit resonant inductance provides electric current when zero load or underloading, guarantees when zero load or underloading, also can realize soft switch.Based on said process; Compare with existing soft-switching inversion welding machine; The wide type soft-switching inversion of the described accent of the utility model welding machine is based on brand-new soft-switch PWM control circuit structure; Realized when unloaded and underloading, carrying out soft-switch PWM control, thoroughly solved existing soft-switching inversion welding machine can't be realized soft-switch PWM control when unloaded and underloading problem thus.

The utility model efficiently solves existing soft-switching inversion welding machine can't be realized soft-switch PWM control when unloaded and underloading problem, is applicable to all kinds of welding machines.

Description of drawings

Fig. 1 is the schematic diagram of the soft switch main circuit of the utility model.

Fig. 2 is the schematic diagram of the soft switch driving circuit of the utility model.

The specific embodiment

Transfer wide type soft-switching inversion welding machine, its operating circuit comprises soft switch main circuit and soft switch driving circuit;

Said soft switch main circuit comprises the IGBT inverter circuit that is made up of first-Di, four IGBT pipe K1-K4 connection; Be parallel with between the power supply of IGBT inverter circuit and absorb capacitor C 101; Be parallel with the first resonant capacitance C102 between the colelctor electrode of the one IGBT pipe K1 and the emitter stage; Be parallel with the second resonant capacitance C103 between the colelctor electrode of the 2nd IGBT pipe K2 and the emitter stage; The primary coil, capacitance C104, the resonant inductance L1 that are connected with between the mid point of two brachium pontis of IGBT inverter circuit by main transformer T3 are connected in series the series arm that forms; The secondary change of current inductance L 2 that is serially connected with of active transformer T3; Initiatively be connected with by the first diode M1 and the second diode M2 between the positive output end of the secondary coil two ends of transformer T3 and soft switch main circuit and connect the parallel branch that forms, be connected with by reactance L3 and current divider S1 between the centre tap of the secondary coil of active transformer T3 and the negative output terminal of soft switch main circuit and be connected in series the series arm that forms; The grid of first-Di, four IGBT pipe K1-K4 connects the output of soft switch driving circuit;

Said soft switch driving circuit comprises that power supply circuits, primary current sample circuit, PWM produce circuit, slope compensation circuit, under-voltage protecting circuit, setting follow circuit, lock-out pulse amplifying circuit, lagging leg signal generating circuit, drive circuit and signal indicating circuit;

Said power supply circuits comprise the first rectifier bridge B1; The input of the first rectifier bridge B1 is connected with the 5th plug J5; Be connected with by the first voltage-stablizer U8 and the second voltage-stablizer U2 between two outputs of the first rectifier bridge B1 and connect the parallel branch that forms; The output that the input of the first voltage-stablizer U8 is connected with the 31 capacitor C 31, the first voltage-stablizer U8 is connected with by the 21 capacitor C 21 and the 26 capacitor C 26 and connects the parallel branch that forms; The input of the second voltage-stablizer U2 is connected with the 23 capacitor C 23; During work; Alternating current is sent into the first rectifier bridge B1 rectification through the 5th plug J5; Rectification is after send into the first voltage-stablizer U8, the second voltage-stablizer U2 voltage stabilizing after the 31, the 23 capacitor C 23 filtering of the 31 capacitor C, and the power supply after the voltage stabilizing is given whole soft switch driving circuit power supply;

Said primary current sample circuit comprises second rectifier bridge of being made up of the first commutation diode D1, the second commutation diode D2, the 3rd commutation diode D3, the 5th commutation diode D5; The input of second rectifier bridge is connected with the second plug J2; Be connected with the 19 resistance R 19 between two outputs of second rectifier bridge; The 19 resistance R 19 two ends are connected with first partial pressure filter circuit of being made up of the 30 resistance R the 30, the 20 capacitor C the 20, the 18 capacitor C 18 and second partial pressure filter circuit of being made up of the 27 resistance R the 27, the 14 resistance R the 14, the 12 capacitor C 12 respectively; Be connected with the 31 resistance R 31 between the output of the output of first partial pressure filter circuit and the first voltage-stablizer U8; Be connected with by the 6th resistance R 6 and the 28 resistance R 28 between the output of the output of first partial pressure filter circuit and the second voltage-stablizer U2 and be connected in series the series arm that forms; The 6th resistance R 6 two ends are connected with the series arm that is formed by the 8th resistance R 8 and second capacitor C, 2 serial connections; During work; Main transformer primary current signal by the foreign current mutual inductor sample is sent into second rectifier bridge of being made up of the first commutation diode D1, the second commutation diode D2, the 3rd commutation diode D3, the 5th commutation diode D5 through the second plug J2; Current signal after the rectification becomes voltage signal by the 19 resistance R 19; The first partial pressure filter circuit filtering that this voltage signal is formed via the 30 resistance R the 30, the 20 capacitor C the 20, the 18 capacitor C 18, and add through the 31 resistance R 31 and to send into two paths of signals after the positive bias respectively: 16 pin of sending into current mode pwm chip UC3846U3 after the one tunnel second partial pressure filter circuit dividing potential drop filtering formed via the 27 resistance R the 27, the 14 resistance R the 14, the 12 capacitor C 12 constitute current foldback circuit; Another road the 28 resistance R 28, the 6th resistance R 6 dividing potential drops, and add the input current signal that 4 pin of sending into current mode pwm chip UC3846U3 after the back bias voltage constitute current mode PWM through the 6th resistance R 6;

Said PWM produces circuit and comprises current mode pwm chip UC3846U3; 16 pin of current mode pwm chip UC3846U3 connect the output of second partial pressure filter circuit; 15 pin of current mode pwm chip UC3846U3 connect the output of the first voltage-stablizer U8; Be connected with the power supply filter circuit of forming by the 22 resistance R the 22, the 15 capacitor C the 15, the 17 capacitor C 17 between 13 pin of current mode pwm chip UC3846U3 and the output of the first voltage-stablizer U8; 9 pin of current mode pwm chip UC3846U3 are connected with by the 25 resistance R the 25, the 26 resistance R 26 and connect the timer resistance circuit that forms; 8 pin of current mode pwm chip UC3846U3 are connected with by the 6th capacitor C 6, the 7th capacitor C 7 and connect the timer condenser network that forms; 2 pin of current mode pwm chip UC3846U3 are connected with the electric current restriction bleeder circuit of being made up of the tenth resistance R the 10, the 12 resistance R 12, the 9th capacitor C the 9, the 11 capacitor C 11; During work, current mode pwm chip UC3846U3 is determined the driving pulse width of 11 pin and 14 pin jointly by the maximum current limit signal of the setting voltage signal of the input current signal of 4 pin, 5 pin and 1 pin; Voltage-stabilized power supply is directly given the export structure power supply of current mode pwm chip UC3846U3 through 15 pin; After the power supply filter circuit filtering of voltage-stabilized power supply via the 22 resistance R the 22, the 15 capacitor C the 15, the 17 capacitor C 17 compositions, the control section power supply of giving UC3846 through 13 pin; The 25 resistance R the 25, the 26 resistance R 26 that is connected to the 6th capacitor C 6, the 7th capacitor C 7 of 8 pin and is connected to 9 pin constitutes the timer capacitance-resistances, frequency and the dead band of decision output PWM; Maximum current limit signal by the tenth resistance R the 10, the 12 resistance R 12, the 9th capacitor C the 9, the 11 capacitor C 11 constitute is delivered to 1 pin, the maximum primary current that decision allows;

Said slope compensation circuit comprises the first amplifier U1B; The positive input terminal of the first amplifier U1B connects 8 pin of current mode pwm chip UC3846U3; The negative input end of the first amplifier U1B connects the output of the first amplifier U1B, is connected with the 5th resistance R 5 between 4 pin of the output of the first amplifier U1B and current mode pwm chip UC3846U3; During work; The sawtooth signal of 8 pin of current mode pwm chip UC3846U3 is after the first amplifier U1B follows output; Through be added to 4 pin of UC3846U3 of the 5th resistance R 5, so just on the current signal basis, compensated a ramp signal, help the stable of whole PWM regulating circuit;

Said under-voltage protecting circuit comprises the first comparator U4B; Be connected with the 3rd partial pressure filter circuit of forming by the 33 resistance R the 33, the 34 resistance R the 34, the 24 capacitor C 24 between the output of the positive input terminal of the first comparator U4B and the first voltage-stablizer U8; The negative input end of the first comparator U4B connects 2 pin of current mode pwm chip UC3846U3; The output of the first comparator U4B connects 1 pin of current mode pwm chip UC3846U3; During work; Send into the positive input terminal of the first comparator U4B after the 3rd partial pressure filter circuit dividing potential drop filtering of voltage-stabilized power supply via the 33 resistance R the 33, the 34 resistance R the 34, the 24 capacitor C 24 compositions; The negative input end of the first comparator U4B directly connects 2 pin of current mode pwm chip UC3846U3; The output of the first comparator U4B directly connects 1 pin of current mode pwm chip UC3846U3, and when voltage-stabilized power supply voltage was on the low side, first comparator U4B output directly dragged down 1 pin of current mode pwm chip UC3846U3; Forbid PWM output, reach the purpose of under-voltage protection;

Said setting follow circuit comprises the second amplifier U1A; The 4th partial pressure filter circuit that the positive input terminal of the second amplifier U1A is connected with the 3rd plug J3 and is made up of first resistance R 1 and the 3rd capacitor C 3; The negative input end of the second amplifier U1A connects the output of the second amplifier U1A; Be connected with the 5th partial pressure filter circuit of forming by second resistance R 2 and the 8th capacitor C 8 between 5 pin of the output of the second amplifier U1A and current mode pwm chip UC3846U3; The 3rd plug J3 connects 1 pin of current mode pwm chip UC3846U3; During work; The setting voltage that the external piloting control plate provides is through the 3rd plug J3 input; After the 4th partial pressure filter circuit filtering via first resistance R 1 and the 3rd capacitor C 3 compositions; Send into the positive input terminal by the second amplifier U1A, after the 5th partial pressure filter circuit filtering of the output signal after following through amplifier via second resistance R 2 and the 8th capacitor C 8 compositions, 5 pin of delivering to current mode pwm chip UC3846U3 come the regulating impulse width; 1 pin of the 3rd plug J3 is directly connected to 1 pin of current mode pwm chip UC3846U3, and the external piloting control plate just can directly be controlled the startup of PWM and stops through this signal like this, detects whether overcurrent of drive circuit simultaneously;

Said lock-out pulse amplifying circuit comprises the second comparator U4A; The positive input terminal of the second comparator U4A connects 10 pin of current mode pwm chip UC3846U3; Be connected with the 6th partial pressure filter circuit of forming by the 16 resistance R 16 and the 25 capacitor C 25 between the output of the positive input terminal of the second comparator U4A and the first voltage-stablizer U8; Be connected with the 7th partial pressure filter circuit of forming by the 17 resistance R the 17, the 18 resistance R the 18, the 13 capacitor C 13 between the output of the negative input end of the second comparator U4A and the second voltage-stablizer U2; Be connected with the 23 resistance R 23 between the output of the output of the second comparator U4A and the second voltage-stablizer U2; During work, the synchronizing signal of 10 pin of current mode pwm chip UC3846U3 needs through being used by the back circuit after amplifying because amplitude is little.The voltage that the 7th partial pressure filter circuit of being made up of the 17 resistance R the 17, the 18 resistance R the 18, the 13 capacitor C 13 obtains the voltage-stabilized power supply dividing potential drop is delivered to the negative input end of the second comparator U4A; The synchronizing signal of current mode pwm chip UC3846U3 is sent into the positive input terminal of the second comparator U4A; The output of the second comparator U4A connects the 23 resistance R 23, and this signal is delivered to the lagging leg signal generating circuit and participated in logical operation;

Said lagging leg signal generating circuit comprises rest-set flip-flop CD4013U5, two 4 inputs or door CD4072U6 and the 4th metal-oxide-semiconductor Q4; 5 pin of 4 pin of rest-set flip-flop CD4013U5 and 11 pin, two 4 inputs or door CD4072U6 are connected the output of the second comparator U4A with 10 pin; 8 pin of rest-set flip-flop CD4013U5 connect 11 pin of current mode pwm chip UC3846U3; 10 pin of rest-set flip-flop CD4013U5 connect 14 pin of current mode pwm chip UC3846U3; 9 pin of rest-set flip-flop CD4013U5 are connected 9 pin of two 4 inputs or door CD4072U6 with 12 pin; 13 pin of rest-set flip-flop CD4013U5 connect 2 pin of two 4 inputs or door CD4072U6; 1 pin of rest-set flip-flop CD4013U5 connects 3 pin and 12 pin of two 4 inputs or door CD4072U6; The grid of the 4th metal-oxide-semiconductor Q4 connects the output of the first comparator U4B and 1 pin of pwm chip UC3846U3; The drain electrode of the 4th metal-oxide-semiconductor Q4 connects 4 pin and 11 pin of 6 pin of rest-set flip-flop CD4013U5, two 4 inputs or door CD4072U6; Be connected with the 15 resistance R 15 between the output of the drain electrode of the 4th metal-oxide-semiconductor Q4 and the first voltage-stablizer U8; During work; The A (11 pin) that current mode pwm chip UC3846U3 produces, SET (8 pin) and the RSET (10 pin) that B (14 pin) pwm signal is sent into rest-set flip-flop CD4013U5 respectively, the lock-out pulse after the second comparator U4A amplifies deliver to 5 pin and 10 pin of 11 pin of rest-set flip-flop CD4013U5, two 4 inputs or door CD4072U6 respectively.The 1 pin signal of current mode pwm chip UC3846U3 is delivered to 4 pin and 11 pin of 6 pin of rest-set flip-flop CD4013U5, two 4 inputs or door CD4072U6 respectively after the 4th metal-oxide-semiconductor Q4 and the 15 resistance R 15.When overcurrent, under-voltage and when forbidding the PWM situation takes place, the 1 pin step-down of current mode pwm chip UC3846U3, the D pin of the 4th metal-oxide-semiconductor Q4 uprises, and lagging leg output is under an embargo.13 pin of rest-set flip-flop CD4013U5 are connected to 2 pin of two 4 inputs or door CD4072U6; 12 pin of rest-set flip-flop CD4013U5 are connected to 9 pin of two 4 inputs or door CD4072U6; 1 pin of rest-set flip-flop CD4013U5 is connected to 12 pin and 3 pin of two 4 inputs or door CD4072U6, has just produced the pulse width signal of deciding of lagging leg through this cover logic circuit;

Said drive circuit comprises the one 555 timer U9, the 2 555 timer U7, the first metal-oxide-semiconductor Q1, the second metal-oxide-semiconductor Q2, the 3rd metal-oxide-semiconductor Q3, the 5th metal-oxide-semiconductor Q5, the 6th metal-oxide-semiconductor Q6, the 7th metal-oxide-semiconductor Q7, the 8th metal-oxide-semiconductor Q8, the 9th metal-oxide-semiconductor Q9, the first driving transformer T1, the second driving transformer T2, the first plug J1, the 4th plug J4; 4 pin of the one 555 timer U9 connect 13 pin of two 4 inputs or door CD4072U6; 4 pin of the 2 555 timer U7 connect 1 pin of two 4 inputs or door CD4072U6; Be connected with the 11 resistance R 11 between 14 pin of the grid of the 3rd metal-oxide-semiconductor Q3 and rest-set flip-flop CD4013U5; Be connected with the 4th resistance R 4 between 14 pin of the grid of the second metal-oxide-semiconductor Q2 and rest-set flip-flop CD4013U5; The drain electrode of the 3rd metal-oxide-semiconductor Q3 connects the drain electrode of the second metal-oxide-semiconductor Q2; Be connected with the 21 resistance R 21 between the output of the source electrode of the second metal-oxide-semiconductor Q2 and the first voltage-stablizer U8; Be connected with the 13 resistance R 13 between 11 pin of the grid of the 5th metal-oxide-semiconductor Q5 and rest-set flip-flop CD4013U5; Be connected with the 3rd resistance R 3 between 11 pin of the 6th metal-oxide-semiconductor Q6 and rest-set flip-flop CD4013U5; The drain electrode of the 5th metal-oxide-semiconductor Q5 connects the drain electrode of the 6th metal-oxide-semiconductor Q6; Be connected with the 21 resistance R 21 between the output of the source electrode of the 5th metal-oxide-semiconductor Q5 and the first voltage-stablizer U8; The elementary two ends of the first driving transformer T1 connect the drain electrode of the second metal-oxide-semiconductor Q2 and the drain electrode of the 5th metal-oxide-semiconductor Q5 respectively; Be connected with first output Shaping circuit of forming by the 4th commutation diode D4, the 9th resistance R 9, the 7th resistance R 7, the 5th capacitor C 5 and the second output Shaping circuit of forming by the 6th commutation diode D6, the 20 resistance R the 20, the 29 resistance R the 29, the 22 capacitor C 22 between the secondary and first plug J1 of the first driving transformer T1; Be connected with the 46 resistance R 46 between 3 pin of the grid of the 7th metal-oxide-semiconductor Q7 and the one 555 timer U9; Be connected with the 48 resistance R 48 between 3 pin of the grid of the 8th metal-oxide-semiconductor Q8 and the one 555 timer U9; The drain electrode of the 7th metal-oxide-semiconductor Q7 connects the drain electrode of the 8th metal-oxide-semiconductor Q8; Be connected with the 41 resistance R 41 between the output of the source electrode of the 7th metal-oxide-semiconductor Q7 and the first voltage-stablizer U8; Be connected with the 43 resistance R 43 between 3 pin of the grid of the 6th metal-oxide-semiconductor Q6 and the 2 555 timer U7; Be connected with the 44 resistance R 44 between 3 pin of the grid of the 9th metal-oxide-semiconductor Q9 and the 2 555 timer U7; The drain electrode of the 6th metal-oxide-semiconductor Q6 connects the drain electrode of the 9th metal-oxide-semiconductor Q9; Be connected with the 41 resistance R 41 between the output of the source electrode of the 6th metal-oxide-semiconductor Q6 and the first voltage-stablizer U8; The elementary two ends of the second driving transformer T2 connect the drain electrode of the 7th metal-oxide-semiconductor Q7 and the drain electrode of the 6th metal-oxide-semiconductor Q6 respectively; Be connected with the 3rd output Shaping circuit of forming by the 7th commutation diode D7, the 39 resistance R the 39, the 36 resistance R the 36, the 27 capacitor C 27 and the 4th output Shaping circuit of forming by the 8th commutation diode D8, the 45 resistance R the 45, the 47 resistance R the 47, the 33 capacitor C 33 between secondary and the 4th plug J4 of the second driving transformer T2; The first plug J1 connects the grid of IGBT pipe K1, the 2nd IGBT pipe K2; The 4th plug J4 connects the grid of the 3rd IGBT pipe K3, the 4th IGBT pipe K4; During work, the A of current mode pwm chip UC3846U3 output, B two-way PWM drive signal and drive the first metal-oxide-semiconductor Q1, the second metal-oxide-semiconductor Q2, the 3rd metal-oxide-semiconductor Q3, the 5th metal-oxide-semiconductor Q5 via the 32 resistance R the 32, the 35 resistance R the 35, the 37 resistance R the 37, the 11 resistance R 11, the 4th resistance R the 4, the 37 resistance R the 37, the 13 resistance R 13, the 3rd resistance R 3.These 4 metal-oxide-semiconductors drive the first driving transformer T1, and the secondary output two paths of signals of the first driving transformer T1 respectively by after the first output Shaping circuit and the second output Shaping circuit shaping, drives two IGBT up and down of leading arm IGBT module through the first plug J1.The lagging leg two-way pwm signal of two 4 inputs or door CD4072U6 output after the one 555 timer U9, the 2 555 timer U7 amplify, drives the 6th metal-oxide-semiconductor Q6, the 7th metal-oxide-semiconductor Q7, the 8th metal-oxide-semiconductor Q8, the 9th metal-oxide-semiconductor Q9 via the 46 resistance R the 46, the 48 resistance R the 48, the 43 resistance R the 43, the 44 resistance R 44 respectively.These 4 metal-oxide-semiconductors drive the second driving transformer T2, and the secondary output two paths of signals of the second driving transformer T2 respectively by after the 3rd output Shaping circuit and the 4th output Shaping circuit shaping, drives two IGBT up and down of lagging leg IGBT module through the 4th plug J4;

Said signal indicating circuit comprises the first light emitting diode H1 and the second light emitting diode H2 that is connected in 14 pin of current mode pwm chip UC3846U3 of 15 pin that are connected in current mode pwm chip UC3846U3; During work, the first light emitting diode H1 and the second light emitting diode H2 indicate power supply and PWM to drive respectively.

Claims

1. transfer wide type soft-switching inversion welding machine for one kind, it is characterized in that: its operating circuit comprises soft switch main circuit and soft switch driving circuit; Said soft switch main circuit comprises the IGBT inverter circuit that is connected formation by first-Di, four IGBT pipes (K1-K4); Be parallel with between the power supply of IGBT inverter circuit and absorb electric capacity (C101); Be parallel with first resonant capacitance (C102) between the colelctor electrode of the one IGBT pipe (K1) and the emitter stage; Be parallel with second resonant capacitance (C103) between the colelctor electrode of the 2nd IGBT pipe (K2) and the emitter stage; The primary coil, capacitance (C104), the resonant inductance (L1) that are connected with between the mid point of two brachium pontis of IGBT inverter circuit by main transformer (T3) are connected in series the series arm that forms; The secondary change of current inductance (L2) that is serially connected with of active transformer (T3); Initiatively be connected with by first diode (M1) and second diode (M2) between the positive output end of the secondary coil two ends of transformer (T3) and soft switch main circuit and connect the parallel branch that forms, be connected with by reactance (L3) and current divider (S1) between the centre tap of the secondary coil of active transformer (T3) and the negative output terminal of soft switch main circuit and be connected in series the series arm that forms; The grid of first-Di, four IGBT pipes (K1-K4) connects the output of soft switch driving circuit.

2. the wide type soft-switching inversion of accent according to claim 1 welding machine is characterized in that: said soft switch driving circuit comprises that power supply circuits, primary current sample circuit, PWM produce circuit, slope compensation circuit, under-voltage protecting circuit, setting follow circuit, lock-out pulse amplifying circuit, lagging leg signal generating circuit, drive circuit and signal indicating circuit;

Said power supply circuits comprise first rectifier bridge (B1); The input of first rectifier bridge (B1) is connected with the 5th plug (J5); Be connected with by first voltage-stablizer (U8) and second voltage-stablizer (U2) between two outputs of first rectifier bridge (B1) and connect the parallel branch that forms; The input of first voltage-stablizer (U8) is connected with the 31 electric capacity (C31), and the output of first voltage-stablizer (U8) is connected with by the 21 electric capacity (C21) and the 26 electric capacity (C26) and connects the parallel branch that forms; The input of second voltage-stablizer (U2) is connected with the 23 electric capacity (C23);

Said primary current sample circuit comprises second rectifier bridge of being made up of first commutation diode (D1), second commutation diode (D2), the 3rd commutation diode (D3), the 5th commutation diode (D5); The input of second rectifier bridge is connected with second plug (J2); Be connected with the 19 resistance (R19) between two outputs of second rectifier bridge; The 19 resistance (R19) two ends are connected with first partial pressure filter circuit of being made up of the 30 resistance (R30), the 20 electric capacity (C20), the 18 electric capacity (C18) and second partial pressure filter circuit of being made up of the 27 resistance (R27), the 14 resistance (R14), the 12 electric capacity (C12) respectively; Be connected with the 31 resistance (R31) between the output of the output of first partial pressure filter circuit and first voltage-stablizer (U8); Be connected with by the 6th resistance (R6) and the 28 resistance (R28) between the output of the output of first partial pressure filter circuit and second voltage-stablizer (U2) and be connected in series the series arm that forms; The 6th resistance (R6) two ends are connected with the series arm that is formed by the 8th resistance (R8) and second electric capacity (C2) serial connection;

Said PWM produces circuit and comprises current mode pwm chip UC3846 (U3); 16 pin of current mode pwm chip UC3846 (U3) connect the output of second partial pressure filter circuit; 15 pin of current mode pwm chip UC3846 (U3) connect the output of first voltage-stablizer (U8); Be connected with the power supply filter circuit of forming by the 22 resistance (R22), the 15 electric capacity (C15), the 17 electric capacity (C17) between the output of 13 pin of current mode pwm chip UC3846 (U3) and first voltage-stablizer (U8); 9 pin of current mode pwm chip UC3846 (U3) are connected with by the 25 resistance (R25), the 26 resistance (R26) and connect the timer resistance circuit that forms; 8 pin of current mode pwm chip UC3846 (U3) are connected with by the 6th electric capacity (C6), the 7th electric capacity (C7) and connect the timer condenser network that forms; 2 pin of current mode pwm chip UC3846 (U3) are connected with the electric current restriction bleeder circuit of being made up of the tenth resistance (R10), the 12 resistance (R12), the 9th electric capacity (C9), the 11 electric capacity (C11);

Said slope compensation circuit comprises first amplifier (U1B); The positive input terminal of first amplifier (U1B) connects 8 pin of current mode pwm chip UC3846 (U3); The negative input end of first amplifier (U1B) connects the output of first amplifier (U1B), is connected with the 5th resistance (R5) between 4 pin of the output of first amplifier (U1B) and current mode pwm chip UC3846 (U3);

Said under-voltage protecting circuit comprises first comparator (U4B); Be connected with the 3rd partial pressure filter circuit of forming by the 33 resistance (R33), the 34 resistance (R34), the 24 electric capacity (C24) between the output of the positive input terminal of first comparator (U4B) and first voltage-stablizer (U8); The negative input end of first comparator (U4B) connects 2 pin of current mode pwm chip UC3846 (U3); The output of first comparator (U4B) connects 1 pin of current mode pwm chip UC3846 (U3);

Said setting follow circuit comprises second amplifier (U1A); The 4th partial pressure filter circuit that the positive input terminal of second amplifier (U1A) is connected with the 3rd plug (J3) and is made up of first resistance (R1) and the 3rd electric capacity (C3); The negative input end of second amplifier (U1A) connects the output of second amplifier (U1A); Be connected with the 5th partial pressure filter circuit of forming by second resistance (R2) and the 8th electric capacity (C8) between 5 pin of the output of second amplifier (U1A) and current mode pwm chip UC3846 (U3); The 3rd plug (J3) connects 1 pin of current mode pwm chip UC3846 (U3);

Said lock-out pulse amplifying circuit comprises second comparator (U4A); The positive input terminal of second comparator (U4A) connects 10 pin of current mode pwm chip UC3846 (U3); Be connected with the 6th partial pressure filter circuit of forming by the 16 resistance (R16) and the 25 electric capacity (C25) between the output of the positive input terminal of second comparator (U4A) and first voltage-stablizer (U8); Be connected with the 7th partial pressure filter circuit of forming by the 17 resistance (R17), the 18 resistance (R18), the 13 electric capacity (C13) between the output of the negative input end of second comparator (U4A) and second voltage-stablizer (U2); Be connected with the 23 resistance (R23) between the output of the output of second comparator (U4A) and second voltage-stablizer (U2);

Said lagging leg signal generating circuit comprises rest-set flip-flop CD4013 (U5), two 4 inputs or door CD4072 (U6) and the 4th metal-oxide-semiconductor (Q4); 5 pin of 4 pin of rest-set flip-flop CD4013 (U5) and 11 pin, two 4 inputs or door CD4072 (U6) are connected the output of second comparator (U4A) with 10 pin; 8 pin of rest-set flip-flop CD4013 (U5) connect 11 pin of current mode pwm chip UC3846 (U3); 10 pin of rest-set flip-flop CD4013 (U5) connect 14 pin of current mode pwm chip UC3846 (U3); 9 pin of rest-set flip-flop CD4013 (U5) are connected 9 pin of two 4 inputs or door CD4072 (U6) with 12 pin; 13 pin of rest-set flip-flop CD4013 (U5) connect 2 pin of two 4 inputs or door CD4072 (U6); 1 pin of rest-set flip-flop CD4013 (U5) connects 3 pin and 12 pin of two 4 inputs or door CD4072 (U6); The grid of the 4th metal-oxide-semiconductor (Q4) connects the output of first comparator (U4B) and 1 pin of pwm chip UC3846 (U3); The drain electrode of the 4th metal-oxide-semiconductor (Q4) connects 4 pin and 11 pin of 6 pin of rest-set flip-flop CD4013 (U5), two 4 inputs or door CD4072 (U6); Be connected with the 15 resistance (R15) between the output of the drain electrode of the 4th metal-oxide-semiconductor (Q4) and first voltage-stablizer (U8);

Said drive circuit comprises the one 555 timer (U9), the 2 555 timer (U7), first metal-oxide-semiconductor (Q1), second metal-oxide-semiconductor (Q2), the 3rd metal-oxide-semiconductor (Q3), the 5th metal-oxide-semiconductor (Q5), the 6th metal-oxide-semiconductor (Q6), the 7th metal-oxide-semiconductor (Q7), the 8th metal-oxide-semiconductor (Q8), the 9th metal-oxide-semiconductor (Q9), first driving transformer (T1), second driving transformer (T2), first plug (J1), the 4th plug (J4); 4 pin of the one 555 timer (U9) connect 13 pin of two 4 inputs or door CD4072 (U6); 4 pin of the 2 555 timer (U7) connect 1 pin of two 4 inputs or door CD4072 (U6); Be connected with the 11 resistance (R11) between 14 pin of the grid of the 3rd metal-oxide-semiconductor (Q3) and rest-set flip-flop CD4013 (U5); Be connected with the 4th resistance (R4) between 14 pin of the grid of second metal-oxide-semiconductor (Q2) and rest-set flip-flop CD4013 (U5); The drain electrode of the 3rd metal-oxide-semiconductor (Q3) connects the drain electrode of second metal-oxide-semiconductor (Q2); Be connected with the 21 resistance (R21) between the output of the source electrode of second metal-oxide-semiconductor (Q2) and first voltage-stablizer (U8); Be connected with the 13 resistance (R13) between 11 pin of the grid of the 5th metal-oxide-semiconductor (Q5) and rest-set flip-flop CD4013 (U5); Be connected with the 3rd resistance (R3) between 11 pin of the 6th metal-oxide-semiconductor (Q6) and rest-set flip-flop CD4013 (U5); The drain electrode of the 5th metal-oxide-semiconductor (Q5) connects the drain electrode of the 6th metal-oxide-semiconductor (Q6); Be connected with the 21 resistance (R21) between the output of the source electrode of the 5th metal-oxide-semiconductor (Q5) and first voltage-stablizer (U8); The elementary two ends of first driving transformer (T1) connect the drain electrode of second metal-oxide-semiconductor (Q2) and the drain electrode of the 5th metal-oxide-semiconductor (Q5) respectively; Be connected with first output Shaping circuit of forming by the 4th commutation diode (D4), the 9th resistance (R9), the 7th resistance (R7), the 5th electric capacity (C5) and the second output Shaping circuit of forming by the 6th commutation diode (D6), the 20 resistance (R20), the 29 resistance (R29), the 22 electric capacity (C22) between secondary and first plug (J1) of first driving transformer (T1); Be connected with the 46 resistance (R46) between the grid of the 7th metal-oxide-semiconductor (Q7) and 3 pin of the one 555 timer (U9); Be connected with the 48 resistance (R48) between the grid of the 8th metal-oxide-semiconductor (Q8) and 3 pin of the one 555 timer (U9); The drain electrode of the 7th metal-oxide-semiconductor (Q7) connects the drain electrode of the 8th metal-oxide-semiconductor (Q8); Be connected with the 41 resistance (R41) between the output of the source electrode of the 7th metal-oxide-semiconductor (Q7) and first voltage-stablizer (U8); Be connected with the 43 resistance (R43) between the grid of the 6th metal-oxide-semiconductor (Q6) and 3 pin of the 2 555 timer (U7); Be connected with the 44 resistance (R44) between the grid of the 9th metal-oxide-semiconductor (Q9) and 3 pin of the 2 555 timer (U7); The drain electrode of the 6th metal-oxide-semiconductor (Q6) connects the drain electrode of the 9th metal-oxide-semiconductor (Q9); Be connected with the 41 resistance (R41) between the output of the source electrode of the 6th metal-oxide-semiconductor (Q6) and first voltage-stablizer (U8); The elementary two ends of second driving transformer (T2) connect the drain electrode of the 7th metal-oxide-semiconductor (Q7) and the drain electrode of the 6th metal-oxide-semiconductor (Q6) respectively; Be connected with the 3rd output Shaping circuit of forming by the 7th commutation diode (D7), the 39 resistance (R39), the 36 resistance (R36), the 27 electric capacity (C27) and the 4th output Shaping circuit of forming by the 8th commutation diode (D8), the 45 resistance (R45), the 47 resistance (R47), the 33 electric capacity (C33) between secondary and the 4th plug (J4) of second driving transformer (T2); First plug (J1) connects the grid of IGBT pipe (K1), the 2nd IGBT pipe (K2); The 4th plug (J4) connects the grid of the 3rd IGBT pipe (K3), the 4th IGBT pipe (K4);

Said signal indicating circuit comprises first light emitting diode (H1) of 15 pin that are connected in current mode pwm chip UC3846 (U3) and is connected in second light emitting diode (H2) of 14 pin of current mode pwm chip UC3846 (U3).