CN202339544U - Multi-channel and multi-rate avionic communication device based on USB (universal serial bus) interface - Google Patents

Abstract

The utility model discloses a multi-channel and multi-rate avionic communication device based on a USB (universal serial bus) interface. The multi-channel and multi-rate avionic communication device is characterized in that a PC (personal computer) is connected with a socket at one end of the USB interface, and the other end of the USB interface is connected with an FPGA (field programmable gate array) module; and the FPGA module is connected with a J30J avionic plug by an MIL-STD-1553B (military standard) transceiver, an RS485 (remote sensing 485) transceiver, an RS232 transceiver, an ARINC429 (aeronautical radio inc 429) driver and an ARINC429 receiver. The multi-channel and multi-rate avionic communication device disclosed by the utility model has the advantages that data sent by the PC is stored into a buffer memory of the FPGA by virtue of a USB interface chip, the FPGA recodes the data according to the need of all the interfaces and transmits the recoded data from corresponding ports so as to realize data transmitting; and conversely, the FPGA also can analyze the data sent back from different ports, store the data into the buffer memory, and transmit the data into the PC by virtue of the USB interface chip so as to realize data reception.

Description

A kind of many speed of hyperchannel avionics communication device based on the usb bus interface

Technical field

The utility model belongs to the aviation electronics communication technique field, relates to a kind of many speed of hyperchannel avionics communication device based on the usb bus interface.

Background technology

One, FPGA introduces:

FPGA (Field-Programmable Gate Array), i.e. field programmable gate array, it is the product that on the basis of programming devices such as PAL, GAL, CPLD, further develops.It occurs as a kind of semi-custom circuit in special IC (ASIC) field, has both solved the deficiency of custom circuit, has overcome the limited shortcoming of original programming device gate circuit number again.

FPGA has adopted the such notion of logical cell array LCA (Logic Cell Array), and inside comprises configurable logic blocks CLB (Configurable Logic Block), output load module IOB (Input Output Block) and three parts of interconnector (Interconnect).Field programmable gate array (FPGA) is a programming device.With traditional logic circuit and gate array (like PAL; GAL and CPLD device) compare, FPGA has various structure, and FPGA utilizes small-sized look-up table, and (16 * 1RAM) realize combinational logic; Each look-up table is connected to the input end of a d type flip flop; Trigger drives other logical circuits again or drives I/O, has constituted thus to realize that combination logic function can realize the basic logic unit module of sequential logic function again, and these intermodules utilize metal connecting line to connect mutually or are connected to the I/O module.The logic of FPGA realizes through loading programming data to inner static storage cell; Being stored in value in the memory cell has determined between logic function and each module of logical block or the connecting mode between module and I/O; And final decision the FPGA function that can realize, FPGA allows unlimited programming.

Two, USB introduces:

USB is the abbreviation of English Universal Serial BUS (USB), and " logical getting lines crossed is being an external bus standard, is used for being connected and communication of standard computer and external unit and its Chinese abbreviates as.It is the interfacing that is applied in the PC field.The plug and play of USB interface support equipment and hot plug function.USB will unite proposition in the end of the year 1994 by many companies such as Intel, Compaq, IBM, icrosoft.

USB interface can be used for connecting nearly 127 peripheral hardwares, like mouse, modulator-demodular unit and keyboard etc.USB successfully substitutes serial ports and parallel port after releasing in 1996, and becomes one of the interface that must join of current PC and a large amount of smart machines.

Each version difference version peak transfer rate speed title maximum output current agreement of USB is released time: USB1.0:1.5Mbps (192KB/s) low speed (Low-Speed) 500mA ... In January, 1996,

USB1.1:12Mbps (1.5MB/s) is (Full-Speed) 500mA at full speed ... In September, 1998,

USB2.0:480Mbps (60MB/s) is (High-Speed) 500mA at a high speed ... In April, 2000,

USB3.0:5Gbps (640MB/s) (Super-Speed) 900mA that exceeds the speed limit ... In November, 2008,

Three, ARINC429 introduces

To be the US Airways electronic engineering council (Airlines Engineering Committee) propose in July, 1977 the ARINC429 bus protocol, and in the use of delivering and get the Green Light of same month in the same year.Its full name is digital information transmission system DITS.Consensus standard has been stipulated the digital information transmission requirement between avionic device and relevant system.ARINC429 is widely used in the advanced airline carriers of passengers, and like B-737, B757, B-767, military aircraft made in Russia has also been selected similar techniques for use.

The ARINC429 bus structure are simple, stable performance, strong interference immunity.Maximum advantage is that reliability is high, and this is because decentralized control, transmission is reliable, the mistake isolation is good.

Four, the MIL-STD-1553B transceiver is introduced

The MIL-STD-1553B standard be the U.S. SAE A2K council under the support of the military and industry member with the signal multiplex system standard of announcing in 1973 1980, USAF is again to having made local modification and having replenished.One of integrated basis with standardized management as U.S. Department of Defense's armament systems of this standard is widely used in airplane synthetic avionics system, plug-in property management reason and integrated system, and progressively expands to fields such as system such as flight control and tank, naval vessel, space flight.It is used for airplane avionics system by USAF at first, has been widely used in the US and European sea, land and sky army at present, and is becoming a kind of international standard.China has issued the corresponding mark GJB289 " digital time-devision system instruction/response type multiplex data bus " of army in 1987.

Five, RS-232, RS-422 and RS-485 introduce

RS-232, RS-422 and RS-485 are the serial data interface standards; All worked out and issue by Electronic Industries Association (EIA) at first, RS-232 is at issue in 1962, called after EIA-232-E; As industrial standard, to guarantee the compatibility between the different manufacturers product.RS-422 is by the RS-232 development, and it proposes for the deficiency that remedies RS-232.For improving the shortcoming that the RS-232 communication distance is short, speed is low; RS-422 has defined a kind of balanced communication interface; Transfer rate is brought up to 10Mb/s, and transmission range extends to 4000 feet (when speed is lower than 100kb/s), and allows on a balance bus, to connect maximum 10 receivers.RS-422 is unidirectional, the balance transmission standard that a kind of unit sends, multimachine receives, and is named as the TIA/EIA-422-A standard.Be the expanded application scope; EIA has formulated the RS-485 standard in nineteen eighty-three again on the RS-422 basis; Increase multiple spot, two-way communications capabilities, promptly allowed a plurality of transmitters to be connected on same the bus, increased the driving force and conflict protection feature of transmitter simultaneously; Expanded the bus common mode range, back called after TIA/EIA-485-A standard.Because the recommended standard that EIA proposes all is as prefix, so in the telecommunications industry field, still be accustomed to above-mentioned standard is made the prefix appellation with RS with " RS ".

Summary of the invention

The purpose of the utility model provides a kind of many speed of hyperchannel avionics communication device based on the usb bus interface; Solved under the prior art condition; General data-switching communication module; All be between two kinds of data-interfaces, to change, transmit, and multiple communication modes can not compatible simultaneously problem.

The technical scheme that the utility model adopted is; A kind of many speed of hyperchannel avionics communication device based on the usb bus interface; Comprise upper PC; PC is connected with USB interface one end socket, and USB interface other end socket is connected with the FPGA module, and the FPGA module is connected with the J30J aviation plug through MIL-STD-1553B transceiver, RS485 transceiver, RS232 transceiver, ARINC429 driver, ARINC429 receiver simultaneously.

The beneficial effect of the utility model is; But utilize the characteristics of USB plug and play, FPGA field programmable gate array flexible configuration; On the basis of the consensus standard of MIL-STD-1553B, ARINC429 and RS485, RS232; Utilize variety of protocol chip and FPGA IP kernel; Produced the interface modular converter of collection MIL-STD-1553B, ARINC429 and RS485, RS232 and one, accomplished the Data Format Transform of USB simultaneously, realized the conversion of data from the USB interface to the various interface to MIL-STD-1553B, ARINC429, RS485 and RS232; And these different data layout data are to be connected with external unit through same connector, and are easy to use; The user writes upper computer software according to the actual needs of oneself, just can realize PC to the reception of data, transmission, supervision etc., or as the data transfer between devices passage.

Description of drawings

Fig. 1 is that the hardware of many speed of hyperchannel avionics communication device of the utility model connects block diagram.

Among the figure, 1.PC machine, 2.USB interface, 3.FPGA module, 4.MIL-STD-1553B transceiver, 5.RS485 transceiver, 6.RS232 transceiver, 7.ARINC429 driver, 8.ARINC429 receiver, 9.J30J aviation plug.

Embodiment

Below in conjunction with accompanying drawing and embodiment the utility model is elaborated.

As shown in Figure 1; The hardware syndeton of many speed of the utility model hyperchannel avionics communication device is; Comprise upper PC 1; PC 1 is connected with USB interface 2 one end sockets, and USB interface 2 other end sockets are connected with FPGA module 3, FPGA module 3 simultaneously through MIL-STD-1553B transceiver 4, RS485 transceiver 5, RS232 transceiver 6, ARINC429 driver 7, ARINC429 receiver 8 totally five parts be connected with J30J aviation plug 9.

The functional characteristic of the utility model avionics communication device comprises: support USB2.0; Adopting the inner arm processor of FPGA is the core of controlling schemes; Can realize that following mode signal connects: the conversion that 4 passages receive, 4 passages send MIL-STD-1553B transceiver data and USB interface data; The conversion that 6 passages receive, 6 passages send RS-486 bus data and USB interface data; The conversion that 1 passage receives, 1 passage sends RS-232 bus data and USB interface data, the conversion that 2 passages receive, 2 passages send ARINC 429 bus datas and USB interface data.

MIL-STD-1553B, RS485, RS232 and ARINC429 bus signals are all drawn through the J330J aviation plug.The input/output signal of MIL-STD-1553B transceiver 4 adopts coil to isolate transmission.

Preferred 140mm * the 80mm of PCB physical size.

The power supply of the utility model avionics communication device is through the direct current supply of DC seat or through the USB interface power supply, the client selects the power supply power supply mode as required.

ARINC 429 sendaisles through the J30J plug by externally fed:

V+＝12V～15V，V-＝-12V～-15V。

ARINC 429 receiving cables are by PCB in-line power: VCC=3.3V.

The transceiver of MIL-STD-1553B, RS485 and RS232 is by PCB in-line power VDD=3.3V.

Below be the specific descriptions of each parts (module):

One, MIL-STD-1553B transceiver part:

The MIL-STD-1553B transceiver provides BC, RT function, and software selectively operating pattern, baud rate are 1MHZ, and every road serial ports sends and receives FIFO and is 1024 bytes

BC pattern: automatic BC retry, optional 1～2 time of number of times; The retry passage is optional, supports event message, periodic messages, resolution 1ms; The message interbody spacer can be established, resolution 1 μ s; Provide and interrupt and inquire about two kinds of message and read mode, adopt the mode of chained list to come administrative messag, can dynamically insert or revise event message; The time tag function;

RT pattern: illegal command table function; Provide and interrupt and inquire about two kinds of message and read mode; The time tag function;

MT pattern: command word filtering function; Adopt circular buffering to receive data; Inquiry mode reads message; The time tag function.

Two, RS485 transceiver part:

Serial data position transformat: baud rate, data bit length, position of rest length and parity checking pattern (all can be provided with), every road serial ports have transmission, the reception FIFO of 2047 bytes; The reception of single channel control data enables.

Three, RS232 transceiver part:

Serial data position transformat: baud rate, data bit length, position of rest length and parity checking pattern (all can be provided with), every road serial ports have transmission, the reception FIFO of 2047 bytes; The reception of single channel control data enables.

Four, ARINC 429 drivers and ARINC 429 receiver parts:

The transmission of ARINC 429 modules and reception independently are provided with respectively and work alone respectively, send 1023 ARINC429 words of FIFO, receive FIFO 512K ARINC429 word; Interrupt and inquire about two kinds of working methods.

Output:

Send baud rate 10KHZ～150KHZ default baud rate 100KHZ can be set.It is 1023 ARINC429 words that the FIFO size is sent on each road.Sending data bit is 25 or 32.Sending word space can be provided with, and is unit with half ARINC429 data bit, is defaulted as 4 bit intervals.Sending parity checking or no parity check can establish.

Normal transmission mode: the data of at every turn only sending a frame.

The timed sending pattern:

--when being set to ' 0 ', sends the timed sending number of times data always, otherwise by the number of times that is provided with.

Send data:

--sending message interval can be provided with, and precision is 10us.

--the frame period of message must be set when sending data, and frame period must be not less than the length (promptly all data add the length of all word intervals) of a frame message.

Input:

Baud rate 10KHZ～150KHZ can be provided with, default baud rate 100KHZ.It is 512K ARINC 429 words that each road receives the FIFO size.25 or 32 of data bit.。Parity checking or no parity check.Add time tag.

SD and label filter:

--SD is for receiving the D12～D11 of data during data-switching, and label is D7～D0.

--SD was not for receiving the D9～D8 of data when data were not changed, and label is D7～D0.

Inquiry and the receive mode of interrupting:

--when interrupting receiving the triggering degree of depth can be set, come reading of data by triggering the degree of depth.

--when receiving, inquiry comes reading of data according to data volume.

Receive and send data-switching (when acquiescence and normal the use is conversion), send on each road and reception can be provided with conversion separately and not change.

Send conversion:

--during conversion data are sent data, the i.e. data layout of data fit ARINC429 on the ARINC429 data bus according to the ARINC429 data layout of standard.

--be that the data that write serial is from low to high sent when not changing, promptly the data on the ARINC429 data bus are the data arrangements from low to high of sending.

Receive conversion:

--during conversion the standard A RINC429 data that receive are changed, opposite with the conversion regime that sends.Specifically see the operation of the conversion portion of driving interface explanation.

USB interface-based many speed of hyperchannel avionics communication device of the utility model, upper PC are realized the transmitting-receiving of data through VC.The data that the USB interface chip sends PC deposit in the buffer memory of FPGA, and FPGA, and sends from corresponding ports the data recompile according to each interface needs, sends to realize data.Otherwise FPGA deposits in the buffer memory after also can different port being beamed back next data parsing, sends to PC through the USB interface chip, to realize the reception of data.

Claims (2)

1. many speed of hyperchannel avionics communication device based on the usb bus interface; Its characteristics are: comprise upper PC (1); PC (1) is connected with USB interface (2) one end sockets; USB interface (2) other end socket is connected with FPGA module (3), and FPGA module (3) is connected with J30J aviation plug (9) through MIL-STD-1553B transceiver (4), RS485 transceiver (5), RS232 transceiver (6), ARINC429 driver (7), ARINC429 receiver (8) simultaneously.

2. many speed of the hyperchannel avionics communication device based on the usb bus interface according to claim 1, its characteristics are: the power supply of described each module is through the DC seat or through the USB interface power supply.

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