CN202334710U - High-speed image acquisition and compression storage system - Google Patents
High-speed image acquisition and compression storage system Download PDFInfo
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- CN202334710U CN202334710U CN 201120487064 CN201120487064U CN202334710U CN 202334710 U CN202334710 U CN 202334710U CN 201120487064 CN201120487064 CN 201120487064 CN 201120487064 U CN201120487064 U CN 201120487064U CN 202334710 U CN202334710 U CN 202334710U
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Abstract
The utility model discloses a high-speed image acquisition and compression storage system which comprises a high-speed image acquisition module, a compression module connected with the high-speed image acquisition module, and a storage module connected with the compression module. The high-speed image acquisition and compression storage system disclosed by the utility model can realize real-time compressed encoding on high-speed image information by adopting a large-scale programmable logic unit, a high-performance DSP (digital signal processing) processor and the storage module, further can perform real-time storage and realize high-speed download and display on the ground; and the system has the advantages of high reliability, small volume, low power consumption, high image compression efficiency, good recovery quality and the like.
Description
Technical field
The utility model relates to technical field of image processing, particularly relates to a kind of high-speed image sampling and compression memory system.
Background technology
Along with the progress of network technology and the arrival of information age, people have all had brand-new demand to the mode and the quality of information, interchange.And as landmark of information era, multimedia communication, particularly video communication have produced tremendous influence to people's life especially.
According to statistics, the human information of obtaining through vision accounts for and all obtains 70% of information.Yet the video information after the video information, particularly digitlization has mass data property.For example, the coloured image of one 640 * 480 intermediate resolution, its data volume is approximately 0.92MByte.So big image, transmission rate estimate that with 4kb/s intactly transmitting this width of cloth figure needs 230s, just near 4min.Suppose it is video telephone, perhaps digital broadcast television is play 30 frames with per second and is calculated, and can only deposit the video information of about 24s in the CD of a 600MByte, has said nothing of in the effect of transmission over networks.This causes very big difficulty for the storage and the transmission of information, has become human one of the bottleneck problem of information of obtaining effectively and use.
The utility model content
The technical problem that (one) will solve
The technical problem that the utility model will solve is how to realize the high-quality collection and the picture compression efficiency of high speed image.
(2) technical scheme
In order to solve the problems of the technologies described above, the utility model provides a kind of high-speed image sampling and compression memory system, and it comprises the high-speed image sampling module, the compression module that links to each other with the high-speed image sampling module, and the memory module that links to each other with compression module.
Wherein, said high-speed image sampling module comprises video camera and the FPGA image acquisition units that links to each other with video camera.
Wherein, said FPGA image acquisition units connects the timing signal module.
Wherein, said compression module comprises the DSP compression unit, and it links to each other with memory module with said FPGA image acquisition units respectively.
Wherein, said video camera front end is provided with optical lens, and radome fairing is installed on the optical lens.
Wherein, said optical lens is fixed on the video camera through ring flange.
Wherein, also comprise power module, link to each other with high-speed image sampling module, compression module and memory module respectively.
Wherein, said memory module comprises the storage matrix that the Flash chip is formed.
(3) beneficial effect
High-speed image sampling that technique scheme provided and compression memory system; Adopt extensive programmable logic cells, High Performance DSP processor and memory module; Realization is to the Real Time Compression of high speed image information coding, and carries out real-time storage, can high-speed downloads and demonstration on ground; This system has the reliability height, volume is little, low in energy consumption, picture compression efficiency is high, recover characteristics such as quality is good.
Description of drawings
Fig. 1 is the high-speed image sampling of the utility model embodiment and the structured flowchart of compression memory system;
Fig. 2 is the structural representation of video camera among the utility model embodiment.
Wherein, 1: video camera; 2: optical lens; 3: radome fairing.
Embodiment
Below in conjunction with accompanying drawing and embodiment, the embodiment of the utility model is described in further detail.Following examples are used to explain the utility model, but are not used for limiting the scope of the utility model.
Fig. 1 shows the high-speed image sampling of present embodiment and the structured flowchart of compression memory system, and Fig. 2 is the structural representation of video camera in the present embodiment.Present embodiment high-speed image sampling and compression memory system comprise the high-speed image sampling module, the compression module that links to each other with the high-speed image sampling module, and the memory module that links to each other with compression module.
Particularly, said high-speed image sampling module comprises video camera and the FPGA image acquisition units that links to each other with video camera.The FPGA image acquisition units connects the timing signal module.Said compression module comprises the DSP compression unit, and it links to each other with memory module with said FPGA image acquisition units respectively.
Present embodiment is gathered compression module and mainly is responsible for the view data of video camera output is resolved and changed, and implements Real Time Compression and storage control, realizes externally regularly interface control simultaneously.Compression standard adopts H.264 standard, realizes Real Time Compression and storage control to the high speed image signal.
In the compression memory pattern, power on and read the countdown parameter, and system is got into the countdown packed record according to parameter value, when the external world is provided with this countdown parameter through network interface after, need compression module be restarted and got into countdown again.Countdown finishes; Compression module is at first resolved differential signal and is converted original video data into, and in FPGA, carries out buffer memory, and DSP obtains the original video data of FPGA buffer memory through interface; Form compressed bit stream after the Real Time Compression, the interface through DSP is stored to memory module.In the data downloading mode, data recorded is transferred to the storage of download machine through network interface.
As shown in Figure 2, video camera 1 front end of present embodiment is provided with optical lens 2, and radome fairing 3 is installed on the optical lens 2.Optical lens 2 is fixed on the video camera 1 through ring flange.
Radome fairing 3 adopts two approximate curved surfaces to form, and be equivalent to a glass plate after the combination, but curved surface can reduce the impact of outer gas stream, improves the stability of IMAQ.And radome fairing 3 is used to isolate internal and external environment, adopts the extraordinary quartz material of intensity to process, and can have protective effect to inner vitals.
Memory module adopts the Flash chip to form storage matrix in the present embodiment, is designed to standard 44 core ide interfaces, and memory capacity is not less than 4GB, when the packed data rate is 4Mbps, is not less than 90min memory time.This module is supported PIO, DMA, UMDA transmission mode, and continuing reading and writing speed is 10MB/s, 8MB/s, and temperature range is-45 ℃～+ 85 ℃, and low temperature can reach-55 ℃ after screening, and has high impact resistance, shock resistance.
Power module be used for on the machine+28V power supply input be converted into the recording equipment needs+5V ,+12V VD.Power module has output overcurrent, short circuit, over-voltage protecting function.Comparatively ripe circuit is adopted in the design of power module, mainly by+5V DC change-over circuit ,+12V DC change-over circuit, output filter circuit, output protection circuit, input filtering and import several parts such as under-voltage deixis and form.
The input filtering function realizes through using filter, as far as possible near power input, generally directly be fixed to the enclosure power connector after; The accumulator that boosts can be kept the normal output services of power module in under-voltage moment, present system's this function that is unrealized, but reserved this function expansion; The single channel output DC/DC module that the DC/DC change-over circuit selects for use U.S. Vicor company design to produce, respectively realizations+5V and+the DC/DC conversion of 12V; Output protection circuit makes native system have overcurrent, short circuit and over-voltage protecting function.
The mode of operation of present embodiment system is divided into compression memory pattern and data downloading mode; At first will be under first kind of mode of operation according to the timing signal countdown information startup work that is provided with; The wide visual field scene of after the startup work video camera being taken is transmitted with low voltage difference; Arrive the IMAQ compression module, after resolving, form raw video signal, send into the memory module storage after the Real Time Compression; In downloading mode, carry out data high-speed through network interface and download.
Can find out by above embodiment; The utility model embodiment adopts extensive programmable logic cells, High Performance DSP processor and memory module; Realization is to the Real Time Compression of high speed image information coding, and carries out real-time storage, can high-speed downloads and demonstration on ground; This system has the reliability height, volume is little, low in energy consumption, picture compression efficiency is high, recover characteristics such as quality is good.
The above only is the preferred implementation of the utility model; Should be understood that; For those skilled in the art; Under the prerequisite that does not break away from the utility model know-why, can also make some improvement and replacement, these improvement and replacement also should be regarded as the protection range of the utility model.
Claims (8)
1. high-speed image sampling and compression memory system is characterized in that, comprise the high-speed image sampling module, the compression module that links to each other with the high-speed image sampling module, and the memory module that links to each other with compression module.
2. high-speed image sampling as claimed in claim 1 and compression memory system is characterized in that, said high-speed image sampling module comprises video camera and the FPGA image acquisition units that links to each other with video camera.
3. high-speed image sampling as claimed in claim 2 and compression memory system is characterized in that, said FPGA image acquisition units connects the timing signal module.
4. high-speed image sampling as claimed in claim 1 and compression memory system is characterized in that said compression module comprises the DSP compression unit, and it links to each other with memory module with said FPGA image acquisition units respectively.
5. high-speed image sampling as claimed in claim 2 and compression memory system is characterized in that, said video camera front end is provided with optical lens, and radome fairing is installed on the optical lens.
6. high-speed image sampling as claimed in claim 5 and compression memory system is characterized in that said optical lens is fixed on the video camera through ring flange.
7. high-speed image sampling as claimed in claim 1 and compression memory system is characterized in that, also comprise power module, link to each other with high-speed image sampling module, compression module and memory module respectively.
8. high-speed image sampling as claimed in claim 1 and compression memory system is characterized in that, said memory module comprises the storage matrix that the Flash chip is formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201120487064 CN202334710U (en) | 2011-11-30 | 2011-11-30 | High-speed image acquisition and compression storage system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201120487064 CN202334710U (en) | 2011-11-30 | 2011-11-30 | High-speed image acquisition and compression storage system |
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| CN202334710U true CN202334710U (en) | 2012-07-11 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 201120487064 Expired - Fee Related CN202334710U (en) | 2011-11-30 | 2011-11-30 | High-speed image acquisition and compression storage system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103698682B (en) * | 2013-12-20 | 2016-08-17 | 中国空间技术研究院 | A kind of cmos image sensor based on FPGA technology test device |
| CN107659784A (en) * | 2017-08-31 | 2018-02-02 | 北京航宇创通技术有限公司 | CameraLink image processing apparatus and Electric-Optic Turret |
-
2011
- 2011-11-30 CN CN 201120487064 patent/CN202334710U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103698682B (en) * | 2013-12-20 | 2016-08-17 | 中国空间技术研究院 | A kind of cmos image sensor based on FPGA technology test device |
| CN107659784A (en) * | 2017-08-31 | 2018-02-02 | 北京航宇创通技术有限公司 | CameraLink image processing apparatus and Electric-Optic Turret |
| CN107659784B (en) * | 2017-08-31 | 2019-05-28 | 北京航宇创通技术股份有限公司 | CameraLink image processing apparatus and Electric-Optic Turret |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120711 Termination date: 20171130 |