CN202332837U

CN202332837U - Inversion array light-emitting diode (LED) chip

Info

Publication number: CN202332837U
Application number: CN2011203376704U
Authority: CN
Inventors: 邓朝勇; 杨利忠; 李绪诚; 张荣芬; 许铖
Original assignee: Guizhou University
Current assignee: Guizhou University
Priority date: 2011-09-09
Filing date: 2011-09-09
Publication date: 2012-07-11
Anticipated expiration: 2021-09-09

Abstract

The utility model discloses an inversion array light-emitting diode (LED) chip, which is an array formed by a plurality of array units, wherein p electrode layers (10) on lines of all array units are connected, and n electrode layers (5) on rows of all array units are connected. Each array unit is formed by sequentially covering an n-shaped buffer layer (3), an n-shaped semi-conductor layer (6), an active layer (7), a p-shaped semi-conductor layer (8), a transparent electrode layer (9) and the p-shaped electrode layer (10) above a sapphire substrate (2). The n electrode layers (5) and the p electrode layers (10) are all wrapped by insulation layers (4). The p electrode layers (10) on the lines are connected through p electrode connection metal layers (11) above windows of the p electrode layers (10), and passivating layers (12) are arranged on the surfaces of the p electrode connection metal layers (11).

Description

Upside-down mounting array LED chip

Technical field

The utility model relates to a kind of upside-down mounting array LED chip, relates in particular to a kind of controlled upside-down mounting array blue-light LED chip structure of GaN base that comprises the MQW active area.

Background technology

White light LEDs has advantages such as brightness height, energy-conserving and environment-protective, has become one of the most potential lighting source.The energy consumption of white light LEDs is merely 1/8 of incandescent lamp, 1/2 of fluorescent lamp, and its life-span was 100,000 hours.This is " putting things right once and for all " concerning average family is bright, also can realize mercurylessly simultaneously, reclaims advantages such as easy, and is significant to environmental protection and energy savings.

The method for preparing at present large power white light LED mainly is on blueness or near ultraviolet LED chip, to apply yellow fluorescent powder, obtains white light through colour mixture.This method that obtains white light through blue-ray LED, simple structure, with low cost, technology maturity is high, therefore utilization is extensively.The above large power white light LED of most of 5W is processed by powerful blue-light LED chip.So make high-power blue-light LED chip is the basis that makes large power white light LED.

At present, the LED that regulates luminosity mainly is through following several kinds of modes: the first, single led chip mainly is that control is regulated luminosity through the electric current of led chip; The second, the combination of a plurality of led chip is regulated luminosity through the switch of controlling a plurality of led chips.But have differently because each led chip possibly not be electric property and the optical property of same batch of production, connect through above control method and to design and power drives, luminous harmony, the consistency of combined chip is relatively poor.

Present monochromatic display screen all has application on advertisement and the small-sized mobile digital equipment out of doors, so the monochromatic display screen of development LED also has very wide application prospect.

Summary of the invention

The technical problem that the utility model will solve is; A kind of upside-down mounting array LED chip is provided; This chip can effectively be regulated the luminosity of high-power blue-ray LED flip-chip; Also can be used as monochromatic display screen and use, reach the purpose of character display, regulate deficiencies such as difficulty to overcome the led chip luminosity that prior art exists through the scanning of control ranks.

The upside-down mounting array LED chip structure of the utility model is: the array LED chip is by a plurality of array element forming arrays; The p electrode layer of each row of wherein all array elements connects together; The n electrode layer of each row connects together, and it is luminous to control each array element separately like this; Said array element is that the Sapphire Substrate top covers n type resilient coating, n type semiconductor layer, active layer, p type semiconductor layer, transparent electrode layer, p electrode layer successively; The n electrode layer of each column array unit links together; And all n electrode layer and p electrode layer are coated by insulating barrier; P electrode above the p electrode layer window that insulating barrier coats connects metal level connects together the p electrode of each row.The exiting surface of Sapphire Substrate is a roughened surface, to improve light emission rate; Connect layer on surface of metal at the p electrode and also have passivation layer.The p electrode layer of chip adopts metals such as higher silver of light reflectivity or aluminium to increase the light reflection, and covers the transparent electrode layer of each array element fully.

Wherein, the led chip exiting surface is a Sapphire Substrate, adopts sapphire (Al ₂O ₃); And exiting surface is carried out organized surface roughening handle the formation roughened surface, to reduce light output surface, improve light emission rate to reflection of light, improve the luminous efficiency of LED.

Described n type semiconductor layer and p type semiconductor layer are to be made up of GaN or GaAs or AlGaN semi-conducting material; Wherein the impurity that mixes of n type semiconductor layer is materials such as Si, and the impurity that the p type semiconductor layer is mixed is materials such as Mg; Active layer adopts the InGaN layer and the GaN layer of multilayer, forms multiple quantum well layer.

The led chip of the utility model is by the array element forming array that is mutually independent.But each column array unit n electrode layer links together; The materials of n electrode layer comprises the Cu/Ti/Al/Ni/Au metal, adopts wherein two kinds and above metallic combination; The p electrode layer adopts metal A g or the Al very high to visible reflectance, and covers the transparent electrode layer of each array element fully;

P electrode above the p electrode layer window that insulating barrier coats connects metal level connects together the p electrode of each row; The material that the p electrode connects metal level comprises the Cu/Ti/Al/Ni/Au metal, adopts wherein two kinds and above metallic combination.

Insulating barrier and passivation layer are by SiO _x, SiN _xOr SiO _xN _yConstitute Deng insulating material; Transparent electrode layer adopts metallic film Ni/Au or tin indium oxide (ITO) to make.

The utility model is compared with traditional led chip, both can increase light-emitting area, and whether array of controls unit luminous of the energising of the row and column of array that again can be through control chip, thereby power that can control chip reach the purpose of control chip luminosity; Also can whether switch on, be used for character display through outside driven sweep circuit control chip row and column.

Adjustment active layer structure (SQW like a plurality of materials forms composite quantum well) and material component (the adjustment doping content changes emission wavelength) can send out color of light multiple, and the utility model has also been contained this led chip category.

Description of drawings

Fig. 1 is sapphire Al ₂O ₃(0001) epitaxial growth n-GaN layer, n on the face substrate ⁺The figure in the cross section behind-GaN layer, active layer, p-GaN layer, transparency electrode and the Ag/Al metal electrode;

The plane graph that obtains after Fig. 2 n region electrode photoetching and the etching;

Fig. 3 is the A-A sectional view of Fig. 2;

The plane graph of Fig. 4 for obtaining after the n region electrode etching;

Fig. 5 is the A-A sectional view of Fig. 4

Fig. 6 is SiO _xOr the planar graph after the SiNx insulating barrier etching;

Fig. 7 is the A-A sectional view of Fig. 6;

Fig. 8 is the plane graph that the p electrode is connected metal wire after p electrode district top deposition, photoetching and the etching;

Fig. 9 is the A-A sectional view of Fig. 8;

Figure 10 SiO _xOr the planar graph after the SiNx passivation layer etching

Figure 11 is for carrying out the cross section figure that obtains after the organized roughened to the sapphire exiting surface.

Reference numeral:

The roughened surface of 1-Sapphire Substrate;

2-Sapphire Substrate;

3-n type resilient coating, i.e. n-GaN resilient coating;

4-(SiO _xOr SiNx) insulating barrier;

5-n electrode layer;

6-n semiconductor layer, i.e. n ⁺-GaN layer;

7-active layer;

8-p semiconductor layer, i.e. p-GaN layer;

9-transparent electrode layer;

10-p electrode layer;

11-p electrode connects metal level;

12-(SiO _xOr SiNx) passivation layer.

Embodiment

The embodiment of the utility model:, be chip structure and the manufacturing approach thereof that example is explained the utility model with " from the luminous GaN base controlled power blue light upside-down mounting array-type LED chip of sapphire surface " at this.

The chip structure of the utility model is: the array LED chip is by a plurality of array element forming arrays; The p electrode layer 10 of each row of wherein all array elements connects together; The n electrode layer 5 of each row connects together, and it is luminous to control each array element separately like this; Said array element is that Sapphire Substrate 2 tops cover n type resilient coating 3, n type semiconductor layer 6, active layer 7, p type semiconductor layer 8, transparent electrode layer 9, p electrode layer 10 successively; The n electrode layer 5 of each column array unit links together; And all n electrode layer 5 is coated by insulating barrier 4 with p electrode layer 10; P electrode above p electrode layer 10 windows that insulating barrier 4 coats connects metal level 11 connects together the p electrode layer 10 of each row.The exiting surface of Sapphire Substrate 2 is a roughened surface 1, to improve light emission rate; Connect metal level 11 surfaces at the p electrode and also have passivation layer 12.The p electrode layer of chip adopts metals such as higher silver of light reflectivity or aluminium to increase the light reflection.

The gallium source is TMGa (trimethyl gallium) in the utility model, and nitrogenous source is NH ₃(ammonia), indium source are TMIn (trimethyl indium), and the silicon source is SiH ₄(silane), magnesium source are Cp ₂Mg (two luxuriant magnesium).

Below be the detailed methods of fabrication of this embodiment controlled power blue light upside-down mounting array-type LED chip structure, its flow process meaning as shown in Figure 1, it may further comprise the steps:

Step 1, on Sapphire Substrate 2, adopt the MOCVD method n type GaN resilient coating 3 of the low-doped Si of growth earlier, the n type GaN semiconductor layer 6 of the highly doped Si of regrowth; Promptly use TMGa (trimethyl gallium), NH ₃(ammonia) and silicon source SiH ₄(silane) is at the n-GaN resilient coating 3 of 570 ℃ of low-doped Si that growth 2 μ m are thick down; The n type GaN semiconductor layer 6 of the highly doped Si of regrowth 20nm; Meaning as shown in Figure 2.

Step 2, employing MOCVD method growth active layer 7.The InGaN layer in a plurality of cycles of alternating growth and GaN layer form MQW-mqw layer.Detailed process is: the first, feed the thick InGaN of indium source TMIn (trimethyl indium) growth 3nm; The second, remove the indium source, feed silane (SiH ₄) the thick n-GaN of growth 20nm; The 3rd, repetitive process first, second repeatedly, just grow the InGaN/GaN MQW; Meaning as shown in Figure 2

Step 3, at MQW active layer 7 tops, adopt MOCVD method growing p-type semiconductor layer 8, promptly feed TMGa (trimethyl gallium), NH ₃(ammonia) and Cp ₂Mg (two luxuriant magnesium), the thick p type semiconductor layer 8 of growth 100nm;

Method with magnetron sputtering after step 4, process are cleaned deposits one deck ITO transparent conductive film as transparent electrode layer 9 on p type semiconductor layer 8, sputter-deposited Ag or Al metal form p electrode layer 10 on transparent electrode layer; The thickness of transparent electrode layer 9 is 500nm, and the thickness of p electrode layer 10 is 120nm;

Step 5, on the basis of step 4 resist coating, mask, etching is carried out in photoetching, exposes the isolation channel of n type resilient coating and chip, for the deposition of n electrode layer 5 is prepared; Like Fig. 3, shown in Figure 4;

Step 6, with magnetron sputtering deposition Cu/Au (copper/gold), the thickness of plated metal is 120nm; Form n electrode layer 5, and carry out photoetching and etching, form the n electrode layer 5 that each provisional capital connects together; Like Fig. 5 and shown in Figure 6.

Step 7, employing PECVD (plasma-enhanced chemical vapor deposition) growth SiO ₂Insulating barrier 4, and carry out photoetching and etching, expose p electrode layer 10 windows, for connecting metal level, the p electrode that further deposits p electrode layer 10 windows top prepares; Simultaneously expose n electrode pad, connect for external circuit at the chip edge; Like Fig. 7, shown in Figure 8.

The connection metal electrode layer 11 of step 8, the p electrode on p electrode layer 10, formed with magnetron sputtering deposition Cu/Au metals such as (copper/gold); This bed thickness 90-150 μ m; And carry out photoetching and etching, form p electrode connection metal and the external pad of n electrode that each column array unit all links together; Connect for external circuit; Like Fig. 9, shown in Figure 10

Step 9, remove photoresist, adopt PECVD growth SiOx or SiNx passivation layer, promptly form the thick SiO of 80nm ₂Passivation layer 12; And carry out photoetching and etching, and expose p electrode pad and n electrode pad, connect for external circuit;

Step 10, with chemico-mechanical polishing (CMP) equipment with Sapphire Substrate 2 attenuates; Be about to Sapphire Substrate and be thinned to 90 μ m～150 μ m by 350 μ m～450 μ m; And the method that adds ion etching with photoetching carries out organized roughened to sapphire exiting surface, forms roughened surface 1.

Led chip according to above-mentioned steps and technology are made obtains the upside-down mounting array-type LED chip than good quality.

Claims

1. upside-down mounting array LED chip is characterized in that: the array LED chip is by a plurality of array element forming arrays, and p electrode layer (10) of each row of wherein all array elements connects, and the n electrode layer (5) of each row connects; The structure of said each array element is that Sapphire Substrate (2) top covers n type resilient coating (3), n type semiconductor layer (6), active layer (7), p type semiconductor layer (8), transparent electrode layer (9), p electrode layer (10) successively; All n electrode layers (5) and p electrode layer (10) are coated by insulating barrier (4); Wherein the p electrode layer (10) of each row connects metal level (11) connection through the p electrode of p electrode layer (10) window top; Connect metal level (11) surface at the p electrode and also have passivation layer (12).

2. upside-down mounting array LED chip according to claim 1 is characterized in that: roughened surface (1) is handled the led chip exiting surface that forms for Sapphire Substrate (2) through surface roughening.

3. upside-down mounting array LED chip according to claim 1 is characterized in that: n type resilient coating (3), n type semiconductor layer (6) and p type semiconductor layer (8) are made up of GaN, GaAs or AlGaN semi-conducting material.

4. root upside-down mounting array LED according to claim 1 chip, it is characterized in that: active layer (7) is the InGaN of individual layer, or the InGaN layer of multilayer and GaN layer, forms multiple quantum well layer.

5. according to claim 1,2 or 3 described upside-down mounting array LED chips, it is characterized in that: led chip is by the array element forming array that is mutually independent, and the n electrode layer (5) of each column array unit connects.

6. according to claim 1,2 or 3 described upside-down mounting array LED chips, it is characterized in that: p electrode layer (10) adopts Ag or Al, and covers the transparent electrode layer (9) of each array element fully.

7. upside-down mounting array LED chip according to claim 1 is characterized in that: insulating barrier (4) and passivation layer (9) are by SiO _x, SiN _xOr SiO _xN _yInsulating material constitutes.

8. upside-down mounting array LED chip according to claim 1 is characterized in that: transparent electrode layer (9) adopts metallic film Ni/Au or tin indium oxide to make.