CN202330684U - Calibration module for VXI (VME (Virtual Machine Environment) Extensions for Instrumentation) bus digital testing system - Google Patents
Calibration module for VXI (VME (Virtual Machine Environment) Extensions for Instrumentation) bus digital testing system Download PDFInfo
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- CN202330684U CN202330684U CN2011204445538U CN201120444553U CN202330684U CN 202330684 U CN202330684 U CN 202330684U CN 2011204445538 U CN2011204445538 U CN 2011204445538U CN 201120444553 U CN201120444553 U CN 201120444553U CN 202330684 U CN202330684 U CN 202330684U
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Abstract
The utility model discloses a calibration module for a VXI (VME (Virtual Machine Environment) Extensions for Instrumentation) bus digital testing system, and the calibration module comprises a main controller, a configuration storage, a relay matrix and a precise resistor matrix, wherein the main controller is connected with an integrated circuit tester, and is respectively connected with the configuration storage and the relay matrix, the configuration storage is connected between the main controller and the relay matrix and used for storing calibration, self-checking and measuring configuration programs; and the relay matrix is connected with the integrated circuit tester and is connected with the precise resistor matrix. The calibration module can be mutually matched with various VXI bus digital testing systems so as to automatically complete calibration, self-checking and measuring works of relevant digital testing systems, is high in calibration precision, and is convenient in operation.
Description
Technical field
The utility model relates to a kind of calibration module of integrated circuit test system, relates in particular to a kind of calibration module that is used for the vxi bus digital detecting system, belongs to the ic test technique field.
Background technology
Vxi bus (VXI bus) is the abbreviation of VME bus Extensions for Instrumentation.It is after the IEEE488 bus, develops into the more needs of compact module formula structure for adapting to surveying instrument from desk-top and the frame structure of separation, and a kind of new bus standard of release.
The vxi bus system is a kind of computer-controlled function system, generally is made up of mainframe box, some devices, explorer and master controller.The basic logic unit of forming the vxi bus system is called " device ".In general, a device occupies a VXI module, allows also on a module, to realize that a plurality of devices or a device occupy the polylith module.When several VXI modules that are used for integrated circuit testing are built based on vxi bus, just formed the vxi bus digital detecting system.These VXI modules generally comprise PMU (precision measurement unit) module, channel module, power module, figure module etc.
For an integrated circuit test system, can move on normal and stable ground in order to guarantee test macro, measuring accuracy can guarantee that within set quota corresponding calibration, self check, measurement technology are absolutely necessary.On the 4th phase in 2002, people such as Gao Zhanbao have delivered paper " research of vxi bus instrument automatic gauge calibration system " in " aviation instrumentation technology ".This paper has been set forth the necessity and the singularity of carrying out the vxi bus instrument calibration; Several kinds of vxi bus instrument calibration schemes have been compared in analysis; Set up a cover automated calibration system; Discuss the structure of calibration software and the control measure of soft-error, looked forward to the developing direction of vxi bus instrument calibration at last.But, be not relate to the calibration program that is used for the vxi bus digital detecting system in the prior art of representative with this paper.
Summary of the invention
The utility model technical matters to be solved is to provide a kind of calibration module that is used for the vxi bus digital detecting system.This module can be used for calibration, self check and the metering of various vxi bus digital detecting systems.
For realizing above-mentioned purpose, the utility model adopts following technical scheme:
A kind of calibration module that is used for the vxi bus digital detecting system is characterized in that:
Said calibration module comprises master controller, config memory, relay matrix and precision resistance matrix; Wherein,
Said master controller connects integrated circuit tester on the one hand, connects said config memory and said relay matrix on the other hand respectively;
Said config memory is connected between said master controller and the said relay matrix, is used to store the configurator of calibration, self check and metering;
Said relay matrix connects integrated circuit tester on the one hand, connects said precision resistance matrix on the other hand.
Wherein more excellently, comprise the switching deck in the said calibration module.
Wherein more excellently, comprise jtag interface in the said calibration module, said jtag interface connects said master controller.
The calibration module that the utility model provided can cooperatively interact with various vxi bus digital detecting systems, accomplishes calibration, self check and the gage work of correlated digital test macro automatically, and calibration accuracy is high, and is easy to operate.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the utility model is done further to specify.
Fig. 1 is the principle schematic of the calibration module that provides of the utility model;
Fig. 2 is in this calibration module, the connection synoptic diagram of master controller;
Fig. 3 is in this calibration module, the configuration schematic diagram of CPLD;
Fig. 4 is in this calibration module, the synoptic diagram of optical relay matrix;
Fig. 5 is in this calibration module, the synoptic diagram of common relay matrix;
Fig. 6 is in this calibration module, the configuration schematic diagram of precision resistance matrix.
Embodiment
The calibration module that the utility model provided is primarily aimed at the vxi bus digital detecting system; Therefore each functional unit is all driven by vxi bus; The control signal of master controller and relay matrix all derives from vxi bus, the bottom layer driving of supporting calibration software also write to vxi bus.
As shown in Figure 1, this calibration module is made up of master controller, config memory, relay matrix, precision resistance matrix and switching deck.Wherein, master controller connects integrated circuit tester on the one hand, therefrom obtains the resource of integrated circuit tester; Connect config memory and relay matrix on the other hand respectively, so that they are controlled.Config memory is connected between master controller and the relay matrix, is used to store the configurator of calibration, self check and metering.When program run, config memory can provide the configurator of calibration, self check and metering to master controller.This config memory can be E
2PROM or FLASH (nonvolatile memory) etc.The switching deck is used to realize being connected of this calibration module and integrated circuit tester etc., and its concrete realization is the routine techniques that those of ordinary skills can both grasp, and has not just given unnecessary details at this.
Fig. 2 is the connection synoptic diagram of master controller.This master controller is made up of microcontroller (MCU) and CPLD (perhaps FPGA), and wherein microcontroller is used to control the resource of config memory and integrated circuit tester, and CPLD (perhaps FPGA) is used to realize the control to relay matrix.
Fig. 3 is in this calibration module, the configuration schematic diagram of CPLD (CPLD).This CPLD comprises first follower, code translator and second follower that connects through logic element, and wherein the output terminal of first follower connects the input end of code translator, and the output terminal of code translator connects the input end of second follower.
Fig. 4 is the synoptic diagram of optical relay matrix, and Fig. 5 is the synoptic diagram of common relay matrix.The effect of these two kinds of relays is the same, and the key distinction is that the optical relay volume is little, and the life-span is grown but expensive.Relay matrix directly is connected with integrated circuit tester on the one hand, connects the precision resistance matrix on the other hand.This relay matrix is controlled by master controller, can be connected to the related resource of integrated circuit tester on the precision resistance matrix according to different configuration needs, accomplishes calibration, self check and the metering of related resource.This relay matrix can be accomplished the operations such as calibration, self check and metering of resources such as the HPMU, BPMU, PPMU, pin circuit, driving comparative level, program control load of vxi bus digital detecting system.
As shown in Figure 6, the resistance of ten thousand class precisions of employing customization in the precision resistance matrix, to guarantee the precision of calibration and metering, resistance comprises 1M Ω, 100K Ω, 10K Ω, 1K Ω, 100 Ω and 10 Ω.
Also be provided with jtag interface in this calibration module.JTAG is a kind of international standard test protocol, with IEEE 1149.1 compatibilities.This jtag interface connects master controller, is used to accomplish the relevant configuration to master controller.Jtag interface also can be used for realizing ISP (In-System Programmable online programming), and tested device is programmed.
This calibration module is when calibrating, and master controller is connected on the precision resistance matrix through the related resource of relay matrix with integrated circuit tester.Owing to be the precision resister of customization in the precision resistance matrix, can be used as calibration, self check and the mete-wand of related resource.In other words, can obtain the standard value of dependence test process through the precision resistance matrix.On the other hand; The related voltage and current value of integrated circuit test system all should be linear; That is to say should coincidence formula y=ax+b, and we can set up a calibration factor tabulation through this formula, each calibration factor comprise one zero point a and slope b.Wherein zero point a and slope b can calculate according to the difference between the standard value of dependence test process and the measured value.This calibration factor tabulation is kept in the config memory, and the result who can be used as the follow-up test process calibrates the basis and uses.
Above the vxi bus digital detecting system calibration module that the utility model provided has been carried out detailed explanation.As far as one of ordinary skill in the art, any conspicuous change of under the prerequisite that does not deviate from the utility model connotation, it being done all will constitute to the utility model infringement of patent right, with corresponding legal responsibilities.
Claims (5)
1. calibration module that is used for the vxi bus digital detecting system is characterized in that:
Said calibration module comprises master controller, config memory, relay matrix and precision resistance matrix; Wherein,
Said master controller connects integrated circuit tester on the one hand, connects said config memory and said relay matrix on the other hand respectively;
Said config memory is connected between said master controller and the said relay matrix, is used to store the configurator of calibration, self check and metering;
Said relay matrix connects integrated circuit tester on the one hand, connects said precision resistance matrix on the other hand.
2. calibration module as claimed in claim 1 is characterized in that:
Comprise the switching deck in the said calibration module.
3. calibration module as claimed in claim 1 is characterized in that:
Comprise jtag interface in the said calibration module, said jtag interface connects said master controller.
4. calibration module as claimed in claim 1 is characterized in that:
Said master controller is made up of microcontroller and PLD, and said PLD is CPLD or FPGA.
5. calibration module as claimed in claim 1 is characterized in that:
Said config memory is E
2PROM or FLASH.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011204445538U CN202330684U (en) | 2011-11-10 | 2011-11-10 | Calibration module for VXI (VME (Virtual Machine Environment) Extensions for Instrumentation) bus digital testing system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011204445538U CN202330684U (en) | 2011-11-10 | 2011-11-10 | Calibration module for VXI (VME (Virtual Machine Environment) Extensions for Instrumentation) bus digital testing system |
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| CN202330684U true CN202330684U (en) | 2012-07-11 |
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| CN2011204445538U Expired - Fee Related CN202330684U (en) | 2011-11-10 | 2011-11-10 | Calibration module for VXI (VME (Virtual Machine Environment) Extensions for Instrumentation) bus digital testing system |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103697928A (en) * | 2013-12-25 | 2014-04-02 | 北京航天测控技术有限公司 | Instrument calibration method and device |
| CN105911451A (en) * | 2016-04-05 | 2016-08-31 | 硅谷数模半导体（北京）有限公司 | Chip test method and chip test device |
| CN108051767A (en) * | 2018-01-04 | 2018-05-18 | 南京国睿安泰信科技股份有限公司 | A kind of auto-check system for integrated circuit tester |
| CN112667971A (en) * | 2021-03-16 | 2021-04-16 | 杭州长川科技股份有限公司 | Level error correction method, level error correction device, computer equipment and storage medium |
| CN115328006A (en) * | 2022-10-13 | 2022-11-11 | 苏州华兴源创科技股份有限公司 | Signal control circuit |
-
2011
- 2011-11-10 CN CN2011204445538U patent/CN202330684U/en not_active Expired - Fee Related
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103697928A (en) * | 2013-12-25 | 2014-04-02 | 北京航天测控技术有限公司 | Instrument calibration method and device |
| CN103697928B (en) * | 2013-12-25 | 2016-05-11 | 北京航天测控技术有限公司 | A kind of instrument calibration method and device |
| CN105911451A (en) * | 2016-04-05 | 2016-08-31 | 硅谷数模半导体（北京）有限公司 | Chip test method and chip test device |
| CN108051767A (en) * | 2018-01-04 | 2018-05-18 | 南京国睿安泰信科技股份有限公司 | A kind of auto-check system for integrated circuit tester |
| CN108051767B (en) * | 2018-01-04 | 2019-07-19 | 南京国睿安泰信科技股份有限公司 | A kind of automatic diagnosis method for integrated circuit tester |
| CN112667971A (en) * | 2021-03-16 | 2021-04-16 | 杭州长川科技股份有限公司 | Level error correction method, level error correction device, computer equipment and storage medium |
| CN112667971B (en) * | 2021-03-16 | 2021-06-01 | 杭州长川科技股份有限公司 | Level error correction method, level error correction device, computer equipment and storage medium |
| CN115328006A (en) * | 2022-10-13 | 2022-11-11 | 苏州华兴源创科技股份有限公司 | Signal control circuit |
| CN115328006B (en) * | 2022-10-13 | 2023-01-20 | 苏州华兴源创科技股份有限公司 | Signal control circuit |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120711 Termination date: 20201110 |
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| CF01 | Termination of patent right due to non-payment of annual fee |