CN202281999U - Triple module redundancy and parallel processing device based on digital signal processor (DSP) - Google Patents
Triple module redundancy and parallel processing device based on digital signal processor (DSP) Download PDFInfo
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- CN202281999U CN202281999U CN 201120415532 CN201120415532U CN202281999U CN 202281999 U CN202281999 U CN 202281999U CN 201120415532 CN201120415532 CN 201120415532 CN 201120415532 U CN201120415532 U CN 201120415532U CN 202281999 U CN202281999 U CN 202281999U
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- dsp
- parallel processing
- processing device
- module redundancy
- triple module
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Abstract
The utility model discloses a triple module redundancy and parallel processing device based on a digital signal processor (DSP), and aims to provide the triple module redundancy and parallel processing device based on the DSP. The triple module redundancy and parallel processing device comprises a complex programmable logic device, and is characterized in that: one end of the complex programmable logic device is connected with a compact programmable communication interface (CPCI) plug, and the other end of the complex programmable logic device is connected with a minimum system of the DSP. The triple module redundancy and parallel processing device is mainly used for processing data of an emission section and an on-orbit section of a satellite.
Description
Technical field
The utility model relates to a kind of triplication redundancy and parallel processing apparatus, relates in particular to a kind of based on DSP triplication redundancy and parallel processing apparatus.
Background technology
At present; Existing triplication redundancy device or parallel processing apparatus all can only have its single function, and the triplication redundancy device guarantees that system carries out redundancy backup when rugged environment moves, and guarantees system stability; And parallel processing apparatus is the operational efficiency that improves system through parallel processing; When a main equipment requires to have triplication redundancy function or parallel processing function in different running mode, then can only in system, add two cover hardware devices, the serious waste resource.
Summary of the invention
For overcoming existing triplication redundancy device and parallel processing apparatus function singleness property problem, the utility model provides a kind of triplication redundancy and parallel processing apparatus based on DSP.This device adopts same hardware platform, can move triplication redundancy mode of operation or parallel processing mode as requested, satisfies system's different application demand: two-mode can flexible conversion, has enlarged range of application, practices thrift cost.
For realizing above-mentioned purpose; The technical solution of the utility model is: 1, a kind of based on DSP triplication redundancy and parallel processing apparatus; Comprise CPLD 2; It is characterized in that: an end of described CPLD 2 links to each other with CPCI plug 1, and the other end links to each other with DSP minimum system 3,4,5.
The beneficial effect of the utility model is that the utility model adopts same hardware platform, can move triplication redundancy mode of operation or parallel processing mode according to application demand; When working in the triplication redundancy pattern, three mutual redundancy backups of DSP minimum system, the stability of increase system; When working in parallel processing mode, three DSP minimum system parallel processing data improve the operational efficiency of system, and two-mode can flexible conversion, has enlarged range of application, and has practiced thrift cost.
Description of drawings
Accompanying drawing is the structural representation of the utility model.
Among the figure: 1-CPCI plug, 2---CPLD, 3,4,5---the DSP minimum system.
Embodiment
Below in conjunction with accompanying drawing the utility model and embodiment thereof are done further explain.Referring to accompanying drawing, the utility model comprises CPCI plug 1, CPLD 2, DSP minimum system 3,4,5.It is characterized in that: an end of described CPLD 2 links to each other with CPCI plug 1, and the other end links to each other with DSP minimum system 3,4,5.
In the accompanying drawings, CPCI plug 1 is connected on the CPLD 2, and complex programmable device 2 is connected on DSP minimum system 3, DSP minimum system 4 and the DSP minimum system 5 simultaneously.In the course of work, CPCI plug 1 is the interface that the utility model is connected to peripheral control unit, and complex programmable device 2 can require to be provided with the mode of operation of the utility model according to peripheral control unit.
During the utility model work triplication redundancy pattern; DSP minimum system 3, DSP minimum system 4 and the identical program of DSP minimum system 5 operations; Complex programmable logic 2 receives data with the outside and is distributed to three DSP minimum systems simultaneously, and monitors the duty of three DSP minimum systems simultaneously; Three DSP minimum system computings simultaneously receive data, and the result is exported to complex programmable logic 2; Complex programmable logic 2 is put to the vote to the output result of DSP minimum system under the prerequisite of DSP minimum system operate as normal, more externally output.So, three select two voting, guarantee the correctness of data computation; Work as certain DSP minimum system simultaneously and break down, two other DSP minimum system can carry out two die workers to be done, and fundamentally guarantees the continuity of data processing, can not interrupt because of environment cause data processing.
When the utility model worked in parallel processing mode, CPLD 2 received data with the outside and is divided into three parts and issues DSP minimum system 3, DSP minimum system 4 and DSP minimum system 5; Three DSP minimum systems calculate the data that receive simultaneously, and give CPLD 2 with result transmission, and complex programmable device 2 reconfigures three section processes results, form complete data output.So, a batch data divides three sections to issue three DSP minimum systems and handle simultaneously, has greatly improved processing speed.
The utility model in the course of the work, pattern can change flexibly, has improved the applying flexible degree, a covering device, two kinds of functions have been practiced thrift hardware cost.
Claims (1)
1. one kind based on DSP triplication redundancy and parallel processing apparatus, comprises CPLD (2), and it is characterized in that: an end of described CPLD (2) links to each other with CPCI plug (1), and the other end links to each other with DSP minimum system (3,4,5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201120415532 CN202281999U (en) | 2011-10-23 | 2011-10-23 | Triple module redundancy and parallel processing device based on digital signal processor (DSP) |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201120415532 CN202281999U (en) | 2011-10-23 | 2011-10-23 | Triple module redundancy and parallel processing device based on digital signal processor (DSP) |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202281999U true CN202281999U (en) | 2012-06-20 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201120415532 Expired - Fee Related CN202281999U (en) | 2011-10-23 | 2011-10-23 | Triple module redundancy and parallel processing device based on digital signal processor (DSP) |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202281999U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104182304A (en) * | 2014-08-12 | 2014-12-03 | 西北工业大学 | Universal multi-mode redundant pico/nano satellite on-board computer system |
| CN105279049A (en) * | 2015-06-16 | 2016-01-27 | 康宇星科技(北京)有限公司 | Method for designing triple-modular redundancy type fault-tolerant computer IP core with fault spontaneous restoration function |
-
2011
- 2011-10-23 CN CN 201120415532 patent/CN202281999U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104182304A (en) * | 2014-08-12 | 2014-12-03 | 西北工业大学 | Universal multi-mode redundant pico/nano satellite on-board computer system |
| CN105279049A (en) * | 2015-06-16 | 2016-01-27 | 康宇星科技(北京)有限公司 | Method for designing triple-modular redundancy type fault-tolerant computer IP core with fault spontaneous restoration function |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120620 Termination date: 20161023 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |