CN204256465U - Open restructural intelligent controller - Google Patents

Open restructural intelligent controller Download PDF

Info

Publication number
CN204256465U
CN204256465U CN201420711157.0U CN201420711157U CN204256465U CN 204256465 U CN204256465 U CN 204256465U CN 201420711157 U CN201420711157 U CN 201420711157U CN 204256465 U CN204256465 U CN 204256465U
Authority
CN
China
Prior art keywords
subsystem
real
intelligent controller
control
open
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201420711157.0U
Other languages
Chinese (zh)
Inventor
吴宏
吕恕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Solid High Tech Co.,Ltd.
Original Assignee
GOOGOL TECHNOLOGY (SHENZHEN) Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GOOGOL TECHNOLOGY (SHENZHEN) Ltd filed Critical GOOGOL TECHNOLOGY (SHENZHEN) Ltd
Priority to CN201420711157.0U priority Critical patent/CN204256465U/en
Application granted granted Critical
Publication of CN204256465U publication Critical patent/CN204256465U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Stored Programmes (AREA)

Abstract

The utility model discloses a kind of open restructural intelligent controller, and for realizing the Open Control to intelligent machine self, described open restructural intelligent controller comprises: task processing subsystem, based on conventional data processing architecture; Real-time calculation and control subsystem, based on real-time digital processing architecture; Configurable hardware-accelerated subsystem, based on the architecture of programmable logic device (PLD); Described configurable hardware-accelerated subsystem is connected with described task processing subsystem, in real time calculation and control subsystem communication respectively; Described task processing subsystem, in real time calculation and control subsystem and configurable hardware-accelerated subsystem all redefine function by programmable interface.Above-mentioned intelligent controller, can realize the Open Control to described flexible production line.

Description

Open restructural intelligent controller
Technical field
The utility model relates to technical field of industrial automatic control, particularly relates to a kind of open restructural intelligent controller.
Background technology
In traditional industry processing, in order to promote the production in enormous quantities working (machining) efficiency of target product, the plant equipment of production processing or product line are all generally specialty customizations, its functional purpose is extremely strong, thus ensure that the work efficiency of process equipment or product line, but also can there is the problem of dirigibility critical constraints in such mode, once editing objective product adjusts to some extent, then the very expensive of process equipment or the adjustment of product line, even will destroy reconstruction.
In addition, the equipment that tradition processing mode uses or product line are limited to state-of-art, therefore target converted products, and relevant process, technique and job operation are all that configured in advance completes, after equipment or product line have formally been disposed, various technique, process, and method is substantially just solidified substantially, if even if to equipment or produce the adjustment that the process details of line carries out and generally also all need in shutdown situation, repeatedly debug through professional and just can complete, the adjustment and optimisation that enough intelligence carries out active self is lacked in equipment or product line processing and manufacturing process.
Even to this day, the fast lifting of adjoint social productive forces and people's living standard, society people are for the demand of industrial products, industrial processes has made the transition from traditional simple large-scale mass production pattern gradually gradually becomes scale customized production pattern, thus also proposes the new demands such as strong virtual, flexibility, intellectuality to supporting industrial plant equipment and production line.
Utility model content
Based on this, be necessary to provide a kind of Open Control needed for intelligent machine that can support flexible industrial production line thus intelligent machine self function can be reconstructed, and then realizing the controller of flexible industrial production line function.
A kind of open restructural intelligent controller, comprising the Open Control of intelligent machine for realizing:
Task processing subsystem, based on conventional data processing architecture;
Real-time calculation and control subsystem, based on real-time digital processing architecture;
Configurable hardware-accelerated subsystem, based on the architecture of programmable logic device (PLD); Described configurable hardware-accelerated subsystem is connected with described task processing subsystem, in real time calculation and control subsystem communication respectively;
Described task processing subsystem, in real time calculation and control subsystem and configurable hardware-accelerated subsystem all reconfigure function by the electric interfaces of setting.
Wherein in an embodiment, the conventional data processing architecture of described task processing subsystem builds based on the processor of x86, ARM or MIPS framework.
Wherein in an embodiment, the real-time digital processing architecture of described real-time calculation and control subsystem with digital stream processor for core builds.
Wherein in an embodiment, the programmable logic device (PLD) of described configurable hardware-accelerated subsystem is field programmable gate array or CPLD.
Wherein in an embodiment, described task processing subsystem also comprises network interface.
Above-mentioned intelligent controller, is received an assignment from outside by task processing subsystem, and produces the real-time control task of configurable hardware-accelerated subsystem, is aided with the real-time calculating of real-time calculation and control subsystem, reaches the object controlling flexible production line in real time.
Meanwhile, described task processing subsystem, in real time calculation and control subsystem and configurable hardware-accelerated subsystem all redefine function by programmable interface, realize the Open Control to described flexible production line or the reconstruct to intelligent controller.
Accompanying drawing explanation
Fig. 1 is the system module figure of the open restructural intelligent controller of an embodiment.
Embodiment
Fig. 1 is the system module figure of the open restructural intelligent controller of an embodiment.This intelligent controller, for realizing the Open Control to intelligent machine, comprises three large kernel subsystems: task processing subsystem 100, in real time calculation and control subsystem 200 and configurable hardware-accelerated subsystem 300.Configurable hardware-accelerated subsystem 300 communicates to connect with task processing subsystem 100, in real time calculation and control subsystem 200 respectively.Intelligent machine comprise multiple can the elementary cell of flexible configuration, the Open Control to this elementary cell is specially to the Open Control of intelligent machine.
Task processing subsystem 100 based on conventional data processing architecture, for receive and other task of processing logic conceptual level.Task processing subsystem 100 is intelligent maincenters of whole intelligent controller, completes the communication with outside, and undertaking task also mainly carries out other task process of completion logic conceptual level, and processing speed is millisecond (ms) rank.
Task processing subsystem 100 comprises high performance universal calculating sub module, necessary sub module stored and input and output submodule.High performance universal calculating sub module, usually based on technical grade central processing unit, includes but not limited to adopt the general processor of X86 instruction and adopt the SOC processor of X86 instruction, adopt the processor of ARM instruction, adopt the processor of MIPS instruction; This general-purpose computations submodule can also be the special IC device adopting other instruction systems.Sub module stored mainly comprises dynamic memory and nonvolatile semiconductor memory member.Input and output submodule mainly comprises Man Machine Interface, network interface and other high speed communications and data interaction interface.
Based on this conventional data processing architecture, the configurable corresponding application program of task processing subsystem 100 realizes the several functions comprising event handling, man-machine interaction and communication and process programming.
Real-time calculation and control subsystem 200 based on real-time digital processing architecture, for real-time digital computation.Real-time calculation and control subsystem 200 is mainly used in the complicated calculations with certain requirement of real-time, and processing speed is microsecond (us) rank.Real-time calculation and control subsystem 200 comprises mathematical computations submodule, sub module stored, supporting interface and peripheral submodule.
Mathematical computations submodule is the core of whole real-time calculation and control subsystem 200, is also the core that whole intelligent controller completes localized mathematical computational abilities.Mathematical computations submodule usually with digital stream processor (DSP) for core builds, other also can be adopted to provide the integrated circuit (IC)-components of efficient mathematical computing power.
Configurable hardware-accelerated subsystem 300 based on the architecture of programmable logic device (PLD), for controlling described intelligent machine in real time.Configurable reconstruct hardware accelerator 300 mainly completes concrete, that requirement of real-time is the highest calculation and control, also namely processes in real time the data of the elementary cell on flexible production line.Configurable hardware-accelerated subsystem 300 processing speed is nanosecond (ns) rank, to reach the object of process in real time.
Configurable hardware-accelerated subsystem 300 is generally made up of programmable logic device (PLD) and corresponding configuration device.Programmable logic device (PLD) mainly includes but not limited to field programmable gate array (FPGA), complex programmable logic (CPLD) device.
Above-mentioned intelligent controller, received an assignment from outside by task processing subsystem 100, and produce the real-time control task of configurable hardware-accelerated subsystem 300, be aided with the real-time calculating of real-time calculation and control subsystem 200, reach the object controlling flexible production line in real time.
Meanwhile, for realizing the Open Control to described flexible production line, described task processing subsystem 100, in real time calculation and control subsystem 200 and configurable hardware-accelerated subsystem 300 all reconfigure function by the electric interfaces of setting.
Particularly:
Task processing subsystem 100 can dispose development & application layer function.By the DLL (dynamic link library) of application layer, the content in the nonvolatile semiconductor memory member in the conventional data processing architecture of task processing subsystem 100 can be rewritten, thus realize the program rewriting of " task processing subsystem ".
Real-time calculation and control subsystem 200 can dispose Real-Time Scheduling layer function.By the DLL (dynamic link library) of application layer, the content in the nonvolatile semiconductor memory member in the digital processing architecture of real-time calculation and control subsystem 200 can be rewritten, realize " Real-Time Scheduling layer " function remodeling.
Configurable hardware-accelerated subsystem 300 can be disposed various Real Time Control Function (such as motion control, logic control and machine vision etc.).Under set model, by the DLL (dynamic link library) of application layer, content in nonvolatile semiconductor memory member in the architecture of the programmable logic device (PLD) of configurable hardware-accelerated subsystem 300 can be rewritten, thus change and the function of the configurable hardware-accelerated subsystem 300 of reconstruct and action.
The above embodiment only have expressed several embodiment of the present utility model, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the utility model the scope of the claims.It should be pointed out that for the person of ordinary skill of the art, without departing from the concept of the premise utility, can also make some distortion and improvement, these all belong to protection domain of the present utility model.Therefore, the protection domain of the utility model patent should be as the criterion with claims.

Claims (5)

1. an open restructural intelligent controller, to the Open Control of intelligent machine for realizing, is characterized in that, comprising:
Task processing subsystem, based on conventional data processing architecture;
Real-time calculation and control subsystem, based on real-time digital processing architecture;
Configurable hardware-accelerated subsystem, based on the architecture of programmable logic device (PLD); Described configurable hardware-accelerated subsystem is connected with described task processing subsystem, in real time calculation and control subsystem communication respectively;
Described task processing subsystem, in real time calculation and control subsystem and configurable hardware-accelerated subsystem all reconfigure function by the electric interfaces of setting.
2. open restructural intelligent controller according to claim 1, is characterized in that, the conventional data processing architecture of described task processing subsystem builds based on the processor of x86, ARM or MIPS framework.
3. open restructural intelligent controller according to claim 1, is characterized in that, the real-time digital processing architecture of described real-time calculation and control subsystem with digital stream processor for core builds.
4. open restructural intelligent controller according to claim 1, is characterized in that, the programmable logic device (PLD) of described configurable hardware-accelerated subsystem is field programmable gate array or CPLD.
5. open restructural intelligent controller according to claim 1, is characterized in that, described task processing subsystem also comprises network interface.
CN201420711157.0U 2014-11-21 2014-11-21 Open restructural intelligent controller Active CN204256465U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420711157.0U CN204256465U (en) 2014-11-21 2014-11-21 Open restructural intelligent controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420711157.0U CN204256465U (en) 2014-11-21 2014-11-21 Open restructural intelligent controller

Publications (1)

Publication Number Publication Date
CN204256465U true CN204256465U (en) 2015-04-08

Family

ID=52960751

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201420711157.0U Active CN204256465U (en) 2014-11-21 2014-11-21 Open restructural intelligent controller

Country Status (1)

Country Link
CN (1) CN204256465U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106940527A (en) * 2017-03-23 2017-07-11 浙江工业大学 Large-scale annealing device control based on network method based on scheduling with controller parameter dynamic restructuring

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106940527A (en) * 2017-03-23 2017-07-11 浙江工业大学 Large-scale annealing device control based on network method based on scheduling with controller parameter dynamic restructuring
CN106940527B (en) * 2017-03-23 2020-01-14 浙江工业大学 Large-scale heat treatment device networked control method based on dynamic reconfiguration of controller parameters

Similar Documents

Publication Publication Date Title
WO2015106582A1 (en) Dsp/fpga-based dynamically-configurable tool intelligent controller, and control method
CN101537622B (en) Control method and full-servo control system for operating multi-axis mechanical arm
CN102331733A (en) Numerical control system logic controller on basis of system on programmable chip and implementing method thereof
CN103901822A (en) Multi-shaft linkage motion control system
WO2006025775A1 (en) A control system for real time applications for cooperative industrial robots
CN103984288A (en) Automatic graphics parameterized programming system of numerical control honing machine
Nezhmetdinov et al. An approach to the development of logical control systems for technological equipment in the concept of Industry 4.0
CN204256465U (en) Open restructural intelligent controller
CN203849591U (en) Multi-shaft linkage motion control system
CN112784427B (en) Intelligent manufacturing simulation system based on digital twin technology
CN107305363A (en) Multi-axis motion controller
CN104391474A (en) Open type reconfigurable intelligent controller and method of reconfiguring intelligent controller
CN205210868U (en) Many task assignment based on multinuclear CPU
CN202351691U (en) Embedded controller based on loongson processor and field programmable gate array (FPGA) technology
CN117176763A (en) Modeling method and remote monitoring system for machining production line based on digital twin
CN203251732U (en) Control equipment for agricultural Internet of Things greenhouse
CN105511394A (en) Method and device for achieving PLC controlling in FPGA platform
CN204536861U (en) For the digital control system of numerically-controlled machine
Andrianova et al. Approaches to Creating a Multi-agent Architecture in the Industrial Internet of Things Systems
CN202067138U (en) Industrial controller
CN201638036U (en) Controller for radar power-supply module testing and communication based on GPIB interface
CN104049540A (en) System for electrically driving tractor
CN109343448B (en) Programming system and programming method for fan integrated control system
Wang et al. Function block design for adaptive execution control of job shop machining operations
CN202281999U (en) Triple module redundancy and parallel processing device based on digital signal processor (DSP)

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder
CP01 Change in the name or title of a patent holder

Address after: 518057 room W211, 2nd floor, west block, Shenzhen Hong Kong industry university research base, South District, high tech Zone, Nanshan District, Shenzhen City, Guangdong Province

Patentee after: Solid High Tech Co.,Ltd.

Address before: 518057 room W211, 2nd floor, west block, Shenzhen Hong Kong industry university research base, South District, high tech Zone, Nanshan District, Shenzhen City, Guangdong Province

Patentee before: GOOGOL TECHNOLOGY (SHENZHEN) Ltd.