CN202196397U

CN202196397U - Ultrasonic radio frequency digital signal acquisition card

Info

Publication number: CN202196397U
Application number: CN2011202507915U
Authority: CN
Inventors: 武剑辉
Original assignee: 武剑辉
Current assignee: GUANGDONG RUICHAO ELECTRONIC TECHNOLOGY CO., LTD.
Priority date: 2011-07-15
Filing date: 2011-07-15
Publication date: 2012-04-18
Anticipated expiration: 2021-07-15

Abstract

The utility model relates to the technical field of ultrasonic medical imaging, specifically to an ultrasonic radio frequency digital signal acquisition card used for acquiring an ultrasonic radio frequency digital signal in an ultrasonic medical imaging system. The ultrasonic radio frequency digital signal acquisition card comprises a complex programmable logic device (CPLD) unit, a first in first out (FIFO) external cache unit and a peripheral component interconnect (PCI) bridging chip, wherein the CPLD unit is provided with a signal input end and a signal output end; the signal output end of the CPLD unit is connected with an input end of the FIFO external cache unit; an output end of the FIFO external cache unit is connected with an input end of the PCI bridging chip; the CPLD unit is further provided with an interrupt signal end used for generating an interrupt signal; the interrupt signal end of the CPLD units is connected with a local interrupt signal end of the PCI bridging chip; and the output end of the PCI bridging chip is connected with a computer through a PCI bus. The utility model can completely transmit the ultrasonic radio frequency digital signal which contains the most primitive information of a back wave to the computer in real time.

Description

A kind of ultrasonic rf digital signal capture card

Technical field

The utility model relates to the ultrasound medical imaging technical field, relates in particular to be used in a kind of ultrasound medical imaging system ultrasonic rf digital signal is gathered and the ultrasonic rf digital signal capture card that transmits.

Background technology

Ultrasonic rf digital signal (being ultrasonic rf data) is after ultrasonic transducer collects echoed signal; Through the rf data stream that A/D (analog-to-digital) changes and delay weighted stacking (being that wave beam forms) obtains, it is comprising data message the most original in the echoed signal.

Existing ultrasonic signal acquisition system mainly comprises the ultrasonic video data acquisition card; The ultrasonic video data acquisition card be provided with video decoding chip, CPLD circuit units such as (field programmable gate arrays CPLD), the ultrasonic video data acquisition card is converted into digital video signal by video decoding chip with analog video signal then through gathering the analog video signal of diasonograph output; Simultaneously digital video signal is separated with status signal; Be sent to CPLD, CPLD realize the control and the processing of digital video signal according to status signal, and produce the read-write enable signal of buffer memory; The read-write of control buffer memory; At last, CPLD control under, with the digital signal transmission after handling to computing machine.Can find out from such scheme; This ultrasonic video data acquisition card; Be with after a series of processing of ultrasonic simulation vision signal process of gathering, be transferred to computing machine again, so it can not be transferred to computing machine intactly, in real time with original ultrasonic rf digital signal; The ultrasonic video signal is compared original ultrasonic rf digital signal and has been lost many valuable information, can not make correct assessment to the validity of signal processing algorithm.

Summary of the invention

The purpose of the utility model is to the deficiency of prior art a kind of ultrasonic rf digital signal capture card that can the ultrasonic rf digital signal in the ultrasound medical imaging system be transferred to intactly, in real time computing machine to be provided.

The purpose of the utility model realizes through following technical measures: a kind of ultrasonic rf digital signal capture card; Include CPLD unit, FIFO (First Input First Output; First in first out) external cache unit, PCI (Peripheral Component Interconnect) bridging chip; Said CPLD unit is provided with signal input part, the signal output part that is used to import ultrasonic rf digital signal; The signal output part of said CPLD unit is connected with the input end of said FIFO external cache unit, and the output terminal of said FIFO external cache unit is connected with the input end of said PCI bridging chip; Said CPLD unit also is provided with the look-at-me end that is used to produce look-at-me, and the look-at-me end of said CPLD unit is connected with the local look-at-me end of PCI bridging chip; The output terminal of said PCI bridging chip connects computing machine through pci bus.

Said FIFO external cache unit includes a FIFO buffer, the 2nd FIFO buffer; The signal output part of said CPLD unit is connected with the input end of the input end of a FIFO buffer, the 2nd FIFO buffer, and the output terminal of the output terminal of a FIFO buffer, the 2nd FIFO buffer all is connected with the input end of said PCI bridging chip.

Said CPLD unit is the logic control chip, and the model of this logic control chip is EPM7128.

The model of said PCI bridging chip is PCI9054.

The clock frequency of said pci bus is that 33MHz, highway width are that 32, transmission bandwidth are 132MB/S.

The utility model beneficial effect is: the utility model includes CPLD unit, FIFO external cache unit, PCI bridging chip; The CPLD unit is provided with signal input part, the signal output part that is used to import ultrasonic rf digital signal; The signal output part of CPLD unit is connected with the input end of FIFO external cache unit, and the output terminal of FIFO external cache unit is connected with the input end of PCI bridging chip; The CPLD unit also is provided with the look-at-me end that is used to produce look-at-me, and the look-at-me end of CPLD unit is connected with the local look-at-me end of PCI bridging chip; The output terminal of PCI bridging chip connects computing machine through pci bus.The utility model is when work; After the ultrasonic rf digital signal that the CPLD unit will be imported is integrated into 32 bit data; Signal is selected according to the read/write that the sky in the FIFO external cache unit/full zone bit produces in the CPLD unit, ultrasonic rf digital signal is alternately write in the FIFO external cache unit through the table tennis transmission, when the data volume that writes to FIFO external cache unit reaches preset the requirement; The CPLD unit produces local look-at-me to the PCI bridging chip; The PCI bridging chip is opened DMA (Direct Memory Access, direct memory access) passage after receiving look-at-me, ultrasonic rf digital signal is transferred to computing machine through pci bus.Since the utility model not to ultrasonic rf digital signal change, processing such as video, therefore, the utility model can be transferred to computing machine intactly, in real time with the ultrasonic rf digital signal that is comprising in the echoed signal raw information.

Description of drawings

Utilize accompanying drawing to come the utility model is further described below, but the embodiment in the accompanying drawing does not constitute any restriction to the utility model.

Fig. 1 is the frame assumption diagram of a kind of ultrasonic rf digital signal capture card of the utility model.

In Fig. 1, include:

1---CPLD unit 21---FIFO buffer

22---the 2nd FIFO buffer 3---PCI bridging chip

4---pci bus.

Embodiment

Below in conjunction with accompanying drawing the utility model is further described.

A kind of ultrasonic rf digital signal capture card of the utility model; As shown in Figure 1; It includes CPLD unit 1, FIFO external cache unit, PCI bridging chip 3; CPLD unit 1 is provided with signal input part, the signal output part that is used to import ultrasonic rf digital signal, and the signal output part of CPLD unit 1 is connected with the input end of FIFO external cache unit, and the output terminal of FIFO external cache unit is connected with the input end of PCI bridging chip 3; CPLD unit 1 also is provided with the look-at-me end that is used to produce look-at-me, and the look-at-me end of CPLD unit 1 is connected with the local look-at-me end of PCI bridging chip 3; The output terminal of PCI bridging chip 3 connects computing machine through pci bus 4.

Specifically; In the present embodiment; FIFO external cache unit includes a FIFO buffer 21 (FIFO1), the 2nd FIFO buffer 22 (FIFO2); The signal output part of CPLD unit 1 is connected with the input end of a FIFO buffer 21, the input end of the 2nd FIFO buffer 22, and the output terminal of the output terminal of a FIFO buffer 21, the 2nd FIFO buffer 22 all is connected with the input end of PCI bridging chip 3.In addition; CPLD unit 1 is provided with the logic control signal end of FIFO external cache unit; The logic control signal end is connected with a FIFO buffer 21, the 2nd FIFO buffer 22, and a slice FIFO (i.e. a FIFO buffer 21 or the 2nd FIFO buffer 22) that is used for selected external cache unit carries out the transmission of ultrasonic rf digital signal.

In the present embodiment, preferred CPLD unit 1 is the logic control chip, and the model of this logic control chip is EPM7128; The model of PCI bridging chip 3 is PCI9054; The clock frequency of pci bus 4 is that 33MHz, highway width are that 32, transmission bandwidth are 132MB/S.Certainly, the model and the parameter value of above-mentioned electronic devices and components and circuit unit are only for reference, when practical implementation present technique scheme, can make amendment according to actual environment.

The utility model in use; Can gather original ultrasonic rf digital signal from ultrasonic transducer, ultrasonic digitizing front-end module; Make original ultrasonic rf digital signal can import the signal input part of the CPLD unit 1 of the utility model; Then; After the ultrasonic rf digital signal that CPLD unit 1 will be imported was integrated into 32 bit data, signal was selected according to the sky/full zone bit generation FIFO1 of FIFO1 and FIFO2 in the FIFO external cache unit and the read/write of FIFO2 in CPLD unit 1, and ultrasonic rf digital signal is alternately write in the FIFO external cache unit through the table tennis transmission; When the data volume that writes to FIFO external cache unit reaches preset the requirement; CPLD unit 1 produces local look-at-me to PCI bridging chip 3, and PCI bridging chip 3 is opened the DMA passage after receiving look-at-me, ultrasonic rf digital signal is transferred to computing machine through pci bus 4.

Wherein, The utility model stores the driver of exploitation under the VC6.0 environment in advance, and this driver is that at first call function scans pci bus 4, detects the PCI integrated circuit board according to trading company of factory and device number; After detecting integrated circuit board, again the register of PCI bridging chip 3 is configured and equipment is carried out initialization and (comprise the selection of DMA passage; The setting of transmission mode is also opened up suitable core buffer etc. according to the size of every frame data), initialization is just interrupted enabling after accomplishing, and driver then gets into the Interrupt Process function after the value that detects local interrupt register changes; In the Interrupt Process function, close and interrupt enabling; Open the DMA transmission, the ultrasonic rf digital signal of the utility model collection transferred in the buffer zone that computing machine opens up, after each transmission is accomplished again opens interrupters enable; When receiving next look-at-me, can get into Interrupt Process again like this, realize the continuous transmission of data in this way.

In sum; The utility model is used for accomplishing the collection and the transmission of the ultrasonic rf digital signal of ultrasound medical imaging system; The utility model can be transferred to computing machine intactly, in real time with the ultrasonic rf digital signal that is comprising raw information in the echoed signal; Utilize computing machine maturation and powerful image processing function to restore ultrasonoscopy again from ultrasonic rf digital signal; Not only can accelerate the progress of medical informationization, and can also reduce the R&D costs of ultrasound medical imaging equipment to greatest extent.

Should be noted that at last; Above embodiment is only in order to explain the technical scheme of the utility model; But not to the restriction of the utility model protection domain, although with reference to preferred embodiment the utility model has been done explanation at length, those of ordinary skill in the art is to be understood that; Can make amendment or be equal to replacement the technical scheme of the utility model, and not break away from the essence and the scope of the utility model technical scheme.

Claims

1. ultrasonic rf digital signal capture card; It is characterized in that: include CPLD unit, FIFO external cache unit, PCI bridging chip; Said CPLD unit is provided with signal input part, the signal output part that is used to import ultrasonic rf digital signal; The signal output part of said CPLD unit is connected with the input end of said FIFO external cache unit, and the output terminal of said FIFO external cache unit is connected with the input end of said PCI bridging chip; Said CPLD unit also is provided with the look-at-me end that is used to produce look-at-me, and the look-at-me end of said CPLD unit is connected with the local look-at-me end of PCI bridging chip; The output terminal of said PCI bridging chip connects computing machine through pci bus.

2. ultrasonic rf digital signal capture card according to claim 1; It is characterized in that: said FIFO external cache unit includes a FIFO buffer, the 2nd FIFO buffer; The signal output part of said CPLD unit is connected with the input end of the input end of a FIFO buffer, the 2nd FIFO buffer, and the output terminal of the output terminal of a FIFO buffer, the 2nd FIFO buffer all is connected with the input end of said PCI bridging chip.

3. ultrasonic rf digital signal capture card according to claim 1 and 2 is characterized in that: said CPLD unit is the logic control chip, and the model of this logic control chip is EPM7128.

4. ultrasonic rf digital signal capture card according to claim 3 is characterized in that: the model of said PCI bridging chip is PCI9054.

5. ultrasonic rf digital signal capture card according to claim 4 is characterized in that: the clock frequency of said pci bus is that 33MHz, highway width are that 32, transmission bandwidth are 132MB/S.