CN202189147U

CN202189147U - Multimode navigation information terminal SoC (system on chip) chip integrating multiple IP cores

Info

Publication number: CN202189147U
Application number: CN2011201143748U
Authority: CN
Inventors: 常迎辉; 杜克明; 张勇; 李斌; 田素雷
Original assignee: CETC 54 Research Institute
Current assignee: CETC 54 Research Institute
Priority date: 2011-04-19
Filing date: 2011-04-19
Publication date: 2012-04-11
Anticipated expiration: 2021-04-19

Abstract

The utility model discloses a multimode navigation information terminal SoC (system on chip) chip integrating multiple IP (internet protocol) cores, relating to the information processing and audio and video data processing to satellite signals of a GPS(global position system)/a BD (bei dou)/a Galileo satellite positioning system in the navigation terminal field. The multimode navigation information terminal SoC chip consists of a multimode correlation processing module, a double CK-CORE processer (made in China), an audio and video processing module, an AMBA (advanced microcontroller bus architecture) bus, an RTC (real time clock) module and is embedded with a plurality of interface circuits such as a UART (universal asynchronous receiver/transmitter), a USB (universal serial bus) 2.0, a GPIO (general purpose input/output), an SDRAM (synchronous dynamic random access memory) controller and the like. In the utility model, the conversion of multiple application modes can be realized by a configuration register, and the chip has the characteristics of high locating precision, reliable performance, low cost, low power consumption and small volume and the like.

Description

A kind of multimode navigation information terminal SoC chip of integrated multiple IP kernel

Technical field

The utility model relates to the navigation signal of satellite navigation location product to be handled and consumer electronics middle pitch Video processing, particularly relates to the multimode navigation reception technique field based on multi-satellite system.

Background technology

Satellite navigation location product is the basis of satellite navigation position application development.Develop from satellite navigation and location system, satellite navigation locating terminal product is main with the GPS of USA product mainly at present, and the clone of a spot of GPS/Glonass is also arranged.Along with the construction of China's a new generation's Beidou satellite navigation and positioning system and Galileo system of European Union, in order to adapt to different positioning systems, satellite navigation locating terminal product technology will be to the technique direction development of a plurality of satellite navigation and location systems of compatibility.

Personal mobile information terminal based on the multimode navigation; Has boundless market application foreground; Have very big economic benefit and social benefit; And multimode navigator fix personal digital assistant device SoC chip is the core that realizes low cost, high-performance navigation neceiver and individual mobile navigation information terminal, is the key point that can China realize individual mobile navigation information terminal industryization.

Summary of the invention

The purpose of the utility model be to avoid the weak point in the above-mentioned background technology and provide a kind of can the compatible Big Dipper, the integrated navigation receiving trap of GPS, Galileo three systems, and possess the audio frequency and video processing capacity.This product has very strong market development promotional value owing to having wide, competitive strong, technology of profit height, coverage rate and the reliable advantage of management level.

The technical scheme of the utility model is achieved in that and the present invention includes on-chip SRAM 500, clock module 600, RTC module 800 and each class interface 700, it is characterized in that: also comprise multimode related process module 100, multimedia submodule 400, two CK-CORE300, AMBA bus and bridge module 200; Is connected with multimode related process module 100, multimedia submodule 400, on-chip SRAM 500 input ports 1 respectively by the clock signal of the generation of clock module 600 output port 1 through clock module 600, the output port 2 that passes through clock module 600 by the clock signal of the generation of clock module 600 is connected with AMBA bus and bridge module 200, two CK-CORE300, each class interface 700, RTC module 800 each input port 1 pin respectively;

Output port

2,3,4,5,6 pin of AMBA bus and bridge module 200 are connected with the I/O 2 of multimedia submodule 400, the I/O 2 of on-chip SRAM 500, the I/O 2 of two CK-CORE 300, the I/O 2 of each class interface 700, the I/O 3 of multimode related process module 100 respectively, and the correlation module data message carries out alternately through above-mentioned IO port; Intermediate frequency data gets into through the input end 4 of multimode related process module 100; Carry out operations such as data demodulates then; The audio, video data of outside need decoding flows into through the input port 3 of multimedia submodule 400, and the data after the processing are delivered to other module through the IO port 2 of AMBA bus and bridge module 200 and carried out relevant treatment; The output port 2 of multimode related process module 100 is connected with the input port 2 of RTC module 800, the reference information that multimode related process module 100 provides coherent signal to generate for RTC module 800 through output port 2.The output port 3 of RTC module 800 is seen the pps pulse per second signal that generates off.

Multimode related process module 100 comprises multimode multiple-frequency signal treatment channel 110, channel management module 120, quick capturing unit 130, time reference 140 and internal interface 150.Three tunnel sampled signals that receive the output of RF front-end chip get into the input end 1 of multimode multiple-frequency signal treatment channel 110 and the input end 4 of quick capturing unit 130 respectively, and the microprocessor that the result after the processing gives among embedded two CK-CORE 300 carries out the navigation information processing.The output terminal 1 of internal interface 150 links to each other with the input end 2 of multimode multiple-frequency signal treatment channel 110; The output 2 of internal interface 150 is connected with the input end 2 of channel management module 120; The output 3 of internal interface 150 is connected with the input end 2 of quick capturing unit 130; The output terminal 4 of internal interface 150 is connected with the input end 2 of time reference 140, through above-mentioned connection internal interface correlation module is controlled.The port 3 of signal processing channel 110 is connected with the port one of channel management module 120, realizes the mutual of data and control signal, and the port one of capturing unit 130 is connected with the port 3 of channel management module 120 fast, realizes the mutual of data and control signal.The output terminal 1 of time reference 140 is connected with the input end 3 of quick capturing unit 130, is used to the clock of providing and delivering.Capturing unit 130 mainly is used for realizing judging whether input signal matees with local signal, before acquiring pseudo code, confirms the initial position of code phase and the guestimate of Doppler shift earlier fast.Channel management module 120 has special register and is used for multimode multiple-frequency signal treatment channel 110 each related channel programs are carried out independence or jointly control, and writes down each passage duty.Time reference 140 is used for to multimode related process module 100 each submodule the operation clock being provided.Internal interface 150 mainly is used for providing the interface of interaction data and control to each submodule.

Multimedia submodule 400 comprises video decode module 410, audio decoder module 420 and screen display module 430.Wherein video decode module 410 is through the input and output of AMBA bus and bridge module 200 and each class interface 700 realization video code flow.Audio decoder module 420 is through realizing the input and output of audio code stream in each class interface 700.Screen display module 430 is realized the audio-visual synchronization broadcast with video decode module 410 and upper layer software (applications) 7000 cooperations; Wherein, the IO port 1 of audio decoder module 420 is connected with the IO port 3 of AMBA bus and bridge module 200, realizes the mutual of data stream and control signal; The IO port 1 of video decode module 410 is connected with the IO port 1 of AMBA bus and bridge module 200, realizes the mutual of data stream and control signal; The IO port 1 of screen display module 430 is connected with the IO port 2 of AMBA bus and bridge module 200, realizes the mutual of data stream and control signal; The output port 1 of clock module 600 is connected with the input port 3 of audio decoder module 420, for it provides the clock input; The output port 1 of clock module 600 is connected with the input port 3 of video decode module 410, for it provides clock signal; The output port 1 of clock module 600 is connected with the input port 3 of screen display module 430, for it provides clock signal; Pending data input gets into above-mentioned three modules through the input port 2 of audio decoder module 420, the input port 2 of video decode module 410, the input port 2 of screen display module 430, and the data of finishing dealing with are carried out data interaction through AMBA bus and bridge module 200 with other module.

Beneficial effect:

1, the utility model adopts GPS, the Big Dipper, Galileo three system combined signals can realize single system location and integrated navigation positioning function, and highly sensitive, bearing accuracy is high, and dirigibility is strong.

2, the utility model adopts homemade microprocessor to accomplish processing of multimode navigation information and the processing of multiple form audio, video data, when satisfying different user crowd demand, advances the industrialized development of homemade microprocessor.

3, the utlity model has abundant Peripheral Interface, like GPIO, UART, USB2.0, LCDC (video display controller), IIC (universal serial bus host-host protocol) etc. can expand the application of this chip.

Description of drawings

Fig. 1 is the utility model system architecture synoptic diagram.

Among Fig. 1,100 is that multimode related process module, 200 is that AMBA bus and bridge module, 300 are that two CK-CORE, 400 are that multimedia submodule, 500 is that on-chip SRAM, 600 is that clock module, 700 is that each class interface, 800 is the RTC module.

Fig. 2 is the utility model multimode related process module 100 structural representations.

Among Fig. 2,110 is that multimode multiple-frequency signal treatment channel, 120 is that channel management module, 130 is that quick capturing unit, 140 is that time reference and 150 is internal interface.

Fig. 3 is the utility model multimedia submodule 400 structural representations.

Among Fig. 3,410 is that video decode module, 420 is that audio decoder module and 430 is screen display module.

Fig. 4 is the utility model application example synoptic diagram.

Among Fig. 4,1000 is that receiving antenna, 2000 is that power supply, 3000 is that clock, 4000 is that radio frequency chip, (100 to 800) are that peripheral hardware, 6000 is that input and output interfaces and 7000 is a upper layer software (applications) for the multimode navigation information terminal SoC chip of integrated multiple IP, 5000.

Embodiment

With reference to Fig. 1 and Fig. 4, the utility model comprises multimode related process module 100, AMBA bus and bridge module 200, two CK-CORE 300, multimedia submodule 400, on-chip SRAM 500, clock module 600, each class interface 700, RTC module 800.Functions such as wherein the multimode related process module 100 sampling intermediate-freuqncy signal that is used for received RF chip output carries out that Digital Down Convert, sign indicating number are caught, capturing carrier, code tracking, carrier track, original observed quantity obtain, the result after the processing export CK-CORE microprocessor that the responsible satellite navigation information among two CK-CORE 300 handles to through AMBA bus and bridge module 200 and carry out navigation information and handle.AMBA bus and bridge module 200 be used for interconnecting two CK-CORE300, multimedia submodule 400, multimode related process module 100 and on-chip SRAM 500.Multimedia submodule 400 is through AMBA bus and integrated each class interface 700 of bridge module, and the application upper layer software (applications) is accomplished the Voice & Video decoding and realized screen display.A CK-CORE among two CK-CORE300 combines multimode related process module 100 to accomplish the processing of multimode navigation information, and another one CK-CORE combines multimedia submodule 400 to accomplish the audio frequency and video processing capacities.Each class interface 700 comprises UART, USB2.0, LCDC, and IIC, GPIO etc. mainly are used for accomplishing the input and output control of navigation and multi-medium data.On-chip SRAM 500 mainly is used for realizing the storage relative program, is used for the startup configuration of two CK-CORE 300.Clock module 600 is used for the operation clock to each main modular of chip being provided.RTC module 800 is used to produce the output of pulse per second (PPS) time service information.

With reference to Fig. 2 and Fig. 4, multimode related process module 100 comprises multimode multiple-frequency signal treatment channel 110, channel management module 120, quick capturing unit 130, time reference 140 and internal interface 150.Multimode related process module 100 is to realize the core and the key point of high precision, high sensitivity navigation locating function; It is mainly used in three tunnel sampled signals that receive the output of RF front-end chip and gets into the input end 1 of multimode multiple-frequency signal treatment channel 110 and the input end 4 of quick capturing unit 130 respectively, and the microprocessor that the result after the processing gives among embedded two CK-CORE 300 carries out the navigation information processing.The output terminal 1 of internal interface 150 links to each other with the input end 2 of multimode multiple-frequency signal treatment channel 110; The output 2 of internal interface 150 is connected with the input end 2 of channel management module 120; The output 3 of internal interface 150 is connected with the input end 2 of quick capturing unit 130; The output terminal 4 of internal interface 150 is connected with the input end 2 of time reference 140, through above-mentioned connection internal interface correlation module is controlled.The port 3 of signal processing channel 110 is connected with the port one of channel management module 120, realizes the mutual of data and control signal, and the port one of capturing unit 130 is connected with the port 3 of channel management module 120 fast, realizes the mutual of data and control signal.The output terminal 1 of time reference 140 is connected with the input end 3 of quick capturing unit 130, is used to the clock of providing and delivering.Capturing unit 130 mainly is used for realizing judging whether input signal matees with local signal fast; Before acquiring pseudo code, confirm earlier the guestimate (if these prior imformations of nothing then can only not carried out blind search) of initial position with the Doppler shift of code phase, and then slide between the 2D signal search unit that constitutes by code phase search unit and Doppler shift search unit.Channel management module 120 has special register and is used for multimode multiple-frequency signal treatment channel 110 each related channel programs are carried out independence or jointly control; And write down each passage duty; The support software and hardware resets, and the selection of GPS/BD-2/Galileo pattern is selected through the internal control position.Time reference 140 is used for to multimode related process module 100 each submodule the operation clock being provided.Internal interface 150 mainly is used for providing the interface of interaction data and control to each submodule.

With reference to Fig. 3, Fig. 4, multimedia submodule 400 comprise video decode module 410, audio decoder module 420 and screen display module 430.Wherein H.264 video decode module 410 support comprises the video protocols standard with MPEG4, realizes the input and output of video code flows through AMBA bus and bridge module 200 and each class interface 700 and peripheral hardware 5000.Audio decoder module 420 is software I P in fact, supports to comprise the audio protocols standard of MP3 and AAC, realizes the input and output of audio code stream through IIS in each class interface 700 (the universal serial bus host-host protocol that is used for audio frequency) and peripheral components AC97.Screen display module 430 is supported six layers of demonstration, comprises one deck background layer, two-layer video layer, two-layer image layer, one deck cursor layer, and realizes the audio-visual synchronization broadcast with video decode module 410 and upper layer software (applications) 7000 cooperations.Wherein, the port one of audio decoder module 420 is connected with the port one of two CK-CORE 300, realizes the mutual of data stream and control signal; The port one of video decode module 410 is connected with the port one of AMBA bus and bridge module 200, realizes the mutual of data stream and control signal; The port one of screen display module 430 is connected with the port 2 of AMBA bus and bridge module 200, realizes the mutual of data stream and control signal; The port 2 of two CK-CORE 300 is connected with the port 3 of AMBA bus and bridge module 200, realizes the mutual of data stream and control signal.

The utility model application example synoptic diagram structure as shown in Figure 4.Multimode navigation information terminal SoC chip (100 to 800), peripheral hardware 5000, input and output interfaces 6000 and the upper layer software (applications) 7000 etc. that mainly comprise receiving antenna 1000, power supply 2000, clock 3000, radio frequency chip 4000, integrated multiple IP.This instance can be used for the high-performance multimode navigation neceiver plate of multiple integrated application, even under abominable signal conditioning, still have powerful signal framing and tracking power.The flow process of this instance processes navigation data is following: the BD-2/GPS/Galileo data-signal of satellite transmission is through receiving antenna 1000; Get into radio frequency chip 4000; This part of module to the radiofrequency signal that receives amplify, down coversion and filtering; Obtain intermediate-freuqncy signal; And it is carried out analog to digital conversion, and export at last in the multimode navigation information terminal SoC chip (100 to 800) of integrated multiple IP, separate and translate the navigation message that the BD-2/GPS/Galileo satellite is sent; Calculated at last the information such as three-dimensional coordinate, speed, time of measurement point by embedded two CK-CORE 300, the NMEA20183 communication standard form that converts American National ocean Institution of Electronics (NMEA) customization at last into is exported.The NMEA output data is an ASCII character, and statement has tens of kinds, and its content mainly contains longitude, latitude, elevation, speed, time, date etc.

This application example has the multimedia messages processing capacity; Can realize H.264, the processing capacity of MPEG-4 audio, video datas such as (video compression coding-decoding standards); Support the Audio Processing function; And have flexibly IO interface 6000 and audio frequency and video and play required peripheral hardware 5000, can the intermediateness of various data processing be exported to other terminal device, to make things convenient for the further processing and the application of data.

Claims

1. the multimode navigation information terminal SoC chip of an integrated multiple IP kernel; Comprise on-chip SRAM (500), clock module (600), RTC module (800) and each class interface (700), it is characterized in that: also comprise multimode related process module (100), multimedia submodule (400), two CK-CORE (300), AMBA bus and bridge module (200); Is connected with multimode related process module (100), multimedia submodule (400), on-chip SRAM (500) input port 1 respectively by the clock signal of the generation of clock module (600) output port 1 through clock module (600), the output port 2 that passes through clock module (600) by the clock signal of the generation of clock module (600) is connected with AMBA bus and bridge module (200), two CK-CORE (300), each class interface (700), each input port 1 pin of RTC module (800) respectively; IO port 2,3,4,5,6 pin of AMBA bus and bridge module (200) are connected with the I/O 2 of the I/O 2 of multimedia submodule (400), the I/O 2 of on-chip SRAM (500), two CK-CORE (300), the I/O 2 of each class interface (700), the I/O 3 of multimode related process module (100) respectively, and the correlation module data message carries out alternately through above-mentioned IO port; Intermediate frequency data gets into through the input end 4 of multimode related process module (100), carries out data demodulates then; The audio, video data of outside need decoding flows into through the input port 3 of multimedia submodule (400), and the data after the processing are delivered to other module through the IO port 2 of AMBA bus and bridge module (200) and carried out relevant treatment; The output port 2 of multimode related process module (100) is connected with the input port 2 of RTC module (800), the reference information that multimode related process module (100) provides coherent signal to generate for RTC module (800) through output port 2; The output port 3 of RTC module (800) is seen the pps pulse per second signal that generates off; Wherein, each class interface (700) is UART, USB2.0, LCDC, IIC or GPIO interface.

2. the multimode navigation information terminal SoC chip of integrated multiple IP kernel according to claim 1 is characterized in that: described multimode related process module (10) comprises multimode multiple-frequency signal treatment channel (110), channel management module (120), capturing unit (130), time reference (140) and internal interface (150) fast; Intermediate frequency data gets into the input end 1 of multimode multiple-frequency signal treatment channel (110) and the input end 4 of quick capturing unit (130) respectively, and the microprocessor that the result after the processing gives among embedded two CK-CORE (300) carries out the navigation information processing; The output terminal 1 of internal interface (150) links to each other with the input end 2 of multimode multiple-frequency signal treatment channel (110); The output 2 of internal interface (150) is connected with the input end 2 of channel management module (120); The output 3 of internal interface (150) is connected with the input end 2 of quick capturing unit (130); The output terminal 4 of internal interface (150) is connected with the input end 2 of time reference (140), through above-mentioned connection internal interface correlation module is controlled; The IO port 3 of signal processing channel (110) is connected with the IO port 1 of channel management module (120); Realize the mutual of data and control signal; The IO port 1 of capturing unit (130) is connected with the IO port 3 of channel management module (120) fast, realizes the mutual of data and control signal; The output terminal 1 of time reference (140) is connected with the input end 3 of quick capturing unit (130), is used to the clock of providing and delivering.

3. the multimode navigation information terminal SoC chip of integrated multiple IP kernel according to claim 1, it is characterized in that: multimedia submodule (400) comprises video decode module (410), audio decoder module (420) and screen display module (430); Wherein, the IO port 1 of audio decoder module (420) is connected with the IO port 3 of AMBA bus and bridge module (200), realizes the mutual of data stream and control signal; The IO port 1 of video decode module (410) is connected with the IO port 1 of AMBA bus and bridge module (200), realizes the mutual of data stream and control signal; The IO port 1 of screen display module (430) is connected with the IO port 2 of AMBA bus and bridge module (200), realizes the mutual of data stream and control signal; The output port 1 of clock module (600) is connected with the input port 3 of audio decoder module (420), for it provides the clock input; The output port 1 of clock module (600) is connected with the input port 3 of video decode module (410), for it provides clock signal; The output port 1 of clock module (600) is connected with the input port 3 of screen display module (430), for it provides clock signal; Pending data input gets into above-mentioned three modules through the input port 2 of audio decoder module (420), the input port 2 of video decode module (410), the input port 2 of screen display module (430), and the data of finishing dealing with are carried out data interaction through AMBA bus and bridge module (200) with other module.