CN202153539U - 一种通过键合银丝连接的半导体发光二极管二次封装件 - Google Patents

一种通过键合银丝连接的半导体发光二极管二次封装件 Download PDF

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CN202153539U
CN202153539U CN2011202599067U CN201120259906U CN202153539U CN 202153539 U CN202153539 U CN 202153539U CN 2011202599067 U CN2011202599067 U CN 2011202599067U CN 201120259906 U CN201120259906 U CN 201120259906U CN 202153539 U CN202153539 U CN 202153539U
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袁毅
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

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Abstract

本实用新型公开了一种通过键合银丝连接的半导体发光二极管二次封装件,包括由第一引线架体和第二引线架体组成的引线架,在所述的第一引线架体上固定连接有至少一个发光二极管封装件和用于驱动或控制发光二极管封装件的电路器件,在所述的发光二极管封装件与第一引线架体之间设有导电粘胶,在所述的电路器件与第一引线架体之间设有导电粘胶,在所述的第一引线架体与所述的发光二极管封装件之间连接有表面包覆钯层的键合银丝,在所述的发光二极管封装件与电路器件之间连接有键合银丝,在所述的电路器件与第二引线架体之间连接有键合银丝,在所述的引线架一端上设有将发光二极管封装件,电路器件和键合银丝封装起来的密封体。

Description

一种通过键合银丝连接的半导体发光二极管二次封装件
技术领域
本实用新型涉及一种半导体发光二极管二次封装件,本实用新型特别涉及一种通过表面包覆钯层的键合银丝连接的半导体发光二极管二次封装件。
背景技术
半导体发光二极管二次封装件,它的基本结构是将经过封装的半导体发光二极管与其驱动或控制电路器件在完成连接后,用密封材料密封,并输出可见光。封装结构分有全环氧包封、金属底座环氧封装、陶瓷底座环氧封装及玻璃封装等结构。
经过封装的半导体发光二极管与其驱动或控制电路器件分别粘结在引线架上,通过金属丝连接来构成电路,然后用密封材料密封,并输出可见光。目前金属丝一般采用键合金丝或键合硅铝丝,并通过焊线机完成接点的结合,然后封装。本发明就是在这样的背景下作出的。
实用新型内容
本实用新型的目的是为了克服现有技术中的不足之处,提供一种结构简单,可提高可靠性、热转移效率、功率和光折射率,延长使用寿命,降低生产成本的半导体发光二极管二次封装件。
为了达到上述目的,本实用新型采用以下方案:
一种通过键合银丝连接的半导体发光二极管二次封装件,包括引线架,所述的引线架包括第一引线架体和第二引线架体,在所述的第一引线架体上固定连接有至少一个发光二极管封装件和用于驱动或控制发光二极管封装件的电路器件,在所述的发光二极管封装件与第一引线架体之间设有导电粘胶,在所述的电路器件与第一引线架体之间设有导电粘胶,其特征在于:在所述的第一引线架体与所述的发光二极管封装件之间连接有表面包覆钯层的键合银丝,在所述的发光二极管封装件与电路器件之间连接有键合银丝,在所述的电路器件与第二引线架体之间连接有键合银丝,在所述的引线架一端上设有将发光二极管封装件,电路器件和键合银丝封装起来的密封体。
如上所述的一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于在所述的发光二极管封装件上分别设有封装件接头,所述的键合银丝一端分别连接在所述的封装件接头上。
如上所述的一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于在所述的电路器件上分别设有器件接头所述的键合银丝一端分别连接在所述的器件接头上。
如上所述的任一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于所述的发光二极管封装件为多个,各个发光二极管封装件分别通过键合银丝连电接在同一电路器件上。
如上所述的任一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于所述的发光二极管封装件为多个,各个发光二极管封装件分别通过键合银丝连电接在单独的电路器件上。
如上所述的一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于在所述的导电粘胶上设有连通所述发光二极管封装件与第一引线架体的散热孔。
如上所述的一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于在所述的导电粘胶上设有连通所述电路器件与第一引线架体的散热孔。
综上所述,本实用新型相对于现有技术其有益效果是:
1、采用表面包覆钯层的键合银丝连接,可以提供最优的成本,并获得性能上的提高。
2、银的导热性、导电性高于金及铝,因而可提高其热转移效率及功率和光折射率,并延长LED使用寿命。
3、银的成本相对很低,更是成为替代焊接材料的一大优势,有利于降低生产成本。
附图说明
图1为本实用新型的剖面示意图;
图2为图1中A处的放大图;
图3为半导体晶片的第一种实施方式的示意图;
图4为半导体晶片的第二种实施方式的示意图。
具体实施方式
下面结合附图说明和具体实施方式对本实用新型作进一步描述:
如图1至4所示的一种半导体发光二极管二次封装件,包括引线架1,所述的引线架1包括第一引线架体11和第二引线架体12,在所述的第一引线架体11上固定连接有至少一个发光二极管封装件2和用于驱动或控制发光二极管封装件2的电路器件3,在所述的发光二极管封装件2与第一引线架体11之间设有导电粘胶4,在所述的电路器件3与第一引线架体11之间设有导电粘胶4,在所述的第一引线架体11与所述的发光二极管封装件2之间连接有表面包覆钯层的键合银丝5,在所述的发光二极管封装件2与电路器件3之间连接有键合银丝5,在所述的电路器件3与第二引线架体12之间连接有键合银丝5,在所述的引线架1一端上设有将发光二极管封装件2,电路器件3和键合银丝5封装起来的密封体6。其中所述的密封体6封装可为全环氧密封或金属底座环氧密封或陶瓷底座环氧或玻璃密封或其它物质密封。
本实用新型中在所述的发光二极管封装件2上分别设有封装件接头21,22,所述的键合银丝5一端分别连接在所述的封装件接头21,22上。在所述的电路器件3上分别设有器件接头31,32,所述的键合银丝5一端分别连接在所述的器件接头31,32上。
如图3所示,本实用新型中发光二极管封装件2的第一种实施方式,所述的发光二极管封装件2为多个,各个发光二极管封装件2分别通过键合银丝5连电接在同一电路器件3上。
如图43所示,本实用新型中发光二极管封装件2的第一种实施方式,所述的发光二极管封装件2为多个,各个发光二极管封装件2分别通过键合银丝5连电接在单独的电路器件3上。
本实用新型中在所述的导电粘胶4上设有连通所述发光二极管封装件2与第一引线架体11的散热孔7。在所述的导电粘胶4上设有连通所述电路器件3与第一引线架体11的散热孔7。

Claims (7)

1.一种通过键合银丝连接的半导体发光二极管二次封装件,包括引线架(1),所述的引线架(1)包括第一引线架体(11)和第二引线架体(12),在所述的第一引线架体(11)上固定连接有至少一个发光二极管封装件(2)和用于驱动或控制发光二极管封装件(2)的电路器件(3),在所述的发光二极管封装件(2)与第一引线架体(11)之间设有导电粘胶(4),在所述的电路器件(3)与第一引线架体(11)之间设有导电粘胶(4),其特征在于:在所述的第一引线架体(11)与所述的发光二极管封装件(2)之间连接有表面包覆钯层的键合银丝(5),在所述的发光二极管封装件(2)与电路器件(3)之间连接有键合银丝(5),在所述的电路器件(3)与第二引线架体(12)之间连接有键合银丝(5),在所述的引线架(1)一端上设有将发光二极管封装件(2),电路器件(3)和键合银丝(5)封装起来的密封体(6)。
2.根据权利要求1所述的一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于在所述的发光二极管封装件(2)上分别设有封装件接头(21,22),所述的键合银丝(5)一端分别连接在所述的封装件接头(21,22)上。
3.根据权利要求1所述的一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于在所述的电路器件(3)上分别设有器件接头(31,32),所述的键合银丝(5)一端分别连接在所述的器件接头(31,32)上。
4.根据权利要求1至3中任一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于所述的发光二极管封装件(2)为多个,各个发光二极管封装件(2)分别通过键合银丝(5)连电接在同一电路器件(3)上。
5.根据权利要求1至3中任一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于所述的发光二极管封装件(2)为多个,各个发光二极管封装件(2)分别通过键合银丝(5)连电接在单独的电路器件(3)上。
6.根据权利要求1所述的一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于在所述的导电粘胶(4)上设有连通所述发光二极管封装件(2)与第一引线架体(11)的散热孔(7)。
7.根据权利要求1所述的一种通过键合银丝连接的半导体发光二极管二次封装件,其特征在于在所述的导电粘胶(4)上设有连通所述电路器件(3)与第一引线架体(11)的散热孔(7)。
CN2011202599067U 2011-07-21 2011-07-21 一种通过键合银丝连接的半导体发光二极管二次封装件 Expired - Fee Related CN202153539U (zh)

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