CN202150274U - Anti-lost circuit structure for EEPROM (Electrically Erasable Programmable Read Only Memory) data - Google Patents

Anti-lost circuit structure for EEPROM (Electrically Erasable Programmable Read Only Memory) data Download PDF

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Publication number
CN202150274U
CN202150274U CN201120254807U CN201120254807U CN202150274U CN 202150274 U CN202150274 U CN 202150274U CN 201120254807 U CN201120254807 U CN 201120254807U CN 201120254807 U CN201120254807 U CN 201120254807U CN 202150274 U CN202150274 U CN 202150274U
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China
Prior art keywords
eeprom
data
write
pin
circuit structure
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Expired - Fee Related
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CN201120254807U
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Chinese (zh)
Inventor
李红
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Chunghwa Picture Tubes Wujiang Ltd
CPT Video Wujiang Co Ltd
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CPT Video Wujiang Co Ltd
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Priority to CN201120254807U priority Critical patent/CN202150274U/en
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Abstract

The utility model discloses an anti-lost circuit structure for EEPROM (Electrically Erasable Programmable Read Only Memory) data. The anti-lost circuit structure comprises an EEPROM chip, a control unit and a data-burning element; the EEPROM chip is provided with a write-protection pin; the data-burning element is provided with an idle pin; the control unit further comprises a power source module and a resistor; one end of the resistor is connected with the power source module, and the other end of the resistor is connected with the write-protection pin; and the write-protection pin is connected with the idle pin of the data-burning element. Compared with the prior art, the anti-lost circuit structure for the EEPROM data is simple in structure, has low cost, can burn an EEPROM as required, and can effectively prevent the error and loss of the EEPROM data.

Description

The anti-lost circuit structure of a kind of EEPROM data
Technical field
The utility model relates to the EEPROM industrial field, the anti-lost circuit structure of particularly a kind of EEPROM data.
Background technology
EEPROM (Electrically Erasable Programmable Read-Only Memory), EEPROM---the storage chip that data are not lost after a kind of power down.EEPROM can on computers or wipe existing information, reprogramming on the specialized equipment.Generally be used in plug and play.
Fig. 1 is the connection synoptic diagram of present eeprom circuit.The 7th pin WP of eeprom chip is the write-protect pin of this device among the figure, when it opens write-protect mechanism during for high level; When it does not have write-protect during for low level.The sort circuit structure makes present EEPROM for making things convenient for burning data, it is not carried out write-protect on the circuit design, because the influence of environment, phenomenon such as occur the EEPROM error in data easily, lose causes product normally to use in the practical application.
China's application number is that 200820018796.3 utility model patent discloses a kind of EEPROM data protection circuit; Comprise and be used for port that is connected with eeprom chip and the port that is used for being connected with CPU; It also comprises EEPROM write-protect control circuit; CPU is connected with eeprom chip through EEPROM write-protect control circuit, and CPU is through controlling said EEPROM write-protect control circuit conducting and close, thus the power supply timing of control eeprom chip.Though this patent has solved the problem that memory data is rewritten or lost.But its structure is complicated, and has employed CPU and controlled, and cost is higher.
The utility model content
In order to overcome the defective of prior art, the utility model discloses the anti-lost circuit structure of a kind of EEPROM data, it is simple in structure, and cost is low, can effectively prevent EEPROM error in data, the phenomenon of losing to the EEPROM burning in needs.
The disclosed technical scheme of the utility model is following:
The anti-lost circuit structure of a kind of EEPROM data comprises eeprom chip, control module, burning data element; Said eeprom chip is provided with the write-protect pin, and said burning data element is provided with an idle pin;
Said control module further comprises power module, resistance; Said resistance one end is connected with power module, and the other end is connected with said write-protect pin;
Said write-protect pin is connected with the idle pin of said burning data element.
Compared with prior art, the utility model is simple in structure, and cost is low, can effectively prevent EEPROM error in data, the phenomenon of losing to the EEPROM burning data in needs.
Description of drawings
Fig. 1 is that present eeprom circuit connects synoptic diagram;
Fig. 2 is that the circuit of the anti-lost circuit structure of a kind of EEPROM data of the utility model embodiment connects synoptic diagram.
Embodiment
The below combines accompanying drawing and specific embodiment that the utility model is done further description.
Embodiment
Like Fig. 2, the anti-lost circuit structure of a kind of EEPROM data comprises eeprom chip 10, control module 20, burning data element 30.Eeprom chip 10 is provided with the write-protect pin, and said burning data element 30 is provided with an idle pin.
In the present embodiment, the write-protect pin of eeprom chip 10 is its 7th pin WP.
The idle pin of burning data element 30 is numbered 301 pin for it.
Control module 20 further comprises power module VDD, resistance R 1; Resistance R 1 one ends are connected with power module VDD, and the other end is connected with the write-protect pin of eeprom chip 10.
Simultaneously, the write-protect pin of eeprom chip 10 is connected with the idle pin 301 of burning data element 30.And the SCL of eeprom chip 10, SDA are connected on the respective pins of burning data element 30.And the VCC pin of eeprom chip 10 is connected on the power module VDD.
In the time of need carrying out write-protect to eeprom chip 10, the idle pin 301 of the burning data element 30 that its WP write-protect pin connects is vacant, and then WP write-protect pin is a high level, and eeprom chip 10 is carried out write-protect.
When needs carry out data burning to EEPROM, idle pin 301 ground connection of the burning data element 30 that will be connected with WP write-protect pin, then WP write-protect pin is a low level, removes its write-protect state.Simultaneously, through giving SCL, SDA, three pins of VCC corresponding signal is provided, thereby accomplishes data burning.
Compared with prior art, the utility model is simple in structure, and cost is low, can effectively prevent EEPROM error in data, the phenomenon of losing to the EEPROM burning data in needs.
The utility model preferred embodiment just is used for helping to set forth the utility model.Preferred embodiment does not have all details of detailed descriptionthe, does not limit this utility model yet and is merely described embodiment.Obviously, according to the content of this instructions, can do a lot of modifications and variation.These embodiment are chosen and specifically described to this instructions, is principle and practical application in order to explain the utility model better, thereby person skilled can be utilized the utility model well under making.The utility model only receives the restriction of claims and four corner and equivalent.More than the disclosed several specific embodiments that are merely the application, but the application is not limited thereto, any those skilled in the art can think variation, all should drop in the application's the protection domain.

Claims (1)

1. the anti-lost circuit structure of EEPROM data is characterized in that, comprises eeprom chip, control module, burning data element; Said eeprom chip is provided with the write-protect pin, and said burning data element is provided with an idle pin;
Said control module further comprises power module, resistance; Said resistance one end is connected with power module, and the other end is connected with said write-protect pin;
Said write-protect pin is connected with the idle pin of said burning data element.
CN201120254807U 2011-07-19 2011-07-19 Anti-lost circuit structure for EEPROM (Electrically Erasable Programmable Read Only Memory) data Expired - Fee Related CN202150274U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201120254807U CN202150274U (en) 2011-07-19 2011-07-19 Anti-lost circuit structure for EEPROM (Electrically Erasable Programmable Read Only Memory) data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201120254807U CN202150274U (en) 2011-07-19 2011-07-19 Anti-lost circuit structure for EEPROM (Electrically Erasable Programmable Read Only Memory) data

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CN202150274U true CN202150274U (en) 2012-02-22

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103531237A (en) * 2012-07-05 2014-01-22 北京兆易创新科技股份有限公司 System and method for quickly burning memory chip
CN103531236A (en) * 2012-07-05 2014-01-22 北京兆易创新科技股份有限公司 System and method for quickly burning memory chip
WO2019205637A1 (en) * 2018-04-24 2019-10-31 天浪创新科技(深圳)有限公司 Data writing method, system, and device for integrated circuit chip, apparatus, and medium
CN113721942A (en) * 2021-08-31 2021-11-30 Tcl华星光电技术有限公司 Display device driving system and display device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103531237A (en) * 2012-07-05 2014-01-22 北京兆易创新科技股份有限公司 System and method for quickly burning memory chip
CN103531236A (en) * 2012-07-05 2014-01-22 北京兆易创新科技股份有限公司 System and method for quickly burning memory chip
WO2019205637A1 (en) * 2018-04-24 2019-10-31 天浪创新科技(深圳)有限公司 Data writing method, system, and device for integrated circuit chip, apparatus, and medium
US11410711B2 (en) 2018-04-24 2022-08-09 Tiro Innovation Technology (shenzhen) Co., Ltd. Data writing method and apparatus
CN113721942A (en) * 2021-08-31 2021-11-30 Tcl华星光电技术有限公司 Display device driving system and display device
CN113721942B (en) * 2021-08-31 2024-01-30 Tcl华星光电技术有限公司 Display device driving system and display device

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120222

Termination date: 20160719

CF01 Termination of patent right due to non-payment of annual fee