CN202135116U - System realizing high resolution analog-to-digital conversion by using low resolution ADC - Google Patents

System realizing high resolution analog-to-digital conversion by using low resolution ADC Download PDF

Info

Publication number
CN202135116U
CN202135116U CN201120190405U CN201120190405U CN202135116U CN 202135116 U CN202135116 U CN 202135116U CN 201120190405 U CN201120190405 U CN 201120190405U CN 201120190405 U CN201120190405 U CN 201120190405U CN 202135116 U CN202135116 U CN 202135116U
Authority
CN
China
Prior art keywords
unit
analog
resolution
low resolution
ccd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201120190405U
Other languages
Chinese (zh)
Inventor
邱跃洪
陈智
文延
汶德胜
姚大雷
江宝钽
高博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
XiAn Institute of Optics and Precision Mechanics of CAS
Original Assignee
XiAn Institute of Optics and Precision Mechanics of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by XiAn Institute of Optics and Precision Mechanics of CAS filed Critical XiAn Institute of Optics and Precision Mechanics of CAS
Priority to CN201120190405U priority Critical patent/CN202135116U/en
Application granted granted Critical
Publication of CN202135116U publication Critical patent/CN202135116U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Analogue/Digital Conversion (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

The utility model relates to a system realizing high resolution analog-to-digital conversion by using a low resolution ADC of a CCD camera, comprising a pretreatment unit for carrying out last-stage pretreatment on a CCD analog signal produced by a focal plane assembly FPA, an amplification unit for amplifying a pretreated CCD analog video signal, and a conversion unit for carrying out analog-to-digital conversion on an amplified video signal and converting a low bit quantification result into a high bit quantification result. The pretreatment unit, the amplification unit and the conversion unit are electrically connected sequentially. The utility model provides a system realizing high resolution analog-to-digital conversion by using a low resolution ADC of a CCD camera, which is short in delay, high in transmission rate, strong in anti-interference capability, high in signal to noise ratio, and wide in application scope.

Description

A kind of low resolution A C realizes the analog-to-digital system of high-resolution
Technical field
The utility model belongs to electricity field, relates to a kind of A/D conversion system, relates in particular to a kind of CCD camera that is directed against and utilizes low resolution A C to realize the analog-to-digital system of high-resolution.
Background technology
The CCD camera has been widely used in astrosurveillance at present, and its spectral region covers between the 300nm-1100nm.In order to make full use of the dynamic range of ccd detector, when the design of CCD signal processing circuit is selected ADC, should satisfy the dynamic range of the dynamic range of ADC greater than CCD as far as possible.Present CCD especially the dynamic range of scientific grade CCD up to 10 5: 1, even 10 6: 1, this moment is if will satisfy DR ADC>=DR CCD, then must select resolution is the ADC of 18-20bit.And high-grade, high performance high resolution A C is less and cost an arm and a leg, so in signal processing circuit, occur following two kinds of situation usually:
1) sacrificed the high-end dynamic range of CCD, guaranteed the sensitivity of camera, be i.e. camera system channel gain little (the system channel gain G is defined as camera system and whenever reads a pairing electron number of ADC quantization unit);
2) sacrifice the sensitivity of camera, guaranteed the high-end dynamic range of CCD.
The CCD camera system is different from other signal processing systems, and the most basic difference is that its noise spectral density has substantial connection with signal magnitude.CCD camera system noise is mainly by photon noise, reset noise, dark signal noise with read noise and form.Wherein, dark signal noise can reduce dark signal noise through the CCD device is freezed.And photon noise and signal magnitude are closely bound up.When CCD surveyed large-signal, photon noise was the main noise of CCD camera system; When CCD surveys small-signal, read the main noise that noise is the CCD camera system.
According to CCD camera system noise characteristic, realize high-resolution analog-to-digital conversion with low resolution analog to digital converter (lradc) ADC, mainly be to realize through the thought that thickness quantizes.When adopting n bit high-resolution ADC to carry out analog-to-digital conversion, the system channel gain is:
G = S FW 2 n ( e - / LSB ) , S wherein FWBe full trap charge capacity.
When the low resolution A C that adopts (n-m) bit carries out analog-to-digital conversion, and the thought that adopts thickness to quantize, the system channel gain G is:
When large-signal is surveyed, the system channel gain G Greatly:
Figure BDA0000067193210000021
S wherein FWBe full trap charge capacity.
When small-signal is surveyed, it is amplified 2 mDoubly, the system channel gain G 4
Figure BDA0000067193210000022
S wherein FWBe full trap charge capacity.
When large-signal is surveyed, directly adopt low resolution A C to change, the system channel gain is increased, the detectivity of camera reduces, but because signal is stronger at this moment, and photon noise is a main noise, therefore can not influence the detection of camera to large-signal; When small-signal is surveyed, signal is amplified 2 mDoubly; System channel gain when using the low resolution A C of (n-m) bit to carry out analog-to-digital conversion is again carried out analog-to-digital identical with employing nbit high-resolution ADC; The detectivity of camera do not reduce owing to the reduction of ADC resolution, thus the precision when having guaranteed that small-signal is surveyed.
Realize that for low resolution A C the analog-to-digital conventional method of high-resolution is: with (n-m) bit low resolution A C, an amplifying circuit and an analog switch are realized the high-resolution analog-to-digital conversion, referring to shown in Figure 1.This scheme at first will be after AFE(analog front end) be handled the CCD vision signal, simulate comparison with preset threshold, judgement is high light signal or low light level signal; Select corresponding amplifying circuit to amplify according to judged result then, give data processing unit with selected multiplication factor simultaneously; Data processing unit carries out corresponding data processing according to the multiplication factor that provides to (n-m) bit data of ADC conversion.This scheme need be simulated comparison, and simulation relatively can cause the time-delay in the data transmission link.And need in the circuit to increase the gain data line, give data processing unit with selected multiplication factor, correctly deal with data is used in order to data processing unit.
The utility model content
In order to solve the above-mentioned technical problem that exists in the background technology, the utility model provide a kind of postpone little, transmission rate is high, antijamming capability is strong, signal to noise ratio is high and applied range realize the analog-to-digital realization of high-resolution system to CCD camera low resolution A C.
The technical solution of the utility model is: the utility model provides a kind of low resolution A C to realize the analog-to-digital realization of high-resolution system, and its special character is: said system comprises amplifying unit that the CCD analog signal that focal plane component FPA is produced carries out the pretreated pretreatment unit of back level, pretreated CCD analog video signal is amplified, the vision signal after will amplifying is carried out analog-to-digital conversion and the converting unit that the low level quantized result converted into high-order quantized result; Said pretreatment unit, amplifying unit and converting unit electrically connect successively.
Said system comprises also and is used for amending unit that high-order quantized result is setovered and revised that said amending unit links to each other with converting unit.
Above-mentioned pretreatment unit comprises buffering amplifying unit and the correlated-double-sampling unit that is connected with the buffering amplifying unit.
Above-mentioned amplifying unit is two operational amplifiers with different amplification.
Above-mentioned converting unit comprises AD conversion unit, data processing unit and thick, the thin quantized result automatic switch unit that links to each other with data processing unit.
The utility model has the advantages that:
1, delay is little, transmission rate is high, antijamming capability is strong.What the utility model provided realizes that to a kind of low resolution A C the analog-to-digital realization of high-resolution system changes the mode that tradition is amplified earlier more again; Directly adopt the amplifier of different amplification at first to amplify; Carry out digital-to-analogue conversion then, the thought that the utility model utilizes thickness to quantize realizes that low resolution A C reaches high-resolution analog-to-digital conversion.Exactly because by two amplifiers with different amplification, binary channels (n-m) bitADC and a FPGA form, and directly analog signal are carried out simultaneously slightly, are carefully quantized.Need not to simulate comparison process; Can reduce the caused delay of simulation comparison process, help the raising of whole signal processing chain message transmission rate, in FPGA, signal magnitude carried out numeral relatively; Accomplish the thickness quantized result and automatically switch, output n bit ADC quantized value.Simultaneously, the utility model adopts FPGA to carry out numeral relatively, and not only comparative result is accurate, and is not subject to The noise and interference.
2, high, the applied range of signal to noise ratio.The utility model is accomplished the correction of CCD camera low level ADC also having been carried out the image biasing when the high-resolution analog-to-digital conversion realizes to ADC; The ccd image data biasing fluctuation that has effectively suppressed the unsteadiness of whole video handle link biasing and caused; Improve signal to noise ratio, thereby enlarged the dynamic range of CCD camera.Simultaneously, because the utility model is simple, portable strong.Can on the basis of original camera video treatment circuit, change the dynamic range that can enlarge the CCD camera a little.
Description of drawings
Fig. 1 is traditional realization high-resolution analog-to-digital conversion schematic flow sheet;
Fig. 2 is the structural representation of system that the utility model provides.
Embodiment
The utility model provides a kind of low resolution A C to realize the analog-to-digital realization of high-resolution system, and this system comprises amplifying unit that the CCD analog signal that focal plane component FPA is produced carries out the pretreated pretreatment unit of back level, pretreated CCD analog video signal is amplified, the vision signal after will amplifying is carried out analog-to-digital conversion and the converting unit that the low level quantized result converted into high-order quantized result; Pretreatment unit, amplifying unit and converting unit electrically connect successively.Pretreatment unit comprises buffering amplifying unit and the correlated-double-sampling unit that is connected with the buffering amplifying unit.Amplifying unit comprises the operational amplifier of two different amplification.Converting unit comprises AD conversion unit, data processing unit and thick, the thin quantized result automatic switch unit that links to each other with data processing unit.Data processing unit plays simultaneously thick, thin quantized result is latched; Repeatedly gather in the cycle at each pixel, calculate respectively that repeatedly gathering of thick, the thin quantized value of this pixel added up and thick, thin quantized result automaticallyed switch after value carry out functions such as data splicing and normalization processing.
In order effectively to reduce the ccd image data biasing fluctuation that the Video processing link causes because of factors such as working temperature, component agings; The utility model is when said system provides; Also provide to be used for amending unit that high-order quantized result is setovered and revised, amending unit links to each other with converting unit.Amending unit can be that the existing any unit or circuit that can play the biasing debugging functions commonly used all is feasible.

Claims (5)

1. realize the analog-to-digital system of high-resolution to low resolution A C for one kind, it is characterized in that: said system comprises amplifying unit that the CCD analog signal that focal plane component FPA is produced carries out the pretreated pretreatment unit of back level, pretreated CCD analog video signal is amplified, the vision signal after will amplifying is carried out analog-to-digital conversion and the converting unit that the low level quantized result converted into high-order quantized result; Said pretreatment unit, amplifying unit and converting unit electrically connect successively.
2. according to claim 1ly realize the analog-to-digital system of high-resolution to low resolution A C, it is characterized in that: said system comprises also and is used for amending unit that high-order quantized result is setovered and revised that said amending unit links to each other with converting unit.
3. according to claim 1 and 2 to the analog-to-digital system of low resolution A C realization high-resolution, it is characterized in that: said pretreatment unit comprises buffering amplifying unit and the correlated-double-sampling unit that is connected with the buffering amplifying unit.
4. according to claim 3 to the analog-to-digital system of low resolution A C realization high-resolution, it is characterized in that: said amplifying unit is two operational amplifiers with different amplification.
5. according to claim 4 to the analog-to-digital system of low resolution A C realization high-resolution, it is characterized in that: said converting unit comprises AD conversion unit, data processing unit and thick, the thin quantized result automatic switch unit that links to each other with data processing unit.
CN201120190405U 2011-06-09 2011-06-09 System realizing high resolution analog-to-digital conversion by using low resolution ADC Expired - Fee Related CN202135116U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201120190405U CN202135116U (en) 2011-06-09 2011-06-09 System realizing high resolution analog-to-digital conversion by using low resolution ADC

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201120190405U CN202135116U (en) 2011-06-09 2011-06-09 System realizing high resolution analog-to-digital conversion by using low resolution ADC

Publications (1)

Publication Number Publication Date
CN202135116U true CN202135116U (en) 2012-02-01

Family

ID=45523872

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201120190405U Expired - Fee Related CN202135116U (en) 2011-06-09 2011-06-09 System realizing high resolution analog-to-digital conversion by using low resolution ADC

Country Status (1)

Country Link
CN (1) CN202135116U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102223491A (en) * 2011-06-09 2011-10-19 中国科学院西安光学精密机械研究所 Method and system for realizing high-resolution analog-to-digital conversion by low-resolution ADC (Analog to Digital Converter)
CN105509851A (en) * 2015-12-07 2016-04-20 李文艺 Measurement accuracy self-adjusting type electronic scale

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102223491A (en) * 2011-06-09 2011-10-19 中国科学院西安光学精密机械研究所 Method and system for realizing high-resolution analog-to-digital conversion by low-resolution ADC (Analog to Digital Converter)
CN105509851A (en) * 2015-12-07 2016-04-20 李文艺 Measurement accuracy self-adjusting type electronic scale
CN105509851B (en) * 2015-12-07 2018-05-22 李文艺 A kind of self-adjusting measurement accuracy electronic scale

Similar Documents

Publication Publication Date Title
CN101534376B (en) Image sensor apparatus and method for improved dynamic range with multiple readout circuit paths
EP1151601B1 (en) Cmos image sensor with pixel level gain control
CN1909378B (en) Analog-to-digital converter with noise compensation in cmos image sensor
CN201957001U (en) Pipeline analog-to-digital converter capable of carrying out background digital calibration
EP1684505A3 (en) Brightness level converting apparatus and method
CN204694347U (en) A kind of photoelectric detection circuit with low noise
CN104967793B (en) Power supply noise cancellation circuit suitable for CMOS image sensor
CN106772437B (en) Laser radar device capable of adaptively controlling dynamic range
CN202135116U (en) System realizing high resolution analog-to-digital conversion by using low resolution ADC
CN101557462A (en) Efficient wide-range and high-resolution black level and offset calibration system
CN102223491B (en) Method and system for realizing high-resolution analog-to-digital conversion by low-resolution ADC (Analog to Digital Converter)
CN101514922A (en) Linearity high dynamic range infrared reading circuit
CN109951655B (en) Method for realizing double conversion gain image sensor
CN110996095A (en) Multiplication CCD multiplication gain fitting measurement method
CN102595062A (en) Black light noise inhibition method of CMOS image sensor
KR20130115684A (en) Correlated double sampling circuit and image sensor including the same
CN107040733B (en) CMOS image sensor
CN108848327B (en) Silicon-based hybrid CMOS-APD image sensor system
CN104967794B (en) Power supply noise cancellation circuit suitable for CMOS image sensor
Rothman et al. HgCdTe APDs detector developments for high speed, low photon number and large dynamic range photo-detection
CN104660929A (en) Voltage integration type CMOS image sensor adopting voltage integration output
CN107238436A (en) Ultra-optical spectrum imaging system based on electron multiplication
CN202103676U (en) Dual-path backup type optical receiver
CN105554421A (en) Global pixel nonlinear compensation structure
CN202135261U (en) Processing system for picture signal of CCD camera

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120201

Termination date: 20140609