CN202094125U - High-voltage alternating current light-emitting diode (LED) chip module - Google Patents
High-voltage alternating current light-emitting diode (LED) chip module Download PDFInfo
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- CN202094125U CN202094125U CN2011201891024U CN201120189102U CN202094125U CN 202094125 U CN202094125 U CN 202094125U CN 2011201891024 U CN2011201891024 U CN 2011201891024U CN 201120189102 U CN201120189102 U CN 201120189102U CN 202094125 U CN202094125 U CN 202094125U
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- semiconductor layer
- led
- substrate
- voltage alternating
- wafer module
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Abstract
The utility model discloses a high-voltage alternating current light-emitting diode (LED) chip module, which comprises a substrate and a semiconductor layer formed on the front face of the substrate. The semiconductor layer comprises a buffer layer, an N-shaped semiconductor layer, a luminous layer and a P-shaped semiconductor layer which are all sequentially formed on the front face of the substrate. The high-voltage alternating current light-emitting diode (LED) chip module is characterized in that the semiconductor layer is provided with an isolation area and separated by the isolation area to form a plurality of LED crystal grains. The semiconductor layer with the LED crystal grains is in a shape of a reverse trapezoid. The included angle formed by the lateral face of the semiconductor layer and the front face of the substrate is from 50 degrees to 70 degrees. The LED crystal grains are connected with each other through conductive lines to form LED chip moulds connected in series or/and in parallel. The high-voltage alternating current light-emitting diode (LED) chip module has the advantages of low cost, easiness in mass production, high luminous efficiency, long service life and the like.
Description
[technical field]
The utility model relates to a kind of LED wafer module, relates in particular to a kind of high-voltage alternating LED wafer module.
[background technology]
As everyone knows, there are many drawbacks in the LED product by DC driven.They need use in the lump with rectifier, and its life-span has only 20,000 hours, but the life-span of the LED product of dc powered reached 5-10 ten thousand hours.Therefore, the LED product " throughout one's life " of DC driven just needs repeatedly to change rectifier, if be applied to must bring inconvenience on the priming illumination device.In contrast, AC LED be a class integrated the LED product of various treatment technologies, it comprises multiple device or kernel, need not extra transformer, rectifier or drive circuit, the alternating current of AC network just can directly drive it.This makes AC LED product need not rectifier just can directly apply to household and office's ac electric apparatus plug (100-110 volt/220-230 volt), not only reduces the LED product cost, has also avoided the loss of electric energy in the power conversion process.AC LED is the two-way admittance pattern, thereby has avoided electrostatic discharge problem.AC LED can mate the High Level AC Voltage of 110V to 220V, and therefore, AC LED can be applied to general lighting, billboard, street lamp and household electrical appliance.
The South Korea Seoul semiconductor is taken to research and development and the popularization of AC LED very early.In recent years, numerous Taiwan manufacturer also dropped into lot of manpower and material resources in this field, for the research and development of AC LED with promote and fuel the fire.Be to realize differentiation, Taiwan company is developing a kind of high-voltage LED, and it is structurally similar with AC LED, but integrated rectifier.This product adopts single chip design may, can reduce drive current and luminescence chip can be distributed widely to obtain higher luminous efficiency by configuration.Single chip architecture has also improved 10% to electro-optical efficiency, in addition, has also reduced required line binding, has simplified encapsulation, has reduced whole cost.In addition, in order to satisfy the demands, high-voltage alternating LED can the custom chip size and or number of cores, and its manufacturing process in enormous quantities also with the LED compatibility of standard DC driven.
Insulating properties between the device kernel generally requires the isolated area between the device kernel that semiconductor layer is kept apart fully, isolated area must be deep to the substrate place, but because the semiconductor layer on the substrate is generally all about 5um, make the isolated area between the device kernel make relatively difficulty, manufacture craft mainly is to use dry etching at present, but this method cost is too high, selectivity to photoresist requires also very high, unsuitable mass production, also exist simultaneously useful life short, the technical barrier that light extraction efficiency is lower.
[utility model content]
The technical problems to be solved in the utility model provides a kind of high-voltage alternating LED wafer module, and this LED wafer module has the characteristics of light extraction efficiency height and long service life.
In order to solve the problems of the technologies described above, the technical solution adopted in the utility model is: a kind of high-voltage alternating LED wafer module, comprise substrate, be formed at the semiconductor layer of substrate face, described semiconductor layer comprises the resilient coating that is formed at substrate face successively, n type semiconductor layer, luminescent layer and p type semiconductor layer, it is characterized in that, described semiconductor layer is formed with isolated area, described semiconductor layer is separated by isolated area and forms plurality of LEDs crystal grain, the semiconductor layer of described LED crystal grain is the inverted trapezoidal shape, the angle that the side of semiconductor layer and the front of substrate form is 50 °～70 °, and the LED intergranule is connected to form series connection or/and LED wafer module in parallel by the conducting wire.
The utility model beneficial effect compared with prior art is: because the utility model is separated by X-axis isolated area and Y-axis isolated area at semiconductor layer and forms plurality of LEDs crystal grain, the LED intergranule is connected to form series connection or/and LED wafer module in parallel by the conducting wire, wherein the semiconductor layer of LED crystal grain becomes the inverted trapezoidal shape, the lateral emitting area that can increase semiconductor layer is set like this, the light that send the semiconductor layer side also can reflect away light by substrate face, can reduce optical loss like this and avoid light that total reflection takes place in semiconductor layer, improve the light extraction efficiency of LED wafer; Simultaneously, also avoid luminous energy to be converted into heat energy, improved the useful life of LED wafer module greatly, and relative conventional dry etching manufacture craft, cost reduces greatly, is suitable for mass production.
Preferably, the angle that the side of described semiconductor layer and the front of substrate form is 55 °～65 °, this structure is the preferred angle scope that light is derived in the LED wafer module, and this angular range can improve the light extraction efficiency of LED wafer module greatly, prolongs the useful life of LED wafer simultaneously.
Preferably, the angle that the side of described semiconductor layer and the front of substrate form is 60 °, this structure is the best angle that light is derived in the LED wafer module, and this angle can improve the light extraction efficiency of LED wafer module greatly, prolongs the useful life of LED wafer simultaneously.
[description of drawings]
Below in conjunction with accompanying drawing the utility model is described in further detail.
Fig. 1 is the perspective view of the utility model LED wafer module.
Fig. 2 is the conducting wire syndeton schematic diagram of the utility model LED wafer module.
Fig. 3 is another conducting wire syndeton schematic diagram of the utility model LED wafer module.
Fig. 4 is the utility model forms semiconductor layer on substrate a structural representation.
Fig. 5 is the schematic diagram that forms protective layer and process pattern exposure process on semiconductor layer shown in Figure 4.
Fig. 6 for Fig. 5 by the structural representation behind the etching protective layer.
Fig. 7 is the structural representation behind the immersion acidic mixed solution shown in Figure 6.
Fig. 8 is the structural representation behind the removal protective layer shown in Figure 7.
Fig. 9 is a structural representation of making the spill table top on semiconductor layer shown in Figure 8.
Figure 10 is the structural representation that forms insulating barrier and electrode in semiconductor layer surface shown in Figure 9.
Figure 11 is a conducting wire shown in Figure 10 syndeton schematic diagram.
Figure 12 is the partial structurtes enlarged diagram of the utility model epitaxial wafer.
The drawing reference numeral explanation:
The 1-substrate; The 2-resilient coating; The 3-N type semiconductor layer;
The 4-luminescent layer; The 5-P type semiconductor layer; 6-spill table top;
7-X axle isolated area; 8-Y axle isolated area; The 9-semiconductor layer;
The 10-LED wafer module; The 11-epitaxial wafer; The 12-reflector;
The 13-protective layer; 14-photoresist figure; The 15-insulating barrier;
The 16-P electrode; The 17-N electrode; 16 '-P electrode installing zone;
17 '-N electrode installing zone; The 18-conducting wire; 20-LED crystal grain.
[embodiment]
With reference to accompanying drawing 1, Fig. 2, Fig. 3 is described, the utility model provides a kind of high-voltage alternating LED wafer module 10, comprise substrate 1, be formed at the semiconductor layer 9 in substrate 1 front, described semiconductor layer 9 comprises the resilient coating 2 that is formed at substrate 1 front successively, n type semiconductor layer 3, luminescent layer 4 and p type semiconductor layer 5, described semiconductor layer 9 is formed with isolated area, described isolated area comprises X-axis isolated area 7 and Y-axis isolated area 8, described semiconductor layer 9 is separated by X-axis isolated area 7 and Y-axis isolated area 8 and forms plurality of LEDs crystal grain 20, be connected to form series connection or/and LED wafer module 10 in parallel by conducting wire 18 between the LED crystal grain 20, the semiconductor layer 9 of described LED crystal grain 20 is the inverted trapezoidal shape, and the angle β that the front of the side of inverted trapezoidal semiconductor layer 9 and substrate 1 forms is 50 °～70 °; Optimized angle, the angle β that the front of the side of inverted trapezoidal semiconductor layer 9 and substrate 1 forms is 55 °～65 °, this structure is the preferred angle scope that light is derived in LED wafer module 10, this angular range can improve the light extraction efficiency of LED wafer module 10, prolongs the useful life of LED wafer simultaneously.Best angle, the angle β that the front of the side of inverted trapezoidal semiconductor layer 9 and substrate 1 forms is 60 °, this structure is the best leaded light angle of light in LED wafer module 10, and this angle can improve the light extraction efficiency of LED wafer module 10 greatly, has also prolonged the useful life of LED wafer simultaneously.Bottom and side at described substrate 1 are formed with reflector 12, and described reflector 12 is the oxide reflector or/and metallic reflector, and described oxide is SiO
2Or/and TiO
2, also can be Ti
3O
5Or Nb
2O
5, described metal is any among Au, Al, Ag, Pt, Cr, Mo, the W, also can be the combination between described metal A u, Al, Ag, Pt, Cr, Mo, W both or the many persons.
1-is shown in Figure 12 with reference to accompanying drawing, the utility model manufacture method is as follows, at first, on substrate 1, grow semiconductor layer 9 by metal organic chemical vapor deposition or molecular beam epitaxy technique and form epitaxial wafer 11, described semiconductor layer 9 is resilient coating 2, n type semiconductor layer 3, luminescent layer 4 and the p type semiconductor layer 5 of growing on substrate 1 successively, with reference to shown in 4; Next at the surface deposition protective layer 13 of epitaxial wafer 11, the material of described protective layer 13 is SiO
2Perhaps Si
3N
4Purpose at epitaxial wafer 11 surface deposition protective layers 13 is in order to protect semiconductor layer 9, acidic mixed solution is to the corrosion of semiconductor layer 9 when preventing follow-up immersion acidic mixed solution, pass through graph exposure semiconductor planar technology on protective layer 13 surfaces, form photoresist figure 14 on protective layer 13 surfaces, as shown in Figure 5, adopt dry method or wet-etching technology etching protective layer 13, make protective layer 13 form X-axis isolated area 7 and Y-axis isolated area 8, as shown in Figure 6; Next remove photoresist, epitaxial wafer 11 is immersed in the acidic mixed solution, acidic mixed solution along X-axis isolated area 7 and Y-axis isolated area 8 respectively on the vertical and horizontal both direction etching semiconductor layer 9 until substrate 1, described semiconductor layer 9 becomes plurality of LEDs crystal grain 20 by X-axis isolated area 7 and Y-axis isolated area every 8 open forms, wherein, described acidic mixed solution is H
2SO
4And H
3PO
4Mixture, described H
2SO
4With H
3PO
4Volume ratio when same concentration is 2～5: 1, and the temperature of described mixture is 200～300 ℃ during immersion, and soak time is 5～30 minutes; Make 9 one-tenth inverted trapezoidal shapes of semiconductor layer of every LEDs crystal grain 20 after the immersion, the angle that the side of inverted trapezoidal semiconductor layer 9 and the front of substrate form is 50 °～70 °, as Fig. 7, shown in Figure 8; Optimized angle, the angle β that the front of the side of inverted trapezoidal semiconductor layer 9 and substrate 1 forms is 55 °～65 °, this structure is the preferred angle scope that light is derived in LED wafer module 10, this angular range can improve the light extraction efficiency of LED wafer module 10, prolongs the useful life of LED wafer simultaneously; Best angle, the angle β that the front of the side of inverted trapezoidal semiconductor layer 9 and substrate 1 forms is 60 °, this structure is the best angle that light is derived in LED wafer module 10, and this angle can improve the light extraction efficiency of LED wafer module 10 greatly, prolongs the useful life of LED wafer simultaneously greatly; Next utilize the inductive couple plasma etching, form spill table top 6, make the part N type semiconductor of the semiconductor layer 9 of every LEDs crystal grain 20 expose spill table top 6 for 3 layers, as shown in Figure 9 on the surface of every LEDs crystal grain 20; Next at the insulating barrier 15 of epitaxial wafer 11 surface deposition one deck densifications, described insulating barrier 15 is distributed in semiconductor layer 9, X-axis isolated area 7 and Y-axis isolated area every 8 surfaces, wherein, triangular in shape in X-axis isolated area 7 and Y-axis isolated area every 8 insulating barrier 15 cross sections that form, as shown in figure 10, the material of described insulating barrier 15 is SiO
2Perhaps Si
3N
4Next etching isolation layer 15, insulating barrier 15 form P electrode installing zones 16 ' and N electrode installing zone 17 ', at described P electrode installing zone 16 ' making P electrode 16, at N electrode installing zone 17 ' making N electrode 17, as shown in figure 10, make conducting wire 18, the electrode of LED crystal grain 20 is electrically connected by conducting wire 18 with the electrode of another LED crystal grain 20, be connected to form LED wafer module 10 by conducting wire 18 between the plurality of LEDs crystal grain 20; Method one: by graph exposure semiconductor planar technology, on photoresist, obtain designed P electrode installing zone 16 ' and N electrode installing zone 17 '; Etching isolation layer 15, with P electrode installing zone 16 designed on the photoresist ' and N electrode installing zone 17 ' figure transfer to insulating barrier 15, make P electrode installing zone 16 ' and N electrode installing zone 17 ' semiconductor layer 9 expose, utilize electron beam evaporation platform or sputter coating machine deposition Cr/Pt/Au or Ti/Al/Au, pass through photoresist stripping process, on the kernel unit that etching is crossed, on the spill table top 6 of p type semiconductor layer 5 and n type semiconductor layer 3, make P electrode 16 and N electrode 17 respectively, by graph exposure semiconductor planar technology, on photoresist, obtain the 18 bonding wire zones, conducting wire designed, utilize electron beam evaporation platform or sputter coating machine deposition Cr/Pt/Au or Ti/Al/Au, pass through photoresist stripping process, at P electrode installing zone 16 ' make conducting wire 18 with N electrode installing zone 17 ' zone, finish designed high-voltage LED and AC LED connecting circuit figure, with reference to Fig. 2,3, shown in 11; Method two: P electrode 16, N electrode 17 and conducting wire 18 make, by graph exposure semiconductor planar technology, on photoresist, obtain designed P electrode installing zone 16 ' with N electrode installing zone 17 '; Etching isolation layer 15, with P electrode 16 designed on the photoresist and N electrode 17 figure transfer to insulating barrier 15, make P electrode installing zone 16 ' with N electrode installing zone 17 ' semiconductor layer 9 expose, by graph exposure semiconductor planar technology, on photoresist, obtain the P electrode installing zone 16 of described design ' with N electrode installing zone 17 ' and 18 bonding wire zones, conducting wire, utilize electron beam evaporation platform or sputter coating machine deposition Cr/Pt/Au or Ti/Al/Au, pass through photoresist stripping process, in P electrode 16 and N electrode 17 and making conducting wire 18, conducting wire 18 bonding wires zone, obtain designed high-voltage LED and AC LED connecting circuit figure, with reference to Fig. 2,3, shown in 11; Be about to a plurality of LED crystal grain 20 like this and form a LED wafer module 10 by conducting wire 18 ways of connecting; Next epitaxial wafer 11 is cut again, grinding, finishing polish, form the reflector at the back side of epitaxial wafer evaporation; Described reflector 12 is the oxide reflector or/and metallic reflector, and described oxide is SiO
2, TiO
2, Ti
3O
5, Nb
2O
5In any, described metal is any among Au, Al, Ag, Pt, Cr, Mo, the W; Effect in evaporation reflector, the back side of epitaxial wafer mainly is the light extraction efficiency that is used to provide LED wafer module 10; Adopt the sliver machine to carry out sliver at last by every LED wafer module 10.
Because this method is to adopt the protective layer of photoresist etching epitaxial wafer, make protective layer form X-axis isolated area 7 and Y-axis isolated area 8, epitaxial wafer 11 is immersed in the acidic mixed solution, make X-axis isolated area 7 and Y-axis isolated area 8 separate semiconductor layer 9 after epitaxial wafer 11 soaks acidic mixed solution, form plurality of LEDs crystal grain 20 on the substrate 1 of epitaxial wafer 11; Make LED wafer module 10 with this method and have the advantages that cost is low, be easy to volume production; Simultaneously, be connected to form LED wafer module 10 by circuit reasonable in design between the LED crystal grain 20, wherein the semiconductor layer 9 of LED crystal grain 20 forms the inverted trapezoidal shape, the lateral emitting area that can increase semiconductor layer 9 is set like this, the light that send semiconductor layer 9 sides also can reflect away light by substrate 1 front, can reduce optical loss like this and avoid light that total reflection takes place in semiconductor layer 9, improve the light extraction efficiency of LED wafer module; Avoid luminous energy to be converted into heat energy simultaneously, improved the useful life of LED wafer module 10 greatly.
The above is all so that the utility model conveniently to be described, in the spiritual category that does not break away from the utility model creation, the various simple covert and modification that those skilled in the art did of being familiar with this technology still belongs to protection range of the present utility model.
Claims (3)
1. high-voltage alternating LED wafer module, comprise substrate, be formed at the semiconductor layer of substrate face, described semiconductor layer comprises the resilient coating that is formed at substrate face successively, n type semiconductor layer, luminescent layer and p type semiconductor layer, it is characterized in that: described semiconductor layer is formed with isolated area, described semiconductor layer is separated by isolated area and forms plurality of LEDs crystal grain, the semiconductor layer of described LED crystal grain is the inverted trapezoidal shape, the angle that the side of semiconductor layer and the front of substrate form is 50 °～70 °, and the LED intergranule is connected to form series connection or/and LED wafer module in parallel by the conducting wire.
2. according to the described high-voltage alternating LED of claim 1 wafer module, it is characterized in that: the angle that the side of described semiconductor layer and the front of substrate form is 55 °～65 °.
3. according to the described high-voltage alternating LED of claim 2 wafer module, it is characterized in that: the angle that the side of described semiconductor layer and the front of substrate form is 60 °.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011201891024U CN202094125U (en) | 2011-06-03 | 2011-06-03 | High-voltage alternating current light-emitting diode (LED) chip module |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011201891024U CN202094125U (en) | 2011-06-03 | 2011-06-03 | High-voltage alternating current light-emitting diode (LED) chip module |
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| CN202094125U true CN202094125U (en) | 2011-12-28 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103579433A (en) * | 2012-07-30 | 2014-02-12 | 隆达电子股份有限公司 | Light emitting diode with undercut structure and method of fabricating the same |
| KR20140097991A (en) * | 2013-01-30 | 2014-08-07 | 니치아 카가쿠 고교 가부시키가이샤 | Semiconductor light-emitting device |
| WO2016131690A1 (en) * | 2015-02-19 | 2016-08-25 | Osram Opto Semiconductors Gmbh | Method for producing a semiconductor body |
| CN107689407A (en) * | 2017-08-21 | 2018-02-13 | 厦门乾照光电股份有限公司 | A kind of LED chip and preparation method thereof |
| US10468555B2 (en) | 2015-02-19 | 2019-11-05 | Osram Opto Semiconductors Gmbh | Method for producing a semiconductor body |
| CN110491976A (en) * | 2019-08-22 | 2019-11-22 | 佛山市国星半导体技术有限公司 | A kind of flip LED chips of resistant to hydrolysis and preparation method thereof |
-
2011
- 2011-06-03 CN CN2011201891024U patent/CN202094125U/en not_active Expired - Fee Related
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103579433A (en) * | 2012-07-30 | 2014-02-12 | 隆达电子股份有限公司 | Light emitting diode with undercut structure and method of fabricating the same |
| KR20140097991A (en) * | 2013-01-30 | 2014-08-07 | 니치아 카가쿠 고교 가부시키가이샤 | Semiconductor light-emitting device |
| EP2763175A3 (en) * | 2013-01-30 | 2016-05-25 | Nichia Corporation | Semiconductor light emitting element |
| KR102040686B1 (en) | 2013-01-30 | 2019-11-05 | 니치아 카가쿠 고교 가부시키가이샤 | Semiconductor light-emitting device |
| WO2016131690A1 (en) * | 2015-02-19 | 2016-08-25 | Osram Opto Semiconductors Gmbh | Method for producing a semiconductor body |
| CN107251238A (en) * | 2015-02-19 | 2017-10-13 | 欧司朗光电半导体有限公司 | Method for manufacturing semiconductor body |
| US10424509B2 (en) | 2015-02-19 | 2019-09-24 | Osram Opto Semiconductors Gmbh | Method for producing a semiconductor body |
| US10468555B2 (en) | 2015-02-19 | 2019-11-05 | Osram Opto Semiconductors Gmbh | Method for producing a semiconductor body |
| CN107689407A (en) * | 2017-08-21 | 2018-02-13 | 厦门乾照光电股份有限公司 | A kind of LED chip and preparation method thereof |
| CN107689407B (en) * | 2017-08-21 | 2019-09-06 | 厦门乾照光电股份有限公司 | A kind of LED chip and preparation method thereof |
| CN110491976A (en) * | 2019-08-22 | 2019-11-22 | 佛山市国星半导体技术有限公司 | A kind of flip LED chips of resistant to hydrolysis and preparation method thereof |
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Legal Events
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20111228 Termination date: 20190603 |
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| CF01 | Termination of patent right due to non-payment of annual fee |