CN202034369U - 一种防止led芯片损坏的封装结构 - Google Patents

一种防止led芯片损坏的封装结构 Download PDF

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CN202034369U
CN202034369U CN2011200773707U CN201120077370U CN202034369U CN 202034369 U CN202034369 U CN 202034369U CN 2011200773707 U CN2011200773707 U CN 2011200773707U CN 201120077370 U CN201120077370 U CN 201120077370U CN 202034369 U CN202034369 U CN 202034369U
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led
current
current limiting
limiting resistance
chip
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CN2011200773707U
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吴铭
林明
李益民
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Shenzhen Guoyexing Optoelectronics Technology Co., Ltd.
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GUOYE-XINGGUANG ELECTRONICS Co Ltd SHENZHEN
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item

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Abstract

本实用新型公开了一种防止LED芯片损坏的封装结构,包括支架和封装在支架上的环氧树脂灯帽,所述支架上设置有阳极和阴极,所述阴极上设置有一反射杯,该反射杯中固定有LED芯片,所述阳极上焊接有第一限流电阻、第二限流电阻,所述第一限流电阻、第二限流电阻通过第一金线与LED芯片连接。本实用新型通过将两个互相并联的限流电阻芯片封装于LED环氧树脂中,使LED灯具有限流作用,两个限流电阻其中一个损坏不会对LED灯造成影响,与现有技术相比,本实用新型不但可以很好的保护LED灯不受大电流的损坏,而且还可以降低LED灯带的使用成本。

Description

一种防止LED芯片损坏的封装结构
技术领域
本实用新型涉及LED封装技术,特别是一种防止LED芯片损坏的封装结构。 
背景技术
LED是利用半导体材料中的电子和空穴相互结合并释放出能量,使得能量带位阶改变,以发光显示其所释放出的能量的器件。由于其具有体积小、寿命长、驱动电压低、耗电量低、反应速率快、耐震性佳等优点,被广泛应用于信号指示、数码显示等领域。 
LED耗电非常低,一般来说LED的工作电压是2-3.6V,当使用LED做指示灯时,如果电源电压过高,则可能将LED烧坏,为了避免这种情况的发生,现在一般会在LED上串联一个限流电阻,以达到保护LED的目的,这种方式虽然能很好的保护LED不被损坏,但是对于不同数目的LED灯带需要使用不同的电阻与之对应,不仅会增加成本,而且需要更换电阻,整个过程非常繁琐。 
发明内容
为此,本实用新型的目的在于提供一种防止LED芯片损坏的封装结构,该结构通过将在LED灯内部一电极上焊接两个互相并联的限流电阻,避免了LED灯在使用时,电源过高而造成的损坏问题。 
为实现上述目的,本实用新型主要采用以下技术方案: 
一种防止LED芯片损坏的封装结构,包括支架和封装在支架上的环氧树脂灯帽(1),所述支架上设置有阳极(5)和阴极(6),所述阴极(6)上设置有一反射杯(7),该反射杯(7)中固定有LED芯片(9),所述阳极(5)上焊接有第一限流电阻(3)、第二限流电阻(4),所述第一限流电阻(3)、第二限流 电阻(4)通过第一金线(2)与LED芯片(9)连接。 
其中所述LED芯片(9)通过第二金线(8)与阴极(6)连接。 
其中所述第一限流电阻(3)、第二限流电阻(4)并联在一起。 
其中所述反射杯(7)、第一限流电阻(3)和第二限流电阻(4)位于环氧树脂灯帽(1)中。 
本实用新型通过将两个互相并联的限流电阻芯片封装于LED环氧树脂中,使LED灯具有限流作用,两个限流电阻其中一个损坏不会对LED灯造成影响,与现有技术相比,本实用新型不但可以很好的保护LED灯不受大电流的损坏,而且还可以降低LED灯带的使用成本。 
附图说明
图1为本实用新型的结构示意图。 
图中标识说明:环氧树脂灯帽1、第一金线2、第一限流电阻3、第二限流电阻4、阳极5、阴极6、反射杯7、第二金线8、LED芯片9。 
具体实施方式
为阐述本实用新型的思想及目的,下面将结合附图和具体实施例对本实用新型做进一步的说明。 
请参见图1所示,图1为本实用新型的结构示意图。本实用新型提供的是一种防止LED芯片损坏的封装结构,该封装结构主要将两个互相并联的限流电阻焊接在LED灯内部电极上,然后通过环氧树脂灯帽将其与LED芯片封装在一起,从而通过电阻的限流作用,对进入到LED芯片的大电流做限流处理,达到保护LED芯片不受损坏的目的。 
其中该LED封装结构包括支架和封装在支架上的环氧树脂灯帽1,所述支架上设置有阳极5和阴极6,所述阴极6上设置有一反射杯7,该反射杯7中固定有LED芯片9,所述阳极5上焊接有第一限流电阻3、第二限流电阻4,所述第一限流电阻3、第二限流电阻4通过第一金线2与LED芯片9连接;所述LED芯片9通过第二金线8与阴极6连接。 
其中所述第一限流电阻3、第二限流电阻4并联在一起。 
其中所述反射杯7、第一限流电阻3和第二限流电阻4位于环氧树脂灯帽1中。 
本实用新型中第一限流电阻3、第二限流电阻4并联在一起,主要是为了防止其中一个限流电阻发生损坏时,造成整个LED芯片无法点亮,而通过两个限流电阻,则可以避免出现这种情况,当其中一个损坏时,整个电路还可以通过另外一个并联的电阻连接,从而极大的提高了LED的使用寿命。 
以上对本实用新型的所述一种防止LED芯片损坏的封装结构进行了详细介绍,本文中应用了具体个例对本实用新型的原理及实施方式进行了阐述,以上的说明只是用于帮助理解本实用新型的核心思想;同时,对于本领域的一般技术人员,依据本实用新型的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本实用新型的限制。 

Claims (4)

1.一种防止LED芯片损坏的封装结构,其特征在于包括支架和封装在支架上的环氧树脂灯帽(1),所述支架上设置有阳极(5)和阴极(6),所述阴极(6)上设置有一反射杯(7),该反射杯(7)中固定有LED芯片(9),所述阳极(5)上焊接有第一限流电阻(3)、第二限流电阻(4),所述第一限流电阻(3)、第二限流电阻(4)通过第一金线(2)与LED芯片(9)连接。
2.根据权利要求1所述的防止LED芯片损坏的封装结构,其特征在于所述LED芯片(9)通过第二金线(8)与阴极(6)连接。
3.根据权利要求1所述的防止LED芯片损坏的封装结构,其特征在于所述第一限流电阻(3)、第二限流电阻(4)并联在一起。
4.根据权利要求1所述的防止LED芯片损坏的封装结构,其特征在于所述反射杯(7)、第一限流电阻(3)和第二限流电阻(4)位于环氧树脂灯帽(1)中。
CN2011200773707U 2011-03-22 2011-03-22 一种防止led芯片损坏的封装结构 Expired - Lifetime CN202034369U (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105590931A (zh) * 2016-01-27 2016-05-18 长兴科迪光电股份有限公司 一种带有齐纳管的食人鱼led

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105590931A (zh) * 2016-01-27 2016-05-18 长兴科迪光电股份有限公司 一种带有齐纳管的食人鱼led

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Inventor after: Wu Ming

Inventor after: Kang Qi

Inventor after: Li Yimin

Inventor before: Wu Ming

Inventor before: Lin Ming

Inventor before: Li Yimin

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Address after: 518000, Shenzhen, Guangdong, Fuyong Baoan District street, Chongqing Road No. 128, the Han Dynasty Laser Industry Park 6, 4 floor, 5 floor

Patentee after: Shenzhen Guoyexing Optoelectronics Technology Co., Ltd.

Address before: 518000, Shenzhen, Guangdong, Fuyong Baoan District street, Chongqing Road No. 128, the Han Dynasty Laser Industry Park 6, 4 floor, 5 floor

Patentee before: Guoye-Xingguang Electronics Co., Ltd., Shenzhen

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Granted publication date: 20111109