CN202034369U - 一种防止led芯片损坏的封装结构 - Google Patents
一种防止led芯片损坏的封装结构 Download PDFInfo
- Publication number
- CN202034369U CN202034369U CN2011200773707U CN201120077370U CN202034369U CN 202034369 U CN202034369 U CN 202034369U CN 2011200773707 U CN2011200773707 U CN 2011200773707U CN 201120077370 U CN201120077370 U CN 201120077370U CN 202034369 U CN202034369 U CN 202034369U
- Authority
- CN
- China
- Prior art keywords
- led
- current
- current limiting
- limiting resistance
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- Led Device Packages (AREA)
Abstract
Description
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011200773707U CN202034369U (zh) | 2011-03-22 | 2011-03-22 | 一种防止led芯片损坏的封装结构 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011200773707U CN202034369U (zh) | 2011-03-22 | 2011-03-22 | 一种防止led芯片损坏的封装结构 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN202034369U true CN202034369U (zh) | 2011-11-09 |
Family
ID=44896657
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2011200773707U Expired - Lifetime CN202034369U (zh) | 2011-03-22 | 2011-03-22 | 一种防止led芯片损坏的封装结构 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN202034369U (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105590931A (zh) * | 2016-01-27 | 2016-05-18 | 长兴科迪光电股份有限公司 | 一种带有齐纳管的食人鱼led |
-
2011
- 2011-03-22 CN CN2011200773707U patent/CN202034369U/zh not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105590931A (zh) * | 2016-01-27 | 2016-05-18 | 长兴科迪光电股份有限公司 | 一种带有齐纳管的食人鱼led |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C53 | Correction of patent of invention or patent application | ||
CB03 | Change of inventor or designer information |
Inventor after: Wu Ming Inventor after: Kang Qi Inventor after: Li Yimin Inventor before: Wu Ming Inventor before: Lin Ming Inventor before: Li Yimin |
|
COR | Change of bibliographic data |
Free format text: CORRECT: INVENTOR; FROM: WU MING LIN MING LI YIMIN TO: WU MING KANG QI LI YIMIN |
|
C56 | Change in the name or address of the patentee | ||
CP01 | Change in the name or title of a patent holder |
Address after: 518000, Shenzhen, Guangdong, Fuyong Baoan District street, Chongqing Road No. 128, the Han Dynasty Laser Industry Park 6, 4 floor, 5 floor Patentee after: Shenzhen Guoyexing Optoelectronics Technology Co., Ltd. Address before: 518000, Shenzhen, Guangdong, Fuyong Baoan District street, Chongqing Road No. 128, the Han Dynasty Laser Industry Park 6, 4 floor, 5 floor Patentee before: Guoye-Xingguang Electronics Co., Ltd., Shenzhen |
|
CX01 | Expiry of patent term | ||
CX01 | Expiry of patent term |
Granted publication date: 20111109 |