CN201935954U

CN201935954U - Overcurrent detection circuit

Info

Publication number: CN201935954U
Application number: CN2010206065882U
Authority: CN
Inventors: 王钊
Original assignee: Wuxi Vimicro Corp
Current assignee: Wuxi Vimicro Corp
Priority date: 2010-11-15
Filing date: 2010-11-15
Publication date: 2011-08-17
Anticipated expiration: 2020-11-15

Abstract

The utility model provides an overcurrent detection circuit which comprises a first input voltage circuit, a second input voltage circuit and a comparator. The first input voltage circuit and the second input voltage circuit respectively provide a first input voltage and a second input voltage to the first input end and the second input end of the comparator; and the comparator is a comparator with input deviations, which compares the first input voltage with the second input voltage to output a comparison result signal.

Description

Overcurrent sensing circuit

[technical field]

The utility model relates to electronic circuit field, particularly about the discharge over-current detection circuit in a kind of battery protecting circuit.

[background technology]

Fig. 1 is a kind of structural drawing of lithium battery, and lithium battery is made up of battery protecting circuit and electric core, and battery protecting circuit comprises battery protection chip and power device metal-oxide-semiconductor MD and MC, is the battery protection chip in the frame of broken lines.The battery protection chip comprises the testing circuit that overcharges, overcurrent sensing circuit, charging over-current detection circuit, discharge over-current detection circuit, control circuit.When abnormality not occurring behind the lithium battery connection load RL, MC and MD are in conducting state, and lithium battery is to load RL discharge, and there is conducting resistance in discharge current when MC and MD conducting shown in the figure arrow, so discharge current can form voltage drop on MC and MD.Discharge current is big more, and the voltage drop on MC and the MD is big more, and promptly node VM must be many more than the voltage height of node G.The current circuit that discharged detects the overcurrent condition that discharges whether occurs by the voltage that detects the relative G of VM.When detecting discharge current when excessive, control circuit cuts out MD and forbids discharge.

As shown in Figure 2, it shows the structural drawing of the overcurrent sensing circuit in the lithium battery structure shown in Figure 1.Wherein the point of the G among Fig. 2 is connected to the negative pole of electric core, and VM is connected to the negative pole of charger or load, i.e. the output negative pole of battery.V is connected to the Anode and battery output cathode of electric core.Connecting MOS switch MC and MD in the earlier figures 1 between VM and the G end, when discharge current was big more, upward voltage drop was big more at MOS switch (equivalence is a resistance during conducting).When the voltage difference of VM and G end reached certain discharge overcurrent protection threshold value, battery protecting circuit was judged as the discharge overcurrent protection.Wherein Fig. 3 is the detailed structure view of the comparator C om1 in the circuit shown in Figure 2, and in Fig. 2, electric current I 1 and I2 are based on V _BeThe electric current of/Rb.The anode input voltage of comparator C om1 is V2=VM+|V _GSP2|-V _Be2, comparator C om1 negative terminal input voltage V1=0+V _GSP1+ V _Be* R1/Rb-V _Be1, wherein VM is the voltage of VM node, V _GSP2Be the gate source voltage of MP2, V _GSP1Be the gate source voltage of MP1, V _Be1Be the base-emitter voltage of NPN1, V _Be2Base-emitter voltage for NPN2.Generally allow I1 equal I2 in the design, width and the length of MP1 and MP2 all equates, and allows MP1 and MP2 coupling when layout design as far as possible, satisfies V so as far as possible _GSP1=V _GSP2So comparer upset when the voltage V1=V2 of two input ends of comparer is VM=V during the comparer upset _Be* R1/Rb+ Δ V _Be, Δ V wherein _Be=V _Be2-V _Be1, the V of NPN2 in the design _Be2Be negative temperature coefficient, Δ V _BeBe positive temperature coefficient (PTC), regulate the VM turn threshold that R1/Rb can obtain temperature compensation by design, this threshold value is the excess current discharge threshold.But some transistorized mismatches have been ignored in above-mentioned derivation, and the right mismatch of some important transistors can reduce excess current discharge threshold precision in the reality, make the difference of chip chamber become big.Important transistor mismatch is to comprising: MP1 among Fig. 2 and MP2, and NPN1 among Fig. 2 and NPN2, there are the possibility of 3 grades of mismatches so as can be seen at least in MP21 among Fig. 3 and MP22.Transistorized mismatch is meant and there are differences between the transistor in the actual chips in large-scale production.This difference generally is stochastic distribution within the specific limits in a large amount of chips.Multistage more mismatch causes the precision of excess current discharge threshold poor more.The purpose of this utility model is to reduce mismatch progression.

[utility model content]

The purpose of this utility model is to provide a kind of overcurrent sensing circuit that reduces mismatch progression.

For reaching aforementioned purpose, a kind of overcurrent sensing circuit of the utility model, it comprises:

Comparer, it comprises first input end and second input end and output terminal

The first input voltage circuit, it comprises first current source and the first transistor of connecting with first current source, first current source provides first input voltage with the first input end that the tie point of the first transistor is connected to comparer with the first input end of comparer;

The second input voltage circuit, it comprises second current source and the transistor seconds of connecting with second current source, second current source provides second input voltage with the tie point of transistor seconds with second input end that second input end of comparer is connected to comparer;

Described comparer compares the input voltage output compare result signal of the first input end and second input end, and wherein said comparer is the comparer with input deviation.

Further, described comparer comprises first difference input triode and second difference input triode, the base stage of described first difference input triode is as the first input end of described comparer, the base stage of described second difference input triode is as second input end of described comparer, and the emitter-base bandgap grading of described first difference input triode is connected in a current source jointly through the emitter-base bandgap grading of resistance and second difference input triode.

Further, the base-emitter voltage of described second difference input triode is greater than the base-emitter voltage of first difference input triode.

Further, the collector of described first difference input triode is connected in first current branch, the collector of second difference input triode is connected in second current branch, described first current branch and second current branch constitute current mirror, and the output terminal of second current branch is the output terminal of device as a comparison.

Further, described first current branch and second current branch constitute the cascade current mirror.

Comparer, it comprises first input end and second input end and output terminal;

The first input voltage circuit, it comprises first current source, resistance and the first transistor of order series connection, first current source provides first input voltage with the first input end that the tie point of resistance is connected to comparer with the first input end of comparer;

Overcurrent sensing circuit of the present utility model becomes the comparer that the utlity model has input deviation with respect to existing circuit with prior comparators, can reduce the mismatch progression of comparer under the situation that guarantees excess current threshold values same as the prior art.

[description of drawings]

Fig. 1 is the structural representation of the holding circuit of existing lithium battery.

Fig. 2 is the structural drawing of the overcurrent sensing circuit in the battery structure shown in Figure 1.

Fig. 3 is the structural drawing of the comparer in the overcurrent sensing circuit shown in Figure 2.

Fig. 4 is the structural drawing of the utility model overcurrent sensing circuit.

Fig. 5 is the structural drawing of comparer in the utility model overcurrent sensing circuit shown in Figure 4.

Fig. 6 is the structural drawing of another embodiment of the utility model overcurrent sensing circuit.

Fig. 7 is the structural drawing of comparer in the utility model overcurrent sensing circuit shown in Figure 6.

[embodiment]

Alleged herein " embodiment " or " embodiment " are meant special characteristic, structure or the characteristic that can be contained at least one implementation of the utility model.Different in this manual local " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or optionally mutually exclusive with other embodiment embodiment.

See also shown in Figure 4ly, it shows the structure of an embodiment of the utility model overcurrent sensing circuit, and as shown in the figure, the utility model overcurrent sensing circuit comprises first voltage input circuit, second voltage input circuit and a comparer.

First voltage input circuit comprises one first current source I31, the end of the first current source I31 is connected in power supply V, the other end of the first current source I31 links to each other with the source electrode of the first transistor MP31 through a resistance R 1, the grid of the first transistor MP31 links to each other with a second source G with drain electrode, and wherein the substrate of the first transistor links to each other with source electrode.The node that aforementioned first current source links to each other with resistance R 1 is the first input end V1 of device as a comparison.

Second voltage input circuit comprises one second current source I32, the end of the second current source I32 is connected in power supply V, the other end of the second current source I32 links to each other with the source electrode of transistor seconds MP32, the grid of transistor seconds MP32 connects a control voltage VM, the drain electrode of transistor seconds MP32 links to each other with a second source G, and wherein the substrate of transistor seconds MP32 links to each other with source electrode.The node that the aforementioned second current source I32 links to each other with the source electrode of transistor seconds MP32 is the second input end V2 of device as a comparison.

In actual applications, for example be used for battery protecting circuit, aforementioned G point is the negative pole that is connected in battery, and aforementioned VM is connected in the negative pole of load or the negative pole of charger.The voltage that the actual G of being point that aforementioned comparer need compare and VM are ordered.

Described comparer comprises first input end V1, the second input end V2 and an output terminal EDI.Comparer overturns when the voltage V1+ Δ V=V2 of the first input end V1 of comparer and the second input end V2, and wherein Δ V is the input deviation value of comparator C om1.

See also shown in Figure 5ly, it shows the concrete structure figure of the comparer with input deviation in the utility model overcurrent sensing circuit shown in Figure 4.As shown in the figure, the comparer in the overcurrent sensing circuit of the present utility model comprises first input end V1, the second input end V2.First input end V1 is connected in the base stage of the first triode NPN1, and the second input end V2 is connected in the base stage of the second triode NPN2.The emitter-base bandgap grading of the first triode NPN1 and the second triode NPN2 is connected in the end of one first current source I41 jointly, the other end ground connection of this first current source I41.

The collector of the first triode NPN1 is connected in the node N2 of one second current branch, and the collector of the second triode NPN2 is connected in the node N1 of one first current branch.

Wherein first current branch comprises one the one PMOS transistor MP41, the 3rd PMOS transistor MP43; Second current branch comprises one the 2nd PMOS transistor MP42, the 4th PMOS transistor MP44.

The source electrode of the one PMOS transistor MP41 and substrate all are connected in a power vd D, the grid of the one PMOS transistor MP41 links to each other with the grid of the 2nd PMOS transistor MP2 of second current branch, and the drain electrode of a PMOS transistor MP41 links to each other with the source electrode of the 3rd PMOS transistor MP43.The node that the drain electrode of the one PMOS transistor MP41 links to each other with the source electrode of the 3rd PMOS transistor MP43 is the aforementioned node N1 that links to each other with second transistor collector.The substrate of the 3rd PMOS transistor MP43 connects aforementioned power source VDD, the grid of the 3rd PMOS transistor MP43 links to each other with the grid of the 4th PMOS transistor MP4 of second current branch, the drain electrode of the 3rd PMOS transistor MP43 links to each other the other end ground connection of described second current source by a resistance R 41 with the end of one second current source I42.Wherein the node that links to each other with resistance R 41 of the 3rd PMOS transistor MP43 links to each other with the transistorized grid of a PMOS, and the node that resistance R 41 links to each other with the second current source I42 links to each other with the grid of the 3rd PMOS transistor MP3.

Source electrode and the substrate of the 2nd PMOS transistor MP42 all are connected in power vd D, the grid of the 2nd PMOS transistor MP42 links to each other with the grid of a PMOS transistor MP1 of first current branch, and the drain electrode of the 2nd PMOS transistor MP42 links to each other with the source electrode of the 4th PMOS transistor MP44.The node that the drain electrode of the 2nd PMOS transistor MP42 links to each other with the source electrode of the 4th PMOS transistor MP44 is the aforementioned node N2 that links to each other with first transistor collector.The substrate of the 4th PMOS transistor MP44 connects aforementioned power source VDD, the grid of the 4th PMOS transistor MP44 links to each other with the grid of the 3rd PMOS transistor MP3 of first current branch, the drain electrode of the 4th PMOS transistor MP44 links to each other with the end of one the 3rd current source I43, the other end ground connection of described the 3rd current source I43.Wherein the drain electrode of the 4th PMOS transistor MP44 is through phase inverter INV1, the INV2 of two series connection output terminal of device as a comparison.

Be noted that comparer input has different emitter area to pipe NPN1 with NPN2, formed input deviation like this, the input deviation voltage Δ V of comparer equals base-emitter voltage poor of NPN1 and NPN2.This comparer is not when two input voltages equate during upset, and its roll over condition is V2-V _Be2=V1-V _Be1, i.e. V2=V1+ Δ V _Be, Δ V wherein _Be=V _Be2-V _Be1The Δ V here _BeBe the input deviation voltage of comparer.For bipolar transistor, its base-emitter voltage is proportional to emitter current density.If the current mirror ratio of duplicating of MP41 and MP42 is 1: 1 in the utility model, the electric current of current source I43 also equals the electric current of current source I44, and during the comparer upset, the emitter current of NPN1 and NPN2 equates.For the utility model, the emitter area of NPN2 designs forr a short time than the emitter area of NPN1, and the emitter current density of NPN2 is then bigger like this, thereby satisfies V _Be2＞V _Be1, i.e. Δ V _Be＞0 requirement.And according to shown in Figure 4, V1=0+R1*I1+|V _GSP1|, V2=VM+|V _GSP2|, so comparer when upset, VM=R1*I1+ Δ V _Be, and I1=I2=V _BeSo/Rb is VM=V _Be* (R1/Rb)+Δ V _BeThe utility model excess current discharge threshold identical under the situation of can realizing ideal as can be seen with Fig. 2.

As shown in Figure 5, in order to realize lower operating supply voltage, adopted Origami cascaded differential input stage structure here.MP41 and MP42 can be designed as width and equal in length, also can be designed to equal in length, and there is certain ratio in width, promptly design this current mirror (current mirror that is made of MP41 and MP42) ratio of duplicating and are not equal to 1.If be designed to exist certain proportion, then this influences the base-emitter voltage difference of NPN2 and NPN1 than regular meeting, promptly influences the input deviation voltage of comparer.The current ratio of supposing MP42 and MP41 is K: 1, and the comparer upset is because the input node voltage of INV1 determines, and this node voltage is determined by the electric current of MP44 and the competition of current source I44.When the electric current of upper end MP44 during greater than the electric current of lower end I44, the input node of INV1 just becomes high level, and comparator output terminal EDI also becomes high level; When the electric current of upper end MP44 during less than the electric current of lower end I44, the input node of INV1 just becomes low level, and comparator output terminal EDI also becomes low level.So the roll over condition of comparer equals lower end electric current I 44 for upper end MP44.According to the KCL theorem, the electric current of MP41 equals I _NPN2+ I43, wherein I _NPN2Be the collector current of NPN2, I43 is the current value of current source I43.Electric current through MP42 behind the current mirror mirror image equals K. (I _NPN2+ I43).The MP44 electric current equals K* (I _NPN2+ I43)-I _NPN1, I wherein _NPN1Current value for NPN1.According to roll over condition, can get K* (I _NPN2+ I43)-I _NPN1=I44, wherein I44 is the electric current of current source I44, if I44=K*I43 is satisfied in design, then can realize I _NPN1=K*I _NPN2Because the base-emitter voltage difference of bipolar transistor depends on its emitter current density, so also can realize different comparer input deviation magnitudes of voltage by setting the K value.The ratio of the breadth length ratio of MP43 and MP44 should design the ratio of the breadth length ratio that equals MP41 and MP42.I43 and the current ratio of I44 should design the ratio of the breadth length ratio that equals MP41 and MP42.MP41～MP44 and R41 constitute the cascade current mirror, and R41 cascade current mirror for this reason provides bias voltage.Need not in the too low application for operating supply voltage, other simple differential input stage structures also are applicable in the comparer that the utlity model has input deviation.

Consider the mismatch situation, Fig. 4 structure main influences the transistor of precision of excess current discharge threshold to comprising: MP31 among Fig. 4 and MP32, NPN1 among Fig. 5 and NPN2.So the utility model is reduced to 2 grades to mismatch progression.Lack than prior art mismatch progression.When scale of mass production, can improve the precision of current discharge threshold value.

See also shown in Figure 6ly, it shows the structural drawing of another embodiment of the utility model overcurrent sensing circuit.Because structure shown in Figure 6 and structure shown in Figure 4 are basic identical, wherein the label with Fig. 4 components identical and structure use is identical, the no longer repeat specification of wherein identical part.The difference of structure shown in Figure 6 and overcurrent sensing circuit of the present utility model shown in Figure 4 is, has reduced resistance R 1 in first voltage input circuit of first voltage input circuit of the overcurrent sensing circuit among Fig. 6 than the overcurrent sensing circuit shown in Fig. 4.As shown in Figure 7, it shows the structural drawing that has the comparer of input deviation in the overcurrent sensing circuit shown in Figure 6.Because structure shown in Figure 7 and structure shown in Figure 5 are basic identical, wherein Fig. 7 is identical with the label of Fig. 5 components identical and structure use, the no longer repeat specification of identical part.The difference of structure shown in Figure 7 and comparer shown in Figure 5 is, is provided with aforementioned resistance R1 between the emitter-base bandgap grading of second triode and first current source.

In overcurrent sensing circuit shown in Figure 7, the breadth length ratio of supposing a PMOS transistor MP41 and the 2nd PMOS transistor MP42 equates, the one PMOS transistor MP41 and the 2nd PMOS transistor MP42 are 1: 1 current mirror, when upset takes place in comparer, electric current on the R1 is I41/2, and wherein I41 is the current value of current source I41.During the comparer upset, V2-V _Be2-R1. (I42/2)=V1-V _Be1, V2=V1+V then _Be. (R1/Rb)+Δ V _Be, in conjunction with shown in Figure 6, V2=VM+|V _GSP2|, V1=|V _GSP1|, | V _GSP2|=| V _GSP1| situation under, final VM=Vbe. (R1/Rb)+Δ V _BeThe utility model excess current discharge threshold identical under the situation of can realizing ideal as can be seen with Fig. 2.Just the first current source I41 need adopt 2V in embodiment of the present utility model _BeThe electric current of/Rb.Under non-ideality, its transistor of precision that influences the excess current discharge threshold is to comprising: MP1 among Fig. 6 and MP2, NPN1 among Fig. 7 and NPN2.Its mismatch progression is two-stage still, is better than three grades of mismatches of the prior art.

Above-mentioned explanation has fully disclosed embodiment of the present utility model.It is pointed out that and be familiar with the scope that any change that the person skilled in art does embodiment of the present utility model does not all break away from claims of the present utility model.Correspondingly, the scope of claim of the present utility model also is not limited only to previous embodiment.

Claims

1. overcurrent sensing circuit, it comprises:

2. overcurrent sensing circuit as claimed in claim 1, it is characterized in that: described comparer comprises first difference input triode and second difference input triode, the base stage of described first difference input triode is as the first input end of described comparer, and the base stage of described second difference input triode is as second input end of described comparer; The emitter-base bandgap grading of described first difference input triode is connected in a current source jointly through the emitter-base bandgap grading of resistance and second difference input triode.

3. overcurrent sensing circuit as claimed in claim 2 is characterized in that: the voltage between the Base-Emitter of described second difference input triode is greater than the voltage between the Base-Emitter of first difference input triode.

4. overcurrent sensing circuit as claimed in claim 2, it is characterized in that: the collector of described first difference input triode is connected in first current branch, the collector of second difference input triode is connected in second current branch, described first current branch and second current branch constitute current mirror, and the output terminal of second current branch is the output terminal of device as a comparison.

5. overcurrent sensing circuit as claimed in claim 4 is characterized in that: described first current branch and second current branch constitute the cascade current mirror.

6. overcurrent sensing circuit, it comprises:

7. overcurrent sensing circuit as claimed in claim 6, it is characterized in that: described comparer comprises first difference input triode and second difference input triode, the base stage of described first difference input triode is as the first input end of described comparer, and the base stage of described second difference input triode is as second input end of described comparer; The emitter-base bandgap grading of the emitter-base bandgap grading of described first difference input triode and second difference input triode is connected in a current source jointly.

8. overcurrent sensing circuit as claimed in claim 7 is characterized in that: the voltage between the Base-Emitter of described second difference input triode is greater than the voltage between the Base-Emitter of first difference input triode.

9. overcurrent sensing circuit as claimed in claim 7, it is characterized in that: the collector of described first difference input triode is connected in first current branch, the collector of second difference input triode is connected in second current branch, described first current branch and second current branch constitute current mirror, and the output terminal of second current branch is the output terminal of device as a comparison.

10. overcurrent sensing circuit as claimed in claim 9 is characterized in that: described first current branch and second current branch constitute the cascade current mirror.