CN201845252U - Repair and adjusting circuit of high-precision band-gap reference voltage source chip - Google Patents
Repair and adjusting circuit of high-precision band-gap reference voltage source chip Download PDFInfo
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- CN201845252U CN201845252U CN2010206195890U CN201020619589U CN201845252U CN 201845252 U CN201845252 U CN 201845252U CN 2010206195890 U CN2010206195890 U CN 2010206195890U CN 201020619589 U CN201020619589 U CN 201020619589U CN 201845252 U CN201845252 U CN 201845252U
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Abstract
A repair and adjusting circuit of a high-precision band-gap reference voltage source chip comprises a band-gap reference voltage source circuit. The band-gap reference voltage source circuit includes a first triode PNP1, a second triode PNP2, a first resistor R1, a second resistor R2-1-1, a third resistor R2-1-2, a fourth resistor R2-2, a first CMOS (complementary metal oxide semiconductor) amplifier (1) and a first multiple-choice switch (2). The repair and adjusting circuit is small in repair and adjusting errors, low temperature drift characteristic of the circuit can be guaranteed in a full-temperature range, repair and adjustment of initial precision and the temperature drift characteristic are independent mutually and do not affect to each other, output voltage of the circuit is unaffected technically, and the repair and adjusting circuit is convenient in realization and more effectively guarantees precision and reliability of repair and adjustment.
Description
Technical field
The utility model relates to the data acquisition technology field, relates in particular to a kind of demodulation circuit of repairing of High Precision Bandgap Reference chip.
Background technology
In data acquisition system (DAS), need the voltage reference chip to provide reference for system, as the important component part of data acquisition system (DAS), the precision of voltage reference chip has almost determined the precision of system.Therefore develop and the precision that a lot of technology are used to improve the voltage reference chip.
In integrated circuit, adopt bandgap voltage reference circuit to realize voltage reference usually, have a variety of based on the particular circuit configurations of this principle.As Fig. 1, be typical C MOS technology band-gap reference circuit, its temperature-the output voltage curve is as shown in Figure 2.When requiring better temperature characterisitic, can realize lower temperature drift by adopting the high-order compensation circuit, its temperature-the output voltage curve is as shown in Figure 3 in the compensation back.
But in the actual manufacture process, non-ideal factors such as technological parameter deviation and circuit mismatch are unavoidable, and these non-ideal factors can cause very big influence to the output voltage and the temperature characterisitic of band-gap reference, make its off-design value.
Therefore, for the band-gap reference circuit of reality, need and improve high precision and the low temperature drift characteristic that the feasible accent scheme of repairing guarantees benchmark.
Prior art adopts voltage to repair demodulation circuit usually, at normal temperatures promptly, resistance by resistance R 1 or R2 among change Fig. 1, the reference voltage source output voltage is adjusted to technology pairing " Magic Point " (promptly under the process conditions that adopted, the electrical voltage point that temperature drift is minimum), realize higher output voltage precision and lower temperature drift.The problem of this method for repairing and regulating is to depend on the characteristic of band-gap reference itself.Promptly for a certain technique for fixing, there is a specific output voltage (about 1.25V in band-gap reference, all differences of different process), promptly, just can obtain minimum temperature drift when the output voltage of band-gap reference being repaiied when being transferred to this magnitude of voltage corresponding to minimum temperature drift.But thisly repair the output voltage precision that accent can only guarantee specified temp point (normally repairing the residing temperature spot of timing) in fact, can't guarantee better temperature characterisitic, promptly can't guarantee the output voltage precision under different temperatures.
For this reason, be badly in need of the demodulation circuit of repairing of a kind of novel High Precision Bandgap Reference chip of invention.
The utility model content
In order to realize the foregoing invention purpose, the technical solution adopted in the utility model is as follows:
A kind of High Precision Bandgap Reference chip repair demodulation circuit, comprise the bandgap voltage reference circuit, described bandgap voltage reference circuit comprises the first triode PNP1, the second triode PNP2, first resistance R 1, the second resistance R 2-1-1, the 3rd resistance R 2-1-2, the 4th resistance R 2-2, first cmos amplifier (1) and first multiselect, one switch (2); Described first multiselect, one switch (2) comprises first fen pressure side (3), second minute pressure side (4), voltage output end (5) and resistance in series row (6), described first minute pressure side (3), described second minute pressure side (4) be connected to the two ends of described resistance in series row (6), described first minute pressure side (3), described second minute pressure side (4) link to each other with described voltage output end (5) by switch respectively, described resistance in series row (6) all link to each other with described voltage output end (5) by switch between the resistance in twos; Described first cmos amplifier (1) comprises first differential input end (8), second differential input end (9) and amplifier out (10); The base stage of the described first triode PNP1 and emitter are communicated with and ground connection, the collector of the described first triode PNP1 through described first resistance R 1 and described first multiselect, one switch (1) first minute pressure side (3) be connected; The base stage of the described second triode PNP2 and emitter are communicated with and ground connection, the collector series connection of the described second triode PNP2 through behind described the 3rd resistance R 2-1-2, the described second resistance R 2-1-1 with described first multiselect, one switch (2) second minute pressure side (4) be connected; Dividing point between second differential input end (9) described the 3rd resistance R 2-1-2 of connection of described first cmos amplifier (1) and the collector of the described second triode PNP2, first differential input end (8) of described first cmos amplifier (1) connects the voltage output end (5) of described first multiselect, one switch (2), and the amplifier out (10) of described first cmos amplifier (1) connects dividing point between the second resistance R 2-1-1 and the 3rd resistance R 2-1-2 through described the 4th resistance R 2-2.
Also comprise output buffer stage circuit, described output buffer stage circuit comprises the 5th resistance R 3, the 6th resistance R 4, the 7th resistance R 7, the 8th resistance R 8, second multiselect, one switch (11), second cmos amplifier (12) and reference voltage output end mouth (13); Described second multiselect, one switch (11) comprises first fen pressure side (14), second minute pressure side (15), voltage output end (16) and resistance in series row (17), described first minute pressure side (14), described second minute pressure side (15) be connected to the two ends of described resistance in series row (17), described first minute pressure side (14), described second minute pressure side (15) link to each other with described voltage output end (16) by switch respectively, described resistance in series row (17) all link to each other with described voltage output end (16) by switch between the resistance in twos; Described second cmos amplifier (12) comprises first differential input end (18), second differential input end (19) and amplifier out (20); Described second multiselect, one switch (11) first minute pressure side (14) through described the 6th resistance R 4 ground connection, described second multiselect, one switch (11) second minute pressure side (15) be connected between the amplifier out (10) and described the 4th resistance R 2-2 of described first cmos amplifier (1) through described the 5th resistance R 3; Second differential input end (19) of described second cmos amplifier (12) connects the voltage output end (16) of described second multiselect, one switch (11), amplifier out (20) series connection of described second cmos amplifier (12) is through ground connection after the 7th resistance R 7, the 8th resistance R 8, and first differential input end (18) of described second cmos amplifier (12) is connected between described the 7th resistance R 7 and described the 8th resistance R 8; Described reference voltage output end mouth (13) is connected between the amplifier out (20) and described the 7th resistance R 7 of described second cmos amplifier (12).
Also comprise and repair the tonal signal memory circuit and repair demodulation circuit in advance, described tonal signal memory circuit and described demodulation circuit common control described first multiselect, one switch (2) and second multiselect, one switch (11) repaiied in advance repaiied.
The utility model relates to a kind of bandgap voltage reference chip output voltage and reaches low temperature drift and the high-precision accent scheme of repairing, and can realize this circuit structure of repairing the accent scheme.Comprise the accent scheme of repairing of temperature drift and the accent scheme of repairing of initial precision, and realize repairing that accent needs repaiies demodulation circuit, repair demodulation circuit and repair adjusting information memory circuit etc. in advance.
The utility model relates to the bandgap reference voltage chip that can realize high precision and low temperature drift.The accent scheme of repairing of the present utility model comprises that temperature characterisitic repaiies the accent mode, and the output voltage initial value is repaiied the accent mode, intends repairing the accent process by repairing mode transfer in advance, repaiies the tonal signal storage, and it is rapid etc. specifically to repair pacing.
The utility model is in output buffer stage circuit, by being set, different voltage repaiies the accent code, can change the ratio of Δ R3 and Δ R4, thereby guarantee to float under the prerequisite of characteristic, adjust output voltage values and obtain needed output voltage precision in the temperature that does not influence the chip output voltage.
The demodulation circuit of repairing in advance of the present utility model is compared difference and only is with repairing demodulation circuit, repaiies demodulation circuit and transfers repairing in the code storage circuit to transfer sign indicating number to come the control circuit state according to repairing; Repair demodulation circuit in advance by external signal control circuit state.Promptly repair demodulation circuit in advance and can repair the variation of circuit internal resistance ratio when transferring code to change by the simulation of outer increase control signal; Its role is under not changing the situation of repairing the accent code in the memory circuit, simulation code changes the influence to circuit output voltage and temperature characterisitic; External signal is by after repairing the demodulation circuit coding in advance, and control is repaiied and transferred the resistance ratio, and pairing the repairing of output voltage that is met requirement transferred sign indicating number.This repaiies and transfers sign indicating number to be deposited in and repair the adjusting information memory circuit formally repairing timing.
The tonal signal memory circuit of repairing of the present utility model is meant to be used to store and repaiies the information storage circuit of transferring code, and repairing of depositing in transferred code directly to control and repaiied demodulation circuit.In this scheme, adopt the One Time Programmable circuit to realize.
Of the present utility model repairing transfers flow process as follows:
1. add different temperature drift and repair and transfer sign indicating number by repairing demodulation circuit in advance, change the state of bandgap voltage reference circuit, the different output voltages of transferring the corresponding chip of sign indicating number of repairing of test respectively under high low temperature;
2. than the identical output voltage of repairing chip when transferring sign indicating number when identical (be circuit state) under two conditions of higher temperatures and low temperature, get the temperature drift of transferring sign indicating number to do this sheet chip of repairing of the temperature drift amount correspondence of output voltage difference minimum and repair and transfer sign indicating number;
3. repairing of will obtaining in 2. transferred sign indicating number to deposit in to repair and transferred a sign indicating number memory circuit, and this circuit temperature was floated characteristic and reached optimum this moment.
4. under normal temperature condition, repair the accent sign indicating number by repairing demodulation circuit in advance to the initial precision of chip input and output voltage, the different corresponding output voltages of accent sign indicating number of repairing of test are chosen pairing the repairing of the output voltage that satisfies accuracy requirement and are transferred sign indicating number, are the initial precision of needed voltage and repair the accent sign indicating number;
5. the initial precision of this voltage is repaiied transfer that sign indicating number deposits this chip in repair the accent code storage circuit.
6. the accent of repairing of this chip is finished, and circuit has realized that low temperature floats and the initial precision of high voltage.
The beneficial effects of the utility model are as follows:
1. of the present utility model repair in advance demodulation circuit fully mimic channel rather than realize that so error is very little through repairing the state behind the accent by calculating;
2. the utility model adopts under high low temperature the mode of test respectively, makes the low temperature of circuit float characteristic and is guaranteed in the total temperature scope;
3. initial precision of the present utility model and temperature float characteristic to repair phase modulation independent mutually, be independent of each other, the output voltage of circuit is not subjected to technogenic influence, it is convenient to realize, has guaranteed that better circuit repaiies the precision and the reliability of accent.
Description of drawings
That shown in Figure 1 is typical C MOS technology band-gap reference circuit figure in the prior art;
Shown in Figure 2 is bandgap voltage reference representative temperature curve synoptic diagram in the prior art;
Shown in Figure 3 is the bandgap voltage reference representative temperature curve synoptic diagram of process high-order compensation in the prior art;
Shown in Figure 4 is the synoptic diagram of the utility model circuit;
Shown in Figure 5 is that the utility model is repaiied accent process synoptic diagram.
Embodiment
Below in conjunction with accompanying drawing, describe the utility model optimized technical scheme in detail.
The demodulation circuit of repairing as a kind of High Precision Bandgap Reference chip of Fig. 4, comprise the bandgap voltage reference circuit, it is characterized in that: described bandgap voltage reference circuit comprises the first triode PNP1, the second triode PNP2, first resistance R 1, the second resistance R 2-1-1, the 3rd resistance R 2-1-2, the 4th resistance R 2-2, first cmos amplifier 1 and first multiselect, one switch 2; Described first multiselect, one switch 2 comprises first fen pressure side 3, second minute pressure side 4, voltage output end 5 and resistance in series row 6, described first minute pressure side 3, described second minute pressure side 4 are connected to the two ends of described resistance in series row 6, described first minute pressure side 3, described second minute pressure side 4 link to each other with described voltage output end 5 by switch respectively, and described resistance in series row 6 all link to each other with described voltage output end 5 by switch between the resistance in twos; Described first cmos amplifier 1 comprises first differential input end 8, second differential input end 9 and amplifier out 10; The base stage of the described first triode PNP1 and emitter are communicated with and ground connection, and the collector of the described first triode PNP1 is connected through first fen pressure side 3 of described first resistance R 1 with described first multiselect, one switch 1; The base stage of the described second triode PNP2 and emitter are communicated with and ground connection, and the collector series connection of the described second triode PNP2 is connected with second fen pressure side 4 of described first multiselect, one switch 2 through behind described the 3rd resistance R 2-1-2, the described second resistance R 2-1-1; Dividing point between second differential input end, 9 described the 3rd resistance R 2-1-2 of connection of described first cmos amplifier 1 and the collector of the described second triode PNP2, first differential input end 8 of described first cmos amplifier 1 connects the voltage output end 5 of described first multiselect, one switch 2, and the amplifier out 10 of described first cmos amplifier 1 connects dividing point between the second resistance R 2-1-1 and the 3rd resistance R 2-1-2 through described the 4th resistance R 2-2.
Also comprise output buffer stage circuit, described output buffer stage circuit comprises the 5th resistance R 3, the 6th resistance R 4, the 7th resistance R 7, the 8th resistance R 8, second multiselect, one switch 11, second cmos amplifier 12 and reference voltage output end mouth 13; Described second multiselect, one switch 11 comprises first fen pressure side 14, second minute pressure side 15, voltage output end 16 and resistance in series row 17, described first minute pressure side 14, described second minute pressure side 15 are connected to the two ends of described resistance in series row 17, described first minute pressure side 14, described second minute pressure side 15 link to each other with described voltage output end 16 by switch respectively, and described resistance in series row 17 all link to each other with described voltage output end 16 by switch between the resistance in twos; Described second cmos amplifier 12 comprises first differential input end 18, second differential input end 19 and amplifier out 20; First fen pressure side 14 of described second multiselect, one switch 11 is through described the 6th resistance R 4 ground connection, and second fen pressure side 15 of described second multiselect, one switch 11 is connected between the amplifier out 10 and described the 4th resistance R 2-2 of described first cmos amplifier 1 through described the 5th resistance R 3; Second differential input end 19 of described second cmos amplifier 12 connects the voltage output end 16 of described second multiselect, one switch 11, amplifier out 20 series connection of described second cmos amplifier 12 are through ground connection after the 7th resistance R 7, the 8th resistance R 8, and first differential input end 18 of described second cmos amplifier 12 is connected between described the 7th resistance R 7 and described the 8th resistance R 8; Described reference voltage output end mouth 13 is connected between the amplifier out 20 and described the 7th resistance R 7 of described second cmos amplifier 12.
Also comprise and repair the tonal signal memory circuit and repair demodulation circuit in advance, described tonal signal memory circuit and described common described first multiselect, one switch 2 of control of demodulation circuit and second multiselect, one switch 11 repaiied in advance repaiied.
In the present embodiment, repair the tonal signal memory circuit and repair the common control of demodulation circuit first multiselect one switch 2 in advance, which dividing point input amplifier input end decision chooses.Change the temperature drift characteristic that dividing point has just changed the voltage reference circuit output voltage.Choose best temperature drift curve repairing timing in advance, will pairingly repair the accent code and deposit circuit in, can finish the accent of repairing output voltage temperature drift.
Output buffer stage circuit part in the present embodiment, the dividing point by second multiselect, one switch, 11 decision inputs, second cmos amplifier 12 to adjust the D. C. value of output voltage, reaches the purpose of adjusting the initial precision of chip output voltage.
Under hot conditions, add temperature drift and repair the output voltage of transferring code to change chip, test and write down all temperature drifts and repair the output voltage of transferring the code correspondence.Under cryogenic conditions, add temperature drift and repair the output voltage of transferring code to change chip, test and write down all temperature drifts and repair the output voltage of transferring the code correspondence.Than all identical output voltages of transferring the code correspondence of repairing under higher temperatures and the cryogenic conditions, that gets the absolute difference minimum repaiies the accent code, repaiies the accent code as the temperature drift of chip, deposits it in temperature drift and repaiies and transfer in the code storage circuit.Like this, chip just has been in the state of minimum temperature drift, but output voltage might not satisfy parameter request.The increasing and output voltage initial value is repaiied the accent code outside at this moment under normal temperature condition, change the output voltage of chip, test is also write down all output voltage initial values and is repaiied the output voltage of transferring the code correspondence, get and to repair the accent code near the output voltage correspondence of parameter request, output voltage initial value as chip is repaiied the accent code, and deposits chip in.Like this, chip just is in the minimum temperature drift that can reach and the state of accurate output voltage.The accent process of repairing of this sheet chip just is through with.
In the present embodiment, the temperature drift characteristic of high-precision voltage reference obtains by high-order compensation; The temperature drift characteristic of high-precision voltage reference is by test under a plurality of temperature and repair the accent realization; The high initial precision of high-precision voltage reference is repaiied to transfer by high precision and is realized; High precision is repaiied to transfer by repairing in advance to transfer and is realized, it is identical with the actual result who repaiies demodulation circuit to repair result that demodulation circuit reaches in advance; High precision is repaiied accent and can be realized in wafer sort or finished product test process; The amplifier of band-gap reference is the amplifier of MOS input to pipe, and extremely low input bias current (Pi Anji) is arranged.
More than by the detailed description of concrete and preferred embodiment the utility model; but those skilled in the art should be understood that; the utility model is not limited to the above embodiment; all within spirit of the present utility model and principle; any modification of being done, be equal to replacement etc., all should be included within the protection domain of the present utility model.
Claims (3)
1. a High Precision Bandgap Reference chip repaiies demodulation circuit, comprise the bandgap voltage reference circuit, it is characterized in that: described bandgap voltage reference circuit comprises the first triode PNP1, the second triode PNP2, first resistance R 1, the second resistance R 2-1-1, the 3rd resistance R 2-1-2, the 4th resistance R 2-2, first cmos amplifier (1) and first multiselect, one switch (2);
Described first multiselect, one switch (2) comprises first fen pressure side (3), second minute pressure side (4), voltage output end (5) and resistance in series row (6), described first minute pressure side (3), described second minute pressure side (4) be connected to the two ends of described resistance in series row (6), described first minute pressure side (3), described second minute pressure side (4) link to each other with described voltage output end (5) by switch respectively, described resistance in series row (6) all link to each other with described voltage output end (5) by switch between the resistance in twos;
Described first cmos amplifier (1) comprises first differential input end (8), second differential input end (9) and amplifier out (10);
The base stage of the described first triode PNP1 and emitter are communicated with and ground connection, the collector of the described first triode PNP1 through described first resistance R 1 and described first multiselect, one switch (1) first minute pressure side (3) be connected; The base stage of the described second triode PNP2 and emitter are communicated with and ground connection, the collector series connection of the described second triode PNP2 through behind described the 3rd resistance R 2-1-2, the described second resistance R 2-1-1 with described first multiselect, one switch (2) second minute pressure side (4) be connected;
Dividing point between second differential input end (9) described the 3rd resistance R 2-1-2 of connection of described first cmos amplifier (1) and the collector of the described second triode PNP2, first differential input end (8) of described first cmos amplifier (1) connects the voltage output end (5) of described first multiselect, one switch (2), and the amplifier out (10) of described first cmos amplifier (1) connects dividing point between the second resistance R 2-1-1 and the 3rd resistance R 2-1-2 through described the 4th resistance R 2-2.
2. High Precision Bandgap Reference chip according to claim 1 repair demodulation circuit, it is characterized in that: also comprise output buffer stage circuit, described output buffer stage circuit comprises the 5th resistance R 3, the 6th resistance R 4, the 7th resistance R 7, the 8th resistance R 8, second multiselect, one switch (11), second cmos amplifier (12) and reference voltage output end mouth (13);
Described second multiselect, one switch (11) comprises first fen pressure side (14), second minute pressure side (15), voltage output end (16) and resistance in series row (17), described first minute pressure side (14), described second minute pressure side (15) be connected to the two ends of described resistance in series row (17), described first minute pressure side (14), described second minute pressure side (15) link to each other with described voltage output end (16) by switch respectively, described resistance in series row (17) all link to each other with described voltage output end (16) by switch between the resistance in twos;
Described second cmos amplifier (12) comprises first differential input end (18), second differential input end (19) and amplifier out (20);
Described second multiselect, one switch (11) first minute pressure side (14) through described the 6th resistance R 4 ground connection, described second multiselect, one switch (11) second minute pressure side (15) be connected between the amplifier out (10) and described the 4th resistance R 2-2 of described first cmos amplifier (1) through described the 5th resistance R 3;
Second differential input end (19) of described second cmos amplifier (12) connects the voltage output end (16) of described second multiselect, one switch (11), amplifier out (20) series connection of described second cmos amplifier (12) is through ground connection after the 7th resistance R 7, the 8th resistance R 8, and first differential input end (18) of described second cmos amplifier (12) is connected between described the 7th resistance R 7 and described the 8th resistance R 8;
Described reference voltage output end mouth (13) is connected between the amplifier out (20) and described the 7th resistance R 7 of described second cmos amplifier (12).
3. High Precision Bandgap Reference chip according to claim 1 and 2 repair demodulation circuit, it is characterized in that: also comprise and repair the tonal signal memory circuit and repair demodulation circuit in advance, described tonal signal memory circuit and described demodulation circuit common control described first multiselect, one switch (2) and second multiselect, one switch (11) repaiied in advance repaiied.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010206195890U CN201845252U (en) | 2010-11-23 | 2010-11-23 | Repair and adjusting circuit of high-precision band-gap reference voltage source chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2010206195890U CN201845252U (en) | 2010-11-23 | 2010-11-23 | Repair and adjusting circuit of high-precision band-gap reference voltage source chip |
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| CN201845252U true CN201845252U (en) | 2011-05-25 |
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| CN104122928A (en) * | 2014-08-20 | 2014-10-29 | 电子科技大学 | Bandgap reference voltage generator circuit with low temperature drift coefficient |
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| CN105739589A (en) * | 2016-05-11 | 2016-07-06 | 成都信息工程大学 | Temperature coefficient automatic tuning method for reference circuit |
| CN105759891A (en) * | 2016-03-22 | 2016-07-13 | 成都信息工程大学 | Calibration method for reference sources |
| CN107479617A (en) * | 2017-09-20 | 2017-12-15 | 广西师范大学 | A kind of high-precision correction circuit for bandgap voltage reference |
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| CN109613420A (en) * | 2019-01-30 | 2019-04-12 | 上海华虹宏力半导体制造有限公司 | The test method of chip |
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| CN104076271A (en) * | 2013-03-27 | 2014-10-01 | 上海宏测半导体科技有限公司 | Lithium battery protection circuit testing method and system |
| CN104122928A (en) * | 2014-08-20 | 2014-10-29 | 电子科技大学 | Bandgap reference voltage generator circuit with low temperature drift coefficient |
| CN104656006A (en) * | 2015-01-20 | 2015-05-27 | 辉芒微电子（深圳）有限公司 | Chip parameter trimming circuit, trimming method and chip comprising trimming circuit |
| CN105759891A (en) * | 2016-03-22 | 2016-07-13 | 成都信息工程大学 | Calibration method for reference sources |
| CN105759891B (en) * | 2016-03-22 | 2017-05-31 | 成都信息工程大学 | A kind of calibration method for a reference source |
| CN105739589A (en) * | 2016-05-11 | 2016-07-06 | 成都信息工程大学 | Temperature coefficient automatic tuning method for reference circuit |
| CN105739589B (en) * | 2016-05-11 | 2017-05-31 | 成都信息工程大学 | A kind of automatic method for repairing and regulating of temperature coefficient for reference circuit |
| CN108121390A (en) * | 2016-11-30 | 2018-06-05 | 无锡华润矽科微电子有限公司 | Trim the circuit and method of band-gap reference |
| CN107565939A (en) * | 2017-09-19 | 2018-01-09 | 记忆科技(深圳)有限公司 | A kind of digital code stream control trims circuit |
| CN107565939B (en) * | 2017-09-19 | 2020-09-01 | 记忆科技(深圳)有限公司 | Digital code stream control trimming circuit |
| CN107479617A (en) * | 2017-09-20 | 2017-12-15 | 广西师范大学 | A kind of high-precision correction circuit for bandgap voltage reference |
| CN107479617B (en) * | 2017-09-20 | 2023-08-08 | 广西师范大学 | High-precision correction circuit for band-gap reference voltage source |
| CN110780701A (en) * | 2018-07-30 | 2020-02-11 | 亚德诺半导体无限责任公司 | Techniques for generating multiple low noise reference voltages |
| CN110780701B (en) * | 2018-07-30 | 2021-05-28 | 亚德诺半导体无限责任公司 | Techniques for generating multiple low noise reference voltages |
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| CN115145347A (en) * | 2022-08-19 | 2022-10-04 | 山东东仪光电仪器有限公司 | Second-order temperature compensation band gap reference circuit insensitive to operational amplifier offset |
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