CN201796957U - 发光二极管导线架 - Google Patents
发光二极管导线架 Download PDFInfo
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- CN201796957U CN201796957U CN2010202144052U CN201020214405U CN201796957U CN 201796957 U CN201796957 U CN 201796957U CN 2010202144052 U CN2010202144052 U CN 2010202144052U CN 201020214405 U CN201020214405 U CN 201020214405U CN 201796957 U CN201796957 U CN 201796957U
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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Abstract
本实用新型揭示了一种发光二极管导线架,其包括设有中空功能区的胶座及若干金属接脚,金属接脚间隔暴露于功能区内,并延伸至胶座之外,该金属接脚设有镀银层,在金属接脚与胶座结合处的镀银层上设有疏水性物质层,防止水气渗入,可提高发光二极管导线架的使用寿命。
Description
【技术领域】
本实用新型涉及一种发光二极管导线架,尤其是一种可防止水气渗入的表面黏着型发光二极管导线架。
【技术背景】
发光二极管是一种固态的半导体组件,不同于钨丝灯泡发光原理,属于冷光发光,只需极小电流就可以发光。发光二极管不但具有寿命长、省电、耐用、耐震、牢靠、适合量产、体积小及反应快等优点,更普遍应用在生活中多项产品,如:手机、PDA产品的背光源、信息与消费性电子产品的指示灯、工业仪表设备、汽车用仪表指示灯与煞车灯及大型广告广告牌等。
现有的表面黏着型发光二极管导线通常包括一胶座、两个金属接脚、一发光芯片及二条导线。胶座具有一中空状的功能区,金属接脚埋设于胶座中,其中金属接脚部分暴露于功能区底部,部分延伸出胶座相对两侧,并且沿胶座外侧弯折至胶座底面以作为后续制程的接点。在金属接脚表面上设有镀银层,通过镀银层将发光芯片发出的光反射出去。胶座于功能区中形成间隔区块以区隔两金属接脚的极性。发光芯片设置于功能区内后,通过两条导线将发光芯片与两个金属接脚分别连接,并于胶座的功能区内覆盖一层可透光的环氧树脂以封装该发光二极管导线架。当给露出于胶座外的金属接脚施加电压即可使发光芯片发光。
然而,此发光二极管导线架的胶座与金属接脚之间会产生间隙,容易导致外部环境周围的水气及硫化物沿此间隙扩散到功能区内部,当水气及硫化物共同存在时,水气会加速硫化物把镀银层反应成黑色的硫化银,当镀银层变黑后,发光芯片的光会在镀银层反射率下降的情况下降低亮度,最终会导致发光二极管导线架失效。
请参阅图1所示,揭示了一种改善上述发光二极管导线架,其在金属接脚2′与胶座1′结合的表面设置有若干凹槽20′,通过延长水气通过的路径来延缓镀 银层变黑的速度。然而,该发光二极管导线架长时间使用后,镀银层仍会变黑,发光芯片的亮度仍会降低。
鉴于此,实有必要克服上述发光二极管导线架的缺陷。
【实用新型内容】
本实用新型所解决的技术问题是提供一种防止水气渗入的发光二极管导线架。
为了解决上述技术问题,本实用新型提供一种发光二极管导线架,其包括:设有中空功能区的胶座及若干金属接脚,金属接脚间隔暴露于功能区内,并延伸至胶座之外,该金属接脚设有镀银层,在金属接脚与胶座结合处的镀银层上设有疏水性物质层。
为了解决上述技术问题,本实用新型还界定所述疏水性物质层的表面张力比水的表面张力小。所述疏水性物质层的厚度范围为1~10nm。所述胶座的表面张力比水的表面张力小。所述金属接脚从功能区向胶座外部弯折至胶座的底部。
与相关技术相比,本实用新型由于疏水性物质层对水具有排斥性,可以阻止水气通过金属接脚与胶座之间的间隙进入功能区,如此可以防止发光二极管导线架的镀银层变黑,提高发光二极管导线架的使用寿命。
【附图说明】
图1为现有发光二极管导线架的立体图。
图2为本实用新型发光二极管导线架的立体图。
图3为沿图2中的A-A线的剖视图。
图4为图3框B部分的局部放大图。
图5为本实用新型另一实施例中类似图4所示部位的局部放大图。
【具体实施方式】
参阅图2所示,本实用新型为一种表面黏着型发光二极管导线架,其包括一绝缘的胶座1及固持于胶座1中的两金属接脚2。
参阅图2至图3所示,胶座1大致呈长方体,通过塑料射出成型于金属接脚2上。胶座1外侧形成外胶壁11,胶座1中部凹设形成中空状的功能区10,该功能区10为长方形状,其亦可为圆形状、椭圆形状或其它多边形状。
金属接脚2埋设于胶座1中,每一金属接脚2均有部分可见于功能区10底部,并通过导线4与放置在其中一个金属接脚2上的发光芯片3连接,每一金属接脚2从功能区10向胶座1外部延伸,并弯折至胶座1的外胶壁11的底部形成弯折部20,该弯折部20低于胶座1的底面以做为后续制程的接点。本创作的金属接脚2是通过铜合金导电金属以冲压成型方式形成,其中将金属接脚2朝向功能区10的表面定义为上表面,与上表面相对的表面定义为下表面。参阅图4所示,在金属接脚2的上、下表面设有镀银层21,以反射发光芯片3所发出的光,该镀银层21也可以仅设置在金属接脚2的上表面。在镀银层21的上面又设有疏水性物质层22,以防止外部环境中的水气及硫化物通过胶座1与金属接脚2之间的间隙6进入功能区10内。所述疏水性物质层22也可以仅设置在胶座1与金属接脚2的结合处。
在本实用新型中,疏水性物质层22是一种对水具有排斥性的物质层,其可以让水气及硫化物无法通过胶座1与金属接脚2之间的间隙6,把水气及硫化物阻隔在发光二极管导线架外。该疏水性物质层22是由一种含有多个氟原子的物质组成,此多个氟原子物质包括3,3,4,4,5,5,6,6,7,7,8,8,8-十三氟-1-正辛硫醇,其化学式为:CF3(CF2)4CF2~SH或3,3,4,4,5,5,6,6,6-九氟-1-正己硫醇,其化学式为:CF3(CF2)3CH2CH2SH。正因为此氟原子的物质结构中具有硫醇基团,此基团会与镀银层21的表面作用,使镀银层21表面形成一层疏水性物质层22。该疏水性物质层22的厚度很薄,大概在1~10nm的范围内,因此不会影响发光二极管导线架封装的固晶和打线制程。由于该疏水性物质层22的表面张力比水的表面张力小很多,所以疏水效果明显。
参阅图5所示,其为本实用新型的另一实施较佳方式,其与上一实施方式中的发光二极管导线架类似,在金属接脚2的镀银层21上设置疏水性物质层22,而且进一步在胶座1中添加铁氟龙5。铁氟龙5是一种含氟的高分子物质,其与成型胶座1的塑料混合后一起射出成型,使铁氟龙5均匀分散在胶座1中,其中,铁氟龙5添加在胶座1中的重量比的范围为3~10%。此种含有铁氟龙5的胶座1的表面张力比水的表面张力小很多,所以疏水效果明显。
本实用新型利用金属接脚2表面的疏水性物质层22的疏水特性以及胶座1表面的疏水特性,让金属接脚2与胶座1之间的间隙6具有疏水特性,让水 气无法透过间隙6进入功能区10中,如此就会使发光二极管导线架的镀银层21不易变黑,提高其使用寿命。
以上仅为本实用新型的优选实施方案,其它在本实施方案基础上所做的任何改进变换也应当不脱离本实用新型的技术方案。
Claims (5)
1.一种发光二极管导线架,其包括:设有中空功能区的胶座及若干金属接脚,金属接脚间隔暴露于功能区内,并延伸至胶座之外,该金属接脚设有镀银层,其特征在于:在金属接脚与胶座结合处的镀银层上设有疏水性物质层。
2.如权利要求1所述的发光二极管导线架,其特征在于:所述疏水性物质层的表面张力比水的表面张力小。
3.如权利要求2所述的发光二极管导线架,其特征在于:所述疏水性物质层的厚度范围为1~10nm。
4.如权利要求3所述的发光二极管导线架,其特征在于:所述胶座的表面张力比水的表面张力小。
5.如权利要求1所述的发光二极管导线架,其特征在于:所述金属接脚从功能区向胶座外部弯折至胶座的底部。
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Granted publication date: 20110413 Termination date: 20130604 |