CN201741700U

CN201741700U - Silicon carbide high-pressure P-type metallic oxide semiconductor tube with floating buried layer

Info

Publication number: CN201741700U
Application number: CN2010202243202U
Authority: CN
Inventors: 钱钦松; 庄华龙; 孙伟锋; 潘晓芳; 陆生礼; 时龙兴
Original assignee: Southeast University
Current assignee: Southeast University
Priority date: 2010-06-11
Filing date: 2010-06-11
Publication date: 2011-02-09
Anticipated expiration: 2020-06-11

Abstract

The utility model relates to a silicon carbide high-pressure P-type metallic oxide semiconductor tube with a floating buried layer, comprising an N-type silicon carbide substrate which is provided with an N-type epitaxial layer; the N-type epitaxial layer is internally provided with a source and a P-type drift region; the P-type drift region is internally provided with a leakage and an N-type protecting ring; the source is provided with a metal lead of the source; the leakage is provided with a metal lead of the source leakage; a grid oxidation layer is arranged above the N-type epitaxial layer between the source and the P-type drift region and is adjacently connected with the metal lead of the source; field oxidation layers are arranged on the surface of the N-type protecting ring, the surface of the leakage and the surface of the N-type epitaxial layer; the grid oxidation layer is provided with grids; the metal lead of the leakage is provided with a metal field pole plate; and the P-type floating buried layer is arranged between the N-type silicon carbide substrate and the N-type epitaxial layer and positioned on the intersected interface of the N-type silicon carbide substrate and the N-type epitaxial layer. After the N-type silicon carbide substrate is selected, the P-type floating buried layer is prepared by adopting a boron ion injection method, and then other conventional operations are conducted.

Description

The silicon carbide high pressure P-type metal oxide transistor of band floating buried layer

One, technical field

The utility model is a kind of silicone carbide metal oxide semiconductor pipe, especially silicon carbide high pressure MOS (metal-oxide-semiconductor) transistor.

Two, background technology

The MOS type power IC device has advantages such as switching characteristic is good, power consumption is little, and what is more important MOS type power device is easy to compatibility standard low pressure metal oxide semiconductor technology, reduces production cost of chip.More with structures such as horizontal double diffusion, offset gates in the research of MOS type power IC device.Wherein the lateral metal oxide semiconductor field effect transistor has good short-channel properties and negative mobility temperature coefficient, and can obtain very high puncture voltage by the RESURF technology.Therefore it is widely used: being specially adapted to CDMA, W-CDMA, TETRA, digital terrestrial television etc. needs the demanding application of wide frequency ranges, high linearity and useful life.

At present, carborundum is as a kind of semiconductor material with wide forbidden band, and its breakdown field strength height, Heat stability is good also have characteristics such as charge carrier saturation drift velocity height, thermal conductivity height, can be used for making various high temperature resistant, high-frequency high-power devices, be applied to the occasion that silicon device is difficult to be competent at.Silicon carbide power MOS device has very high critical electric field, under the condition that blocking voltage remains unchanged, can adopt thinner heavy doping drift region, so the ON state conducting resistance of silicone carbide metal oxide semiconductor pipe reduces greatly than silicon based metal oxide semiconductor tube.Growing silicon carbice crystals technology and device manufacturing technology are further perfect, and rate of finished products, reliability and the price of various silicon carbide power electronic devices will obtain bigger improvement in a few years from now on.Puncture voltage based on the lateral metal oxide semiconductor field effect transistor of carbofrax material is big, conducting resistance is little, therefore has very much researching value and application prospect.

Three, technology contents

Technical problem the utility model provides a kind of puncture voltage p type buried layer silicon carbide high pressure P-type metal oxide transistor of floating having more than 2000V.

Technical scheme

A kind of silicon carbide high pressure P-type metal oxide transistor described in the utility model with floating buried layer; comprise: N type silicon carbide substrates; on N type silicon carbide substrates, be provided with N type epitaxial loayer; in N type epitaxial loayer, be provided with source and P type drift region; in P type drift region, be provided with Lou and N type guard ring; on the source, be provided with the metal lead wire in source; on leaking, be provided with metal lead wire leakage; above the N type epitaxial loayer between source and the P type drift region, be provided with gate oxide and with the metal lead wire adjacency in source; surface at N type guard ring; surface beyond the metal lead wire that leaks; the metal lead wire in the surface beyond the leakage of P type drift region and the N type guard ring and the source of N type epitaxial loayer and the surface beyond the gate oxide are provided with field oxide; on gate oxide, be provided with grid; on the metal lead wire that leaks, be provided with the metal field pole plate; between N type silicon carbide substrates and N type epitaxial loayer, be provided with P type floating buried layer, and described P type floating buried layer is positioned on N type silicon carbide substrates and the N type epitaxial loayer interface.

Beneficial effect the utility model silicone carbide metal oxide semiconductor tubular construction is compared with traditional silicone carbide metal oxide semiconductor tubular construction, and puncture voltage has improved nearly one times, as shown in Figure 3.(1) the utility model has been introduced P type floating buried layer, because buried regions has the equipotential effect, the high electric field of drain terminal is reallocated.Simultaneously, buried regions and epitaxial loayer, substrate have formed two parallel plane PN junctions.Wherein with the formed parallel plane PN junction of substrate depleted after, can bear the longitudinal voliage of drain terminal with the PN junction of P type drift region and epitaxial loayer jointly, thereby improve vertical puncture voltage of device.(2) the utility model has been introduced N type guard ring in P type drift region; this makes P type drift region not only and between the N type extension form depletion region; and and N type guard ring between the same depletion region that forms; therefore strengthened the degree of exhaustion of P type drift region greatly; reduce the electric field strength at carborundum and oxide layer interface, thereby improved the lateral breakdown voltage of device.(3) can increase P with the idiostatic field plate of leakage ⁺Leak and N type guard ring between radius of curvature, thereby reduced the surface field of this PN junction, improved the surface breakdown voltage of device.(4) preparation technology's compatibility standard carborundum CMOS technology of the present utility model, therefore silicone carbide metal oxide semiconductor tubular construction of the present utility model can be applied to the silicon carbide power integrated circuit.

Four, description of drawings

Fig. 1 is traditional silicon carbide device organization plan, and Fig. 2 is the structural representation of present embodiment.Fig. 3 is the puncture voltage simulation drawing.

Five, embodiment

A kind of silicon carbide high pressure P-type metal oxide transistor with floating buried layer; comprise: N type silicon carbide substrates 1; on N type silicon carbide substrates 1, be provided with N type epitaxial loayer 2; in N type epitaxial loayer 2, be provided with source 4 and P type drift region 3; in P type drift region 3, be provided with Lou 5 and N type guard ring 7; on source 4, be provided with the metal lead wire 12 in source; leaking the metal lead wire 11 that is provided with the source leakage on 5; above the N type epitaxial loayer 2 between source 4 and the P type drift region 3, be provided with gate oxide 6 and with metal lead wire 12 adjacency in source; surface at N type guard ring 7; surface beyond the metal lead wire 11 of the leakage of leakage 5; the metal lead wire 12 in the surface beyond the leakage 5 of P type drift region 3 and the N type guard ring 7 and the source of N type epitaxial loayer 2 and the surface beyond the gate oxide 6 are provided with field oxide 8; on gate oxide 6, be provided with grid 10; on the metal lead wire 11 that leaks, be provided with metal field pole plate 9; between N type silicon carbide substrates 1 and N type epitaxial loayer 2, be provided with P type floating buried layer 13, and described P type floating buried layer 13 is positioned on N type silicon carbide substrates 1 and N type epitaxial loayer 2 interfaces.

Claims

1. silicon carbide high pressure P-type metal oxide transistor with floating buried layer; comprise: N type silicon carbide substrates (1); on N type silicon carbide substrates (1), be provided with N type epitaxial loayer (2); in N type epitaxial loayer (2), be provided with source (4) and P type drift region (3); in P type drift region (3), be provided with Lou (5) and N type guard ring (7); on source (4), be provided with the metal lead wire (12) in source; leaking the metal lead wire (11) that is provided with on (5) leakage; the top of the N type epitaxial loayer (2) between source (4) and P type drift region (3) be provided with gate oxide (6) and with metal lead wire (12) adjacency in source; surface at N type guard ring (7); leak metal lead wire (11) surface in addition of (5); the leakage (5) of P type drift region (3) and N type guard ring (7) in addition the surface and the metal lead wire (12) and gate oxide (6) surface in addition in the source of N type epitaxial loayer (2) be provided with field oxide (8); on gate oxide (6), be provided with grid (10); on the metal lead wire (11) that leaks, be provided with metal field pole plate (9); it is characterized in that; between N type silicon carbide substrates (1) and N type epitaxial loayer (2), be provided with P type floating buried layer (13), and described P type floating buried layer (13) is positioned on N type silicon carbide substrates (1) and N type epitaxial loayer (2) interface.