CN201741143U - Can bus digital interference injection circuit - Google Patents
Can bus digital interference injection circuit Download PDFInfo
- Publication number
- CN201741143U CN201741143U CN201020126061XU CN201020126061U CN201741143U CN 201741143 U CN201741143 U CN 201741143U CN 201020126061X U CN201020126061X U CN 201020126061XU CN 201020126061 U CN201020126061 U CN 201020126061U CN 201741143 U CN201741143 U CN 201741143U
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- bus
- logic
- npn
- transceiver
- digital interference
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Abstract
The utility model discloses a CAN bus digital interference injection circuit for realizing simulating of various logical error states stated by the CAN bus standard. The circuit is directly connected to 2.5V through the emitters of NPN and PNP triodes, the collectors of the NPN and PNP triodes are parallelly connected with the CAN-H and CAN-L of a CAV transceiver respectively and then are connected into the CAN-H and CAN-L lines in a CAN network, through the high-low logic level combination of the TXD pin of the CAV transceiver and the bases of the two triodes, logic 'high' or logic 'low' is forcibly written into a CAN bus or the whole bus is led to be at the high resistance state, thus realizing injection of various digital logic interferences of the CAN bus.
Description
Affiliated technical field:
The utility model relates to a kind of CAN of being used for (Controller Area Network controller local area network) bus test process and produces digital interference and logic error, is used for investigating the digital interference injection circuit of CAN bus node or the working condition of CAN bus system under digital interference and logic error situation.
Background technology:
The CAN bus is because its high-performance and reliability are widely used in aspects such as industrial automation, boats and ships, Medical Devices.Especially at vehicle electric field, the CAN bus often is used as in the power system network directly related with safety, and is therefore, particularly important for the testing authentication work of CAN bus system and CAN bus node.For reliability and the working condition under the logic error situation of various CAN bus standard defineds of testing, verify designed CAN bus system or CAN bus node, need a kind of CAN bus digital interference injection circuit of design to be used for that the CAN bus is injected configurable Digital Logic and disturb.
Summary of the invention:
In order to realize simulation to the various logic error condition of CAN bus standard defined, the utility model has designed a kind of CAN bus digital interference injection circuit (as Fig. 1), by the series connection of a pair of triode and the injection of the various Digital Logic of CAN bus being disturbed with the realization in parallel of CAN transceiver CAN_H and CAN_L.
A pair of NPN and PNP triode are directly connected on the 2.5V power supply the emitter of pipe, and the collector of NPN triode and PNP triode is connected with the CAN_L pin with the CAN_H pin of CAN transceiver respectively, the conducting by base stage level control triode with close.
TXD pin by the CAN transceiver and two triodes are realized the CAN bus is forced to write logic " height ", logic " low " and the CAN bus is presented high-impedance state to the combination of pipe base stage logic level height.
Description of drawings:
Accompanying drawing 1 is a CAN bus digital interference injection circuit schematic diagram, wherein 1. is the CAN transceiver, and CAN_H and CAN_L are respectively two signal wires of CAN bus, and Q1 and Q2 are respectively a pair of NPN and PNP triode.
Embodiment:
Circuit theory diagrams of the present utility model as shown in Figure 1, Q1, Q2 are that a pair of triode of NPN and PNP that is respectively is to pipe among the figure, their emitter directly links to each other and links to each other with the 2.5V power supply, the collector of Q1 and Q2 respectively with the CAN_H pin and the parallel connection of CAN_L pin of CAN transceiver, insert CAN_H and CAN_L line in the CAN network after the parallel connection respectively, by combination, the CAN bus is forced to write logic " height " and logic " low " or the CAN bus is presented " high resistant " state the high low value of logic level of the TXD pin of CAN transceiver and Q1, Q2 base stage.
Claims (1)
1. CAN bus digital interference injection circuit, by a pair of NPN and PNP triode Guan Yuyi CAN transceiver is electrically connected, it is characterized in that: a pair of NPN and PNP triode are directly connected on the 2.5V power supply the emitter of pipe, and the collector of NPN triode and PNP triode is connected with the CAN_L pin with the CAN_H pin of CAN transceiver respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020126061XU CN201741143U (en) | 2010-03-09 | 2010-03-09 | Can bus digital interference injection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020126061XU CN201741143U (en) | 2010-03-09 | 2010-03-09 | Can bus digital interference injection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201741143U true CN201741143U (en) | 2011-02-09 |
Family
ID=43556420
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201020126061XU Expired - Fee Related CN201741143U (en) | 2010-03-09 | 2010-03-09 | Can bus digital interference injection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201741143U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102238053A (en) * | 2010-05-06 | 2011-11-09 | 上海固泰科技有限公司 | Controller area network (CAN) bus interference generator |
-
2010
- 2010-03-09 CN CN201020126061XU patent/CN201741143U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102238053A (en) * | 2010-05-06 | 2011-11-09 | 上海固泰科技有限公司 | Controller area network (CAN) bus interference generator |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| DD01 | Delivery of document by public notice |
Addressee: Mo Mang Document name: Notification to Pay the Fees |
|
| C56 | Change in the name or address of the patentee | ||
| CP02 | Change in the address of a patent holder |
Address after: 200092 Shanghai city Yangpu District Guokang Road No. 46 Tongji Science and Technology Building Room 406 Patentee after: Shanghai Gutai Technology Co., Ltd. Address before: 200092 room 510, science and Technology Park, Tongji University, 65 Chifeng Road, Shanghai, Yangpu District Patentee before: Shanghai Gutai Technology Co., Ltd. |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110209 Termination date: 20130309 |