CN201478290U - Semiconductor chip module - Google Patents

Semiconductor chip module Download PDF

Info

Publication number
CN201478290U
CN201478290U CN2009201663463U CN200920166346U CN201478290U CN 201478290 U CN201478290 U CN 201478290U CN 2009201663463 U CN2009201663463 U CN 2009201663463U CN 200920166346 U CN200920166346 U CN 200920166346U CN 201478290 U CN201478290 U CN 201478290U
Authority
CN
China
Prior art keywords
semiconductor chip
chip module
conductive frame
electrode
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2009201663463U
Other languages
Chinese (zh)
Inventor
刘台徽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Solapoint Corp
Original Assignee
Solapoint Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Solapoint Corp filed Critical Solapoint Corp
Priority to CN2009201663463U priority Critical patent/CN201478290U/en
Application granted granted Critical
Publication of CN201478290U publication Critical patent/CN201478290U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Landscapes

  • Photovoltaic Devices (AREA)

Abstract

The utility model provides a semiconductor chip module which comprises a conducting frame with an inner margin and an outer margin, a flexible cable with a conductor layer, and a semiconductor chip defining a front side and a rear side, wherein the inner margin of the conducting frame defines an opening; the conductor layer is in the electrical contact with the outer margin of the conducting frame; the semiconductor chip has a first electrode and a second electrode, which are positioned on the front side and the rear side respectively; and the first electrode is connected with the inner margin of the conducting frame so that the semiconductor chip is positioned below the conducting frame and the semiconductor chip is exposed out of the opening. The semiconductor chip module overcomes the problem that the existing cement sealant is easy to break due to aging.

Description

Semiconductor chip module
Technical field
The utility model relates to a kind of semiconductor chip module, particularly relates to the semiconductor chip module with the two-phase different electrode that lays respectively at heteropleural.
Background technology
Fig. 1 shows known semiconductor chip module 10.As shown in the figure, semiconductor chip module 10 comprises support plate 13; First conductive junction point 11 and second conductive junction point 12 lay respectively on the support plate 13; And chip 14, be arranged on the support plate 13.Chip 14 has the relative both sides that two electrical different first electrodes 15 and second electrode, 16, the first electrodes 15 and second electrode 16 lay respectively at chip 14.When chip was arranged on the support plate 11, first electrode 15 is contact first conductive junction point 11 electrically.As for second electrode 16, then can see through lead-in wire 17 and second electrode 16 and second conductive junction point 12 are electrically connected in the modes of lead-in wire, coat sealing 18 more afterwards and finish encapsulation.
Known semiconductor chip module 10 has many shortcomings.For example, lead-in wire promptly is the high relatively step of quite loaded down with trivial details cost on the technology, moreover lead-in wire will occupy many spaces.Because lead-in wire itself is elongated to be than weak structure, sealing 18 protections must be arranged.Yet when chip 14 is solar chip, it is subjected to solar light irradiation for a long time will make sealing 18 can't bear continuous high temperature and aging breaking.
Therefore, need a kind of semiconductor chip module of novelty to improve known problem.
The utility model content
In view of above-mentioned known disadvantage, the utility model provides a kind of semiconductor chip module with conductive frame and pliability winding displacement, and wherein semiconductor chip is arranged at the conductive frame below.The utility model utilizes conductive frame to replace known pin configuration, can avoid the aging problem of breaking of known sealing.
At embodiment, the utility model provides a kind of semiconductor chip module, comprises conductive frame, has inner edge and outer rim, inner edge definition opening; The pliability winding displacement has conductor layer and insulating barrier optionally, and conductor layer electrically contacts the outer rim of conductive frame; Semiconductor chip, definition front side and rear side, semiconductor chip has first electrode and second electrode that lays respectively at front side and rear side, and wherein first electrode connects the inner edge of conductive frame so that semiconductor chip is positioned at the conductive frame below, and semiconductor chip then is exposed in the opening.
At another embodiment, the utility model provides a kind of aforesaid semiconductor chip module, and wherein the inner edge of conductive frame or outer rim have jagged external form.
At another embodiment more, the utility model provides a kind of aforesaid semiconductor chip module, and wherein semiconductor chip is a solar chip.
At another embodiment again, the utility model provides a kind of aforesaid semiconductor chip module, also comprise pedestal, in order to the bearing semiconductor chip, pedestal comprises the first conduction end points and the second conduction end points, the first conduction end points connects the pliability winding displacement, and the second conduction end points connects second electrode, and pedestal is the shell of electronic component.
Description of drawings
Fig. 1 is a known semiconductor chip module schematic diagram.
Fig. 2 is the STRUCTURE DECOMPOSITION figure of the semiconductor chip module of the utility model first embodiment.
Fig. 3 A is the vertical view of the semiconductor chip module of the utility model first embodiment.
Fig. 3 B shows along the profile of the I-I ' dotted line of Fig. 3 A.
Fig. 4 is the vertical view of the conductive frame of the utility model second embodiment.
Fig. 5 is the vertical view of the conductive frame of the utility model the 3rd embodiment.
Fig. 6 is the semiconductor chip module schematic diagram of the utility model the 4th embodiment.
Fig. 7 A is semiconductor chip and the conductive frame schematic diagram of the utility model the 5th embodiment.
Fig. 7 B to Fig. 7 D is the conductive frame schematic diagram of the utility model the 6th to the 8th embodiment.
Fig. 8 is the semiconductor chip module schematic diagram of the utility model the 8th embodiment.
Description of reference numerals
10 semiconductor chip modules
11 first conductive junction points, 12 second conductive junction points
13 support plates, 14 chips
15 first electrodes, 16 second electrodes
18 sealings of 17 lead-in wires
200 semiconductor chip modules
210 semiconductor chips
210a front side 210b rear side
The 211b of 211a first second portion
211 first electrodes, 212 second electrodes
220 conductive frames
220a first surface 220b second surface
221 inner edges, 222 outer rims
223 openings
230 pliability winding displacements, 231 conductor layers
231a ledge 232 look edge layers
310 first semiconductor layers, 320 second semiconductor layers
D1 width d2 size
420 conductive frames, 421 inner edges
520 conductive frames
521 inner edges, 522 outer rims
610 pedestals
611 first conduction end points, 612 second conduction end points
710A semiconductor chip 711 first electrodes
The 711b of 711a first second portion
720A, 720B, 720C, 720D conductive frame
721 inner edges, 722 outer rims
The 723a opening
The miniature perforate of the miniature perforate 740b of 740a
The miniature perforate of 723b opening 740c
The miniature perforate of 723c opening 740d
The 723d opening
800 semiconductor chip modules, 830 concentrators
Embodiment
Below with reference to appended graphic demonstration preferred embodiment of the present utility model.Similar components adopts the components identical symbol in the accompanying drawing.Should note presenting the utility model for clear, each element in the accompanying drawing is not the scale according to material object, and for avoiding fuzzy content of the present utility model, below known spare part, associated materials and correlation processing technique thereof are also omitted in explanation.
Fig. 2 is according to first embodiment, the STRUCTURE DECOMPOSITION figure of illustration semiconductor chip module 200 of the present utility model.As shown in the figure, semiconductor chip module 200 comprises semiconductor chip 210, conductive frame 220 and pliability winding displacement 230.
With reference to figure 2, semiconductor chip 210 definition front side 210a and rear side 210b (being shown among Fig. 3 B).Semiconductor chip 210 has first electrode 211 and second electrode 212 (being shown among Fig. 3 B), and it lays respectively at front side 210a and rear side 210b.Generally speaking, semiconductor chip 210 can be any suitable semiconductor chip that encapsulates or do not encapsulate, as light-emitting diode, photodiode, laser diode or rectification type diode; Also can be transistor, as PMOS, CMOS etc.The utility model at this preferred embodiment with solar chip as demonstration.First electrode 211 of semiconductor chip 210 also comprises the 211a of first, has pattern structure in order to the transmission electric current that illumination produced; And second portion 211b, be looped around the 211a of first around.Second portion 211b is in order to concentrate the 211a of first institute electric current transmitted.The structure of relevant semiconductor chip 210, follow-up will being described in more detail.
With reference to figure 2, conductive frame 220 has inner edge 221 and outer rim 222, inner edge 221 definition openings 223.Lead frame 220 can any suitable conductive material be made, so for being applied in solar chip, then with can resistant to elevated temperatures metal preferred.The utility model adopts the aluminium of lower cost at this embodiment.Should be noted that near the dotted lines of being drawn the inner edge 221 and outer rim 222 among the figure are the position of representing semiconductor chip 210 and pliability winding displacement 230 to be connected with lead frame 220 respectively, follow-up will being described in more detail.In addition, should notice that the utility model does not limit lead frame 220 external forms.
With reference to figure 2, the utility model also provides at least one pliability winding displacement 230 equally.Show the pliability winding displacement 230 of 4 rectangles among the figure, the number and the external form of right pliability winding displacement 230 can change on demand, and the utility model does not limit its number and type shape.Pliability winding displacement 230 can be the known soft arranging wire that is used for connecting electronic component.Pliability winding displacement 230 comprises the insulating barrier 232 of conductor layer 231 and bonding conductor layer 231.Insulating barrier 232 is stacked and placed on the top of conductor layer 231.Should notice that insulating barrier 232 optionally is provided with, pliability winding displacement 230 also can only comprise conductor layer 231.In the example that contains insulating barrier 232, conductor layer 231 has the ledge 231a of outstanding insulating barrier 232.Ledge 231a overlaps in order to the outer rim 222 with conductive frame 220.Conductor layer 231 can be metal or above-mentioned various alloys such as any suitable material such as Copper Foil, tin, iron, aluminium.The material of insulating barrier 232 is selected from pi, organosilicon, epoxy resin or benzocyclobutene (BENZOCYCLOBUTENE) etc.
With reference to figure 2, the method that conductive frame 220, pliability winding displacement 230 and semiconductor chip 210 are combined into semiconductor chip module 200 can comprise again: the outer rim 222 (position shown in dotted line) that the ledge 231a of the conductor layer 231 of pliability winding displacement 230 is connected in conductive frame 200; And the second portion 211b of first electrode 211 of semiconductor chip 210 is connected to the inner edge 221 (position shown in dotted line) of conductive frame 220, so that semiconductor chip 210 is positioned at the below of the opening 223 of conductive frame 220.So, the 211a of first of semiconductor chip 220 will be exposed in this opening 223.
The vertical view of formed semiconductor chip module 200 after each combination of components of Fig. 3 A displayed map 2.Fig. 3 B shows along the profile of the I-I ' dotted line of Fig. 3 A.Simultaneously as can be known, the width d of the opening 223 of conductive frame 220 with reference to figure 3A and 3B 1Less than semiconductor chip size d 2So the second portion 211b of first electrode 211 of semiconductor chip 210 is overlapped on the inner edge 221 of conductive frame 220.Should note the position of the second portion 211b of the ledge 231a of conductor layer 231 of pliability winding displacement 230 and first electrode 211 at this.In detail, conductive frame 220 definable first surface 220a and second surface 220b, first surface 220 is in the face of light, second surface 220b is with respect to this first surface 220a, second surface 220b is back to light, and wherein the second portion 211b of the ledge 231a and first electrode 211 all is connected on the second surface 220b.
Can find out the more detailed structure of semiconductor chip 210 from Fig. 3 B.As shown in the figure, semiconductor chip 210 also comprises first semiconductor layer 310 and second semiconductor layer 320, wherein second semiconductor layer 320 is positioned at first semiconductor layer, 310 belows, and second electrode 212 is positioned at second semiconductor layer, 320 belows, and first electrode 211 is positioned at first semiconductor layer, 310 tops.It is made that first semiconductor layer 310 and second semiconductor 320 can be the different electrical semi-conducting materials that mix, and constitutes p-n junction (p-n junction) therebetween.Semi-conducting material comprises monocrystalline silicon (single crystal silicon), polysilicon (polycrystal silicon), amorphous silicon (amorphous silicon), reaches III-V family (as GaAs (GaAs), indium phosphide (InP), InGaP (InGaP)) or the like.The material of first electrode 211 and second electrode 212 can be any suitable conducting metal, for example alloy that titanium, silver, platinum, gold, tin, nickel, copper or its constituted etc.
The conductive frame 420 that the semiconductor chip module of Fig. 4 illustration second embodiment of the present utility model is used.As shown in the figure, the inner edge 421 of conductive frame 420 has jagged external form, and expanding with heat and contract with cold when its function is to regulate semiconductor chip module of the present utility model and meets with variations in temperature causes short circuit to take place to prevent semiconductor chip module from producing the crack.
Fig. 5 is the used conductive frame 520 of illustration the 3rd embodiment of the present utility model then.The inner edge 521 and the outer rim 522 of conductive frame 520 all have jagged external form, and its function is as above-mentioned.In other words, the position of the jagged external form of conductive frame of the present utility model can optionally change.Jagged external form also comprises undaform, the low concavo-convex inequality of height etc.Other element of second embodiment and the 3rd embodiment such as semiconductor chip and pliability winding displacement can be similar to aforesaid embodiment.
Fig. 6 illustration the 4th embodiment of the present utility model.The difference of the 4th embodiment and previous embodiment is that semiconductor chip module 600 also comprises pedestal 610, in order to bearing semiconductor chip 210.Pedestal 610 comprises the first conduction end points 611 and the second conduction end points 612.The first conduction end points 611 connects pliability winding displacement 230.The second conduction end points 612 connects second electrode 212.The 4th embodiment is intended to illustrate that the various semiconductor chip modules of previous embodiment can at random be arranged on the suitable pedestal.With solar chip 210 is example, and pedestal 610 can be the shell of electronic component, and it has the contact (as the first conduction end points 611 and the second conduction end points 612) that joins with chip 210 electricity.Thus, electronic component can directly receive the power supply that solar chip supplies and be applied.
Fig. 7 A shows semiconductor chip 710A and the conductive frame 720A that the 5th embodiment of the present utility model is used.On behalf of semiconductor chip 710A, the dotted line shown in the conductive frame 720A of Fig. 7 A be combined in position on the conductive frame 720A.Semiconductor chip 710A comprises first electrode 711.First electrode 711 also comprises the 711a of first, has pattern structure in order to the transmission electric current that irradiation produced; Reach second portion 711b, be positioned at the two ends of the 711a of first.Second portion 711b is in order to concentrate the 211a of first institute electric current transmitted.Semiconductor chip 710 is that with the dissimilarity of aforesaid semiconductor chip 210 711a of first has different pattern structures and second portion 711b only is located at the two ends of the 711a of first and does not fully surround the 711a of first.In addition, semiconductor chip 710A also can comprise first semiconductor layer, second semiconductor layer, reach second electrode, and these structures can be with reference to aforesaid semiconductor chip 210.
Same conductive frame 720A has inner edge 721 and outer rim 722 with reference to figure 7A, inner edge 721 definition opening 723a.Conductive frame 720A and aforesaid conductive frame 220 different be in, conductive frame 720A also comprises a plurality of miniature perforate 740a.Miniature perforate 740a can increase the pliability of conductive frame 720A and prevent that conductive frame 720A from producing slight crack because of expanding with heat and contract with cold.Should notice that this embodiment also comprises other element such as pliability winding displacement (not shown) etc.Because the explanation of above-mentioned pliability winding displacement 230, persons skilled in the art can understand that the pliability winding displacement of this embodiment can do various variations in response to conductive frame 720A, so do not give unnecessary details at this.
Fig. 7 B to Fig. 7 D shows the 5th embodiment of the present utility model, the 6th embodiment and the 7th embodiment respectively.The used semiconductor chip of these embodiment can be with reference to aforesaid semiconductor chip 210.These embodiment are various other variations of the conductive frame 720A of a plurality of miniature perforate 740a of having of displayed map 7A.Fig. 7 A shows that conductive frame 720A has two sides of miniature perforate 740a around opening 723a; Fig. 7 B shows that conductive frame 720B has three sides of miniature perforate 740b around opening 723b; Fig. 7 C shows that then conductive frame 720C has four sides of miniature perforate 740c around opening 723c.Should note the external form that does not limit opening of the present utility model.The conductive frame 720D that Fig. 7 D is shown, the external form of the opening 723d that it has is obviously different with aforesaid opening, and on behalf of the opening external form, this promptly to change arbitrarily with the need.Similarly, the external form of miniature perforate 740d is not limited yet.
Fig. 8 illustration the 8th embodiment of the present utility model.The difference of the 4th embodiment of the 8th embodiment and earlier figures 6 is that semiconductor chip module 800 also comprises transparent glasses lens, is covered in semiconductor chip 210 tops in order to protection semiconductor chip 210.Similarly, transparent glasses lens also can have multiple variation.Fig. 8 shows the concentrator 830 that the octahedra speculum of serving as reasons be covered in semiconductor chip 210 tops surrounds (or claim " light funnel ").Compared to general transparent glasses lens, concentrator 830 can have better optically focused usefulness.
The above is a preferred embodiment of the present utility model only, is not in order to limit claim of the present utility model; All other do not break away from being equal to of being finished under the spirit that the utility model discloses and changes or modify, and all should be included in the described claim.

Claims (21)

1. a semiconductor chip module is characterized in that, this semiconductor chip module comprises: conductive frame has inner edge and outer rim, this inner edge definition opening; The pliability winding displacement has conductor layer, and this conductor layer electrically contacts this outer rim of this conductive frame; Semiconductor chip, definition front side and rear side, this semiconductor chip has first electrode and second electrode that lays respectively at this front side and this rear side, wherein this first electrode connects this inner edge of this conductive frame so that this semiconductor chip is positioned at this conductive frame below, and this semiconductor chip then is exposed in this opening.
2. semiconductor chip module as claimed in claim 1 is characterized in that this conductive frame is fabricated from aluminum.
3. semiconductor chip module as claimed in claim 1 is characterized in that, this inner edge of this conductive frame has jagged external form.
4. semiconductor chip module as claimed in claim 1 is characterized in that, this outer rim of this conductive frame has jagged external form.
5. semiconductor chip module as claimed in claim 1 is characterized in that, this semiconductor chip has the size greater than this opening.
6. semiconductor chip module as claimed in claim 1 is characterized in that, this pliability winding displacement also comprises the insulating barrier that is arranged on this conductor layer, and this conductor layer has the ledge of outstanding this insulating barrier, and this ledge connects this outer rim of this conductive frame.
7. semiconductor chip module as claimed in claim 6, it is characterized in that, this semiconductor chip is a solar chip, this conductive frame has first surface and with respect to the second surface of this first surface, this first surface is in the face of light, this second surface is back to light, and this ledge and this first electrode all are connected in this second surface.
8. semiconductor chip module as claimed in claim 1 is characterized in that, this pliability winding displacement also comprises the insulating barrier that is arranged on this conductor layer, and this insulating barrier is that pi, organosilicon, epoxy resin or benzocyclobutene are made.
9. semiconductor chip module as claimed in claim 1 is characterized in that, this semiconductor chip is a solar chip.
10. semiconductor chip module as claimed in claim 9 is characterized in that, this first electrode also comprises first, has pattern structure in order to the transmission electric current that illumination produced.
11. semiconductor chip module as claimed in claim 10 is characterized in that, this first electrode also comprises second portion, be positioned at this first around, this second portion is in order to concentrate this institute of first electric current transmitted.
12. semiconductor chip module as claimed in claim 11 is characterized in that, this second portion is connected in this inner edge of this conductive frame.
13. semiconductor chip module as claimed in claim 10 is characterized in that, this first is exposed in this opening.
14. semiconductor chip module as claimed in claim 9 is characterized in that, this semiconductor chip also comprises:
First semiconductor layer; And
Second semiconductor layer is positioned at this first semiconductor layer below, it is characterized in that, this second electrode is positioned at this second semiconductor layer below, and this first electrode is positioned at this first semiconductor layer top.
15. semiconductor chip module as claimed in claim 1 is characterized in that, also comprises pedestal, in order to carry this semiconductor chip.
16. semiconductor chip module as claimed in claim 15 is characterized in that, this pedestal comprises the first conduction end points and the second conduction end points, and this first conduction end points connects this pliability winding displacement, and this second conduction end points connects this second electrode.
17. semiconductor chip module as claimed in claim 15 is characterized in that, this pedestal is the shell of electronic component.
18. semiconductor chip module as claimed in claim 1 is characterized in that, this conductive frame also comprises a plurality of miniature perforates, and these a plurality of miniature perforates are around this opening.
19. semiconductor chip module as claimed in claim 1 is characterized in that, this conductive frame also comprises a plurality of miniature perforates, and these a plurality of miniature perforates are only partly around this opening.
20. semiconductor chip module as claimed in claim 1 is characterized in that, also comprises the top that transparent glasses lens covers this semiconductor chip.
21. semiconductor chip module as claimed in claim 20 is characterized in that, this transparent glasses lens concentrator that octahedra speculum surrounded of serving as reasons.
CN2009201663463U 2009-08-04 2009-08-04 Semiconductor chip module Expired - Fee Related CN201478290U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2009201663463U CN201478290U (en) 2009-08-04 2009-08-04 Semiconductor chip module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2009201663463U CN201478290U (en) 2009-08-04 2009-08-04 Semiconductor chip module

Publications (1)

Publication Number Publication Date
CN201478290U true CN201478290U (en) 2010-05-19

Family

ID=42414550

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2009201663463U Expired - Fee Related CN201478290U (en) 2009-08-04 2009-08-04 Semiconductor chip module

Country Status (1)

Country Link
CN (1) CN201478290U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104078523A (en) * 2013-03-25 2014-10-01 讯芯电子科技(中山)有限公司 Light-gathering photoelectric chip package structure and fabrication method thereof
CN111696948A (en) * 2019-03-12 2020-09-22 爱思开海力士有限公司 Semiconductor module including printed circuit board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104078523A (en) * 2013-03-25 2014-10-01 讯芯电子科技(中山)有限公司 Light-gathering photoelectric chip package structure and fabrication method thereof
CN104078523B (en) * 2013-03-25 2016-08-31 讯芯电子科技(中山)有限公司 Optically focused photoelectric chip encapsulating structure and preparation method
CN111696948A (en) * 2019-03-12 2020-09-22 爱思开海力士有限公司 Semiconductor module including printed circuit board

Similar Documents

Publication Publication Date Title
CN100380685C (en) Light-emitting device and its prodn. method
US8440907B2 (en) Solar cell, solar cell string and solar cell module
TWI413266B (en) Photovoltaic module
US20110017281A1 (en) Solar cell module and method for manufacturing solar cell module
JP4947660B2 (en) Solar cell module and method for manufacturing solar cell module
JP2009043842A (en) Solar battery module
US10707363B2 (en) Assembly for housing wire elements
WO2012082293A1 (en) Diode-included connector, photovoltaic laminate and photovoltaic assembly using same
JP2007109956A (en) Solar cell, solar cell string and solar cell module
WO2012015031A1 (en) Solar cell module
JP5999527B2 (en) Solar cell module and method for manufacturing solar cell module
CN105977328A (en) Solar cell module
US20120222728A1 (en) Solar cell module and manufacturing method thereof
TW201324817A (en) Concentrator solar cell module, photovoltaic power generation system, and manufacturing method for concentrator solar cell module
CN201478290U (en) Semiconductor chip module
JP2001352089A (en) Thermal expansion strain preventing solar cell module
US9954483B2 (en) Solar cell module and method of fabricating the same
US8981209B2 (en) Photovoltaic module
JP2005244046A (en) Solar battery module and method for manufacturing solar battery module
JP2000277771A (en) Solar battery module
JP2014524155A (en) Photovoltaic module with simplified connection
JP2014154674A (en) Solar cell module and photovoltaic power generation system
EP2884546A1 (en) Solar cell module.
JP5311160B2 (en) Solar cell module
CN201369335Y (en) Photovoltaic cell module

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100519

Termination date: 20140804

EXPY Termination of patent right or utility model