CN201413826Y - Mesa type glass passivated diode chip - Google Patents
Mesa type glass passivated diode chip Download PDFInfo
- Publication number
- CN201413826Y CN201413826Y CN2009201201017U CN200920120101U CN201413826Y CN 201413826 Y CN201413826 Y CN 201413826Y CN 2009201201017 U CN2009201201017 U CN 2009201201017U CN 200920120101 U CN200920120101 U CN 200920120101U CN 201413826 Y CN201413826 Y CN 201413826Y
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- diode chip
- junction
- mesa
- passivation layer
- glass
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Abstract
The utility model discloses a mesa type glass passivated diode chip, which comprises a chip and a mesa lateral wall passivation glass layer, wherein the passivation glass layer is thicker at a position close to a PN junction and is thinner at the bottom of a trench. The mesa type glass passivated diode chip has the advantages of having high pressure resistance and fine reliability and facilitatingchip cutting and the like.
Description
Technical field
The utility model relates to a kind of semiconductor chip, especially relates to a kind of mesa glassivation diode chip for backlight unit.
Background technology
At present, the glass passivating method of the mesa glassivation diode chip for backlight unit that adopts usually in the industry is to adopt knife coating.Its main method is that glass metal is scraped in the chip groove, carries out sintering after the oven dry, once more glass metal is scraped in the chip groove, carries out sintering after the oven dry and forms.The glass of Xing Chenging is that the PN junction place is thinner as stated above, and channel bottom is thicker, influences the withstand voltage properties of high pressure material, has also reduced the cutting speed of chip.
Summary of the invention
The purpose of this utility model provides a kind of withstand voltage height, mesa glassivation diode chip for backlight unit that reliability is stable.
For achieving the above object, the utility model provides following technical scheme:
Mesa glassivation diode chip for backlight unit comprises and adopts different doping processs, P type semiconductor and N type semiconductor is produced on the same block semiconductor substrate and the PN junction that forms at its interface.And be positioned at the passivation glass layer that the table top sidewall is coated on the PN junction outside.Wherein, near the sectional thickness that is positioned at the PN junction position of glass passivation layer is positioned near the channel bottom sectional thickness greater than glass passivation layer.
Further, the sectional thickness of glass passivation layer near the PN junction position near the smooth change of the curved shape from big to small channel bottom position.
The utility model compared with prior art has the following advantages owing to adopted technique scheme:
One, glass passivation layer is thicker around the PN junction, effectively improves the withstand voltage and reliability of chip;
Two, chip channel bottom glass passivation layer is thinner, helps promoting chip cutting speed.
Description of drawings
Fig. 1 is the utility model mesa glassivation diode chip for backlight unit generalized section.
Embodiment
Below in conjunction with accompanying drawing embodiment of the present utility model is described in further detail:
As shown in the figure, the utility model mesa glassivation diode chip for backlight unit 1 comprises and adopts different doping processs, P type semiconductor and N type semiconductor is produced on the same block semiconductor substrate and at the PN junction 3 of its interface formation.And be positioned at the passivation glass layer that the table top sidewall is coated on the PN junction outside.Wherein, glass passivation layer is being positioned near the PN junction position 2 sectional thickness greater than near the sectional thickness that is positioned at the channel bottom 4.In the present embodiment, the sectional thickness of glass passivation layer near the PN junction position 2 to 4 being to be linear smooth change from big to small near the position of channel bottom.
As shown in the figure, near the glass the PN junction 3 is thick, and the glass of channel bottom 4 is thin.Adopt the mesa glassivation diode chip for backlight unit of this structure, in industrial production, can effectively improve the withstand voltage and the reliability of chip, and can promote the speed of chip cutting.
Claims (2)
1. mesa glassivation diode chip for backlight unit comprises and adopts different doping processs, P type semiconductor and N type semiconductor is produced on the same block semiconductor substrate and the PN junction that forms at its interface; And be positioned at the passivation glass layer that the table top sidewall is coated on the PN junction outside; It is characterized in that near the sectional thickness that described glass passivation layer is positioned at the described PN junction position is positioned near the described channel bottom sectional thickness greater than described glass passivation layer.
2. mesa glassivation diode chip for backlight unit according to claim 1, the sectional thickness that it is characterized in that described glass passivation layer near the described PN junction position near the smooth change of the curved shape from big to small described channel bottom position.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009201201017U CN201413826Y (en) | 2009-05-21 | 2009-05-21 | Mesa type glass passivated diode chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009201201017U CN201413826Y (en) | 2009-05-21 | 2009-05-21 | Mesa type glass passivated diode chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201413826Y true CN201413826Y (en) | 2010-02-24 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009201201017U Expired - Lifetime CN201413826Y (en) | 2009-05-21 | 2009-05-21 | Mesa type glass passivated diode chip |
Country Status (1)
| Country | Link |
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| CN (1) | CN201413826Y (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101982872A (en) * | 2010-10-30 | 2011-03-02 | 强茂电子(无锡)有限公司 | Manufacturing method of grooved diode chip |
| CN102208370A (en) * | 2011-04-29 | 2011-10-05 | 昆山东日半导体有限公司 | Silicon wafer with glass layer formed on surface and manufacture method thereof |
| TWI413184B (en) * | 2010-04-16 | 2013-10-21 | Anova Technologies Co Ltd | Manufacturing method of forming glass layer on silicon wafer surface |
| CN108039346A (en) * | 2017-12-06 | 2018-05-15 | 中电科技集团重庆声光电有限公司 | A kind of high-pressure-resistphotoelectric photoelectric coupler |
| CN114171416A (en) * | 2022-02-14 | 2022-03-11 | 浙江里阳半导体有限公司 | TVS chip and glass passivation method and manufacturing method thereof |
-
2009
- 2009-05-21 CN CN2009201201017U patent/CN201413826Y/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI413184B (en) * | 2010-04-16 | 2013-10-21 | Anova Technologies Co Ltd | Manufacturing method of forming glass layer on silicon wafer surface |
| CN101982872A (en) * | 2010-10-30 | 2011-03-02 | 强茂电子(无锡)有限公司 | Manufacturing method of grooved diode chip |
| CN102208370A (en) * | 2011-04-29 | 2011-10-05 | 昆山东日半导体有限公司 | Silicon wafer with glass layer formed on surface and manufacture method thereof |
| CN102208370B (en) * | 2011-04-29 | 2012-12-12 | 昆山东日半导体有限公司 | Silicon wafer with glass layer formed on surface and manufacture method thereof |
| CN108039346A (en) * | 2017-12-06 | 2018-05-15 | 中电科技集团重庆声光电有限公司 | A kind of high-pressure-resistphotoelectric photoelectric coupler |
| CN108039346B (en) * | 2017-12-06 | 2021-09-07 | 中国电子科技集团公司第四十四研究所 | High-voltage-resistant photoelectric coupler |
| CN114171416A (en) * | 2022-02-14 | 2022-03-11 | 浙江里阳半导体有限公司 | TVS chip and glass passivation method and manufacturing method thereof |
| CN114171416B (en) * | 2022-02-14 | 2022-06-03 | 浙江里阳半导体有限公司 | TVS chip and glass passivation method and manufacturing method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: ZHEJIANG MINGDE MICROELECTRONICS CO., LTD. Free format text: FORMER NAME: SHAOXING RISING-SUN TECHNOLOGY CO., LTD. |
|
| CP03 | Change of name, title or address |
Address after: 312000 Longshan Software Park, Shaoxing Economic Development Zone, Shaoxing, Zhejiang Patentee after: ZHEJIANG MINGDE MICROELECTRONIC CO., LTD. Address before: 312000 Dongshan science and Technology Park, Dongshan Road, Zhejiang, Shaoxing Patentee before: Shaoxing Rising-sun Technology Co., Ltd. |
|
| CX01 | Expiry of patent term |
Granted publication date: 20100224 |
|
| CX01 | Expiry of patent term |