CN201336019Y - Power-failure protecting circuit for programmable controller - Google Patents
Power-failure protecting circuit for programmable controller Download PDFInfo
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- CN201336019Y CN201336019Y CNU2009200376813U CN200920037681U CN201336019Y CN 201336019 Y CN201336019 Y CN 201336019Y CN U2009200376813 U CNU2009200376813 U CN U2009200376813U CN 200920037681 U CN200920037681 U CN 200920037681U CN 201336019 Y CN201336019 Y CN 201336019Y
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Abstract
A power-failure protecting circuit for a programmable controller comprises an input filter circuit and a power-failure detection circuit which are connected in sequence. A front stage and a back stage of an input voltage are separated through the filter circuit; the back stage can add large-volume capacitors to store energy; after the power-failure of a front-stage voltage signal is detected, the stored energy of the back-stage capacitors are utilized to maintain the power supply of the central processing unit (CPU) and a storage device; and meanwhile, according to a status signal of a power supply, the CPU can save memory data in the operating state and rapidly save the data in an external memory device, thereby saving the battery, saving power-failure data in the ultra-long time, and avoiding affecting the data saving due to sudden power failure resulting from the volume and the service life of the battery. The utility model has the advantages of simple and convenient application, lower implementation cost and smaller volume.
Description
Technical field
The utility model relates to programmable controller, relates in particular to a kind of holding circuit of programmable controller.
Background technology
Programmable controller (PLC) is a kind of specially for use the digital operation operating means that designs under industrial environment, the storer that employing can program, being used within it, portion stores the instruction that actuating logic computing, sequential operation, timing, counting and arithmetical operation etc. are operated, and can control various types of machineries or production run by digital or analog input and output.
Data write is finished by the mode of file often in the programmable controller, rather than directly memory unit address is operated.Use the file read-write mode service data, in the operation of equipment process often with the storage space of metadata cache, in internal memory in volatibility.In case the unexpected unexpected power down of system, these data tend to forever lose.Therefore, present most of electronic product and memory device all can add the design of a power down protection, the power-down conditions of preventing this burst in design.The purpose of power down protection is: the equipment that makes loses in accident under the situation of power supply, can guarantee the determinacy of equipment running status and the integrality of record data; After power devices was recovered, field data and device systems state can in time recover, and avoid device losses data or master control confusion reigned.For the design of this power down protection, though it only occupies very little one in total system or product design, its status and effect are very important.
Existing power down protection circuit mostly adopts establishes a Battery pack in addition as standby power supply, drop in the moment of power down, though the realization of the circuit of this design is rationally, and system complex, volume is bigger, realizes that cost is often higher.
The content of utility model
The technical matters that the utility model solves is the power down protection circuit that has proposed a kind of stable performance and simple programmable controller; carrying out the front and back level by the input voltage to programmable controller separates; make it can be under the situation of the unexpected power down of equipment; the power supply of CPU and memory device is kept in the accumulation of energy of level electric capacity after utilizing, and CPU can preserve operating internal storage data according to power-off signal simultaneously.
The technical solution of the utility model is as follows:
The power down protection circuit of programmable controller comprises input filter circuit and power-fail detection circuit, and both are linked in sequence; Input filter circuit is made up of diode D1, electrochemical capacitor CD1, CD5, CD6, the positive pole of diode D1 connects input voltage, its negative pole is as operating voltage, and electrochemical capacitor CD1, CD5 series connection back is in parallel with diode D1, and electrochemical capacitor CD6 is in parallel with electrochemical capacitor CD5; Power-fail detection circuit is by operational amplifier U3A, resistance R 2, R4, R5, R6, R7 forms, wherein an end of resistance R 2 connects operating voltage, the other end is connected with the 2nd pin of operational amplifier U3A, one end of resistance R 4 is connected with the 2nd pin of operational amplifier U3A, other end ground connection, one end of resistance R 5 connects input voltage, the other end is connected with the 3rd pin of operational amplifier U3A, one end of resistance R 7 is connected with the 3rd pin of operational amplifier U3A, other end ground connection, the 1st of operational amplifier U3A, resistance R 6 of series connection between 8 pin, the 8th of operational amplifier U3A, 4 pin are connected with ground with power supply respectively.
Useful technique effect of the present utility model is:
The utility model carries out the front and back level by filtering circuit to input voltage to be separated, and the back level increases large bulk capacitance and carries out accumulation of energy, after magnitude voltage signals drops before detection, utilizes the accumulation of energy of back level electric capacity, keeps the power supply of CPU and memory device; Meanwhile, CPU preserves operating internal storage data according to power state signal, is kept at fast in the external memory part.Thereby saved the use of battery, and the power down data of the ultra-long time of realizing are preserved.Avoided influencing the preservation of data because of battery capacity and the unexpected power down of life relation.Circuit is simple, realizes that cost is lower, and volume is less.
Description of drawings
Fig. 1 is circuit theory diagrams of the present utility model.
Embodiment
Below in conjunction with accompanying drawing embodiment of the present utility model is described further.
As shown in Figure 1, the power down protection circuit of programmable controller comprises input filter circuit and power-fail detection circuit, and both are linked in sequence; Input filter circuit is made up of diode D1, electrochemical capacitor CD1, CD5, CD6, the positive pole of diode D1 connects input voltage, its negative pole is as operating voltage, and electrochemical capacitor CD1, CD5 series connection back is in parallel with diode D1, and electrochemical capacitor CD6 is in parallel with electrochemical capacitor CD5; Power-fail detection circuit is by operational amplifier U3A, resistance R 2, R4, R5, R6, R7 forms, wherein an end of resistance R 2 connects operating voltage, the other end is connected with the 2nd pin of operational amplifier U3A, one end of resistance R 4 is connected with the 2nd pin of operational amplifier U3A, other end ground connection, one end of resistance R 5 connects input voltage, the other end is connected with the 3rd pin of operational amplifier U3A, one end of resistance R 7 is connected with the 3rd pin of operational amplifier U3A, other end ground connection, the 1st of operational amplifier U3A, resistance R 6 of series connection between 8 pin, the 8th of operational amplifier U3A, 4 pin are connected with ground with power supply respectively.
The utility model carries out the front and back level by the diode D1 in the filtering circuit to input voltage to be separated, be separated into input voltage and operating voltage, the operating voltage of back level utilizes large bulk capacitance CD5, CD6 to carry out accumulation of energy, after detection prime input voltage signal drops, utilize the accumulation of energy of back level capacitor C D5, CD6, keep the power supply of CPU and memory device.The model of diode D1 is IN5819 in the present embodiment, CD1=100uF, CD5=CD6=0.047F.
The output signal of operational amplifier U3A is directly proportional output voltage V with the signal voltage difference of two input ends
o=A
o(E
1-E
2), wherein, A
oBe the low frequency open-loop gain of amplifier, E1 is the applied signal voltage of in-phase end (the 3rd pin), and E2 is the applied signal voltage of end of oppisite phase (the 2nd pin).When power down not, in-phase end inserts input voltage, end of oppisite phase cut-in operation voltage, because input voltage is greater than operating voltage, so output voltage is a high level; When power down, because input voltage is less than operating voltage, so output voltage is a low level.The output voltage of operational amplifier as power state signal, is inserted CPU.CPU, preserves operating internal storage data when detecting low level according to power state signal, is kept at fast in the external memory part.The model of operational amplifier U3A is LM393D in the present embodiment, R5=10K Ω, R7=1K Ω, R6=4.7K Ω.
The above chip and electron device are the commercial goods.
Foregoing circuit structure of the present utility model, thus carry out the use that battery has been saved in accumulation of energy by large bulk capacitance, and realize the power down data preservation of ultra-long time.Avoided influencing the preservation of data because of battery capacity and the unexpected power down of life relation.Circuit is simple, realizes that cost is lower, and volume is less.
The above chip model, component parameter and connected mode thereof only are preferred implementations of the present utility model, are appreciated that those skilled in the art under the prerequisite that does not break away from spirit of the present utility model and design, can make other improvement and variation.
Claims (1)
1. the power down protection circuit of a programmable controller is characterized in that comprising input filter circuit and power-fail detection circuit, and both are linked in sequence; Input filter circuit is made up of diode (D1), electrochemical capacitor (CD1), (CD5), (CD6), the positive pole of diode (D1) connects input voltage, its negative pole is as operating voltage, in parallel with diode (D1) after electrochemical capacitor (CD1), (CD5) series connection, electrochemical capacitor (CD6) is in parallel with electrochemical capacitor (CD5); Power-fail detection circuit is by operational amplifier (U3A), resistance (R2), (R4), (R5), (R6), (R7) form, wherein an end of resistance (R2) connects operating voltage, the other end is connected with the 2nd pin of operational amplifier (U3A), one end of resistance (R4) is connected with the 2nd pin of operational amplifier (U3A), other end ground connection, one end of resistance (R5) connects input voltage, the other end is connected with the 3rd pin of operational amplifier (U3A), one end of resistance (R7) is connected with the 3rd pin of operational amplifier (U3A), other end ground connection, the 1st of operational amplifier (U3A), a series connection resistance (R6) between 8 pin, the 8th of operational amplifier (U3A), 4 pin are connected with ground with power supply respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2009200376813U CN201336019Y (en) | 2009-01-22 | 2009-01-22 | Power-failure protecting circuit for programmable controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2009200376813U CN201336019Y (en) | 2009-01-22 | 2009-01-22 | Power-failure protecting circuit for programmable controller |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201336019Y true CN201336019Y (en) | 2009-10-28 |
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ID=41287676
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2009200376813U Expired - Fee Related CN201336019Y (en) | 2009-01-22 | 2009-01-22 | Power-failure protecting circuit for programmable controller |
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| CN (1) | CN201336019Y (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103631677A (en) * | 2013-11-27 | 2014-03-12 | 上海电器科学研究院 | Method for keeping PLC device power-down data |
| CN103744747A (en) * | 2014-01-08 | 2014-04-23 | 东南大学 | Power failure controlling device for programmable logic controller (PLC) |
| CN109792392A (en) * | 2017-04-07 | 2019-05-21 | 深圳市大疆创新科技有限公司 | Protect circuit |
| CN111049256A (en) * | 2019-12-26 | 2020-04-21 | 枣阳市米朗科技有限公司 | Circuit for storing data in case of power failure and data storage method |
-
2009
- 2009-01-22 CN CNU2009200376813U patent/CN201336019Y/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103631677A (en) * | 2013-11-27 | 2014-03-12 | 上海电器科学研究院 | Method for keeping PLC device power-down data |
| CN103631677B (en) * | 2013-11-27 | 2016-07-06 | 上海电器科学研究院 | A kind of method that PLC device power-down data keeps |
| CN103744747A (en) * | 2014-01-08 | 2014-04-23 | 东南大学 | Power failure controlling device for programmable logic controller (PLC) |
| CN109792392A (en) * | 2017-04-07 | 2019-05-21 | 深圳市大疆创新科技有限公司 | Protect circuit |
| CN111049256A (en) * | 2019-12-26 | 2020-04-21 | 枣阳市米朗科技有限公司 | Circuit for storing data in case of power failure and data storage method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20091028 Termination date: 20100222 |