CN203012709U - Serial port debugging circuit between global position system (GPS) equipment and upper computer - Google Patents
Serial port debugging circuit between global position system (GPS) equipment and upper computer Download PDFInfo
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- CN203012709U CN203012709U CN 201220729443 CN201220729443U CN203012709U CN 203012709 U CN203012709 U CN 203012709U CN 201220729443 CN201220729443 CN 201220729443 CN 201220729443 U CN201220729443 U CN 201220729443U CN 203012709 U CN203012709 U CN 203012709U
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Abstract
The utility model relates to an electronic circuit. A serial port debugging circuit between global position system (GPS) equipment and an upper computer is connected between a singlechip interface of the GPS equipment and a serial port terminal of the upper computer. The serial port debugging circuit is characterized in that a third capacitor C3 is connected between a C1+ port and a C1-port of an MAX3232 communication chip U1 in series. A fifth capacitor C5 is connected between a C2+ port and a C2-port of an MAX3232 communication chip U1 in series. A V+port of the MAX3232 communication chip U1 is connected with the first capacitor C1 in series till a positive voltage end VDD3V3 of a direct current power supply. The V-port of the MAX3232 communication chip U1 is connected with a fourth capacitor C4 in series till a ground end GND of the direct current power supply. A VCC port of the MAX3232 communication chip U1 is connected with the positive voltage end VDD3V3 of the direct current power supply. A GND port of the MAX3232 communication chip U1 is connected with the ground end GND of the direct current power supply. A T1IN port and a R1OUT port of the MAX3232 communication chip U1 serve as a communication interface DBG_TXD and a communication interface DBG_RXD, wherein the communication interface DBG_TXD and the communication interface DBG_RXD are connected with the singlechip ports. The T1IN port and the R1OUT port of the MAX3232 communication chip U1 serve as a communication interface RS232_DBG_TXD and a communication interface RS232_DBG_RXD, wherein the communication interface RS232_DBG_TXD and the communication interface RS232_DBG_RXD are connected with series ports of the upper computer. The serial port debugging circuit between the GPS equipment and the upper computer is used for communication debugging between the GPS equipment and the upper computer.
Description
Technical field
The utility model relates to electronic circuit, relates in particular to serial communication circuit, especially for the AccessPort circuit between GPS equipment and host computer.
Background technology
GPS equipment and host computer need to carry out alternately usually, such as the data of updating the equipment, firmware updating version etc.When the single-chip microcomputer of GPS equipment and computing machine were undertaken with communication by RS232, the CMOS logic-level voltages was near supply voltage, and logic level 0 is near 0V.And RS232 logic level 1 is-3V～-15V, logic level 0 is+3V～+ 15V.If level is coupling not, cause communication undesired, or even burn out device.
Summary of the invention
Therefore, for the problems referred to above, the utility model proposes a kind ofly for the AccessPort circuit between GPS equipment and host computer, can allow GPS equipment directly be connected with the serial ports of computing machine.
The following technical scheme of the concrete employing of the utility model:
be used for the AccessPort circuit between GPS equipment and host computer, this AccessPort circuit is connected between the interface microcontroller and host computer serial ports terminal of GPS equipment, this AccessPort circuit is specifically: serial connection one the 3rd capacitor C 3 between the C1+ mouth of a MAX3232 communication chip U1 and C1-mouth, serial connection one the 5th capacitor C 5 between the C2+ mouth of this MAX3232 communication chip U1 and C2-mouth, V+ mouth serial connection one first capacitor C 1 of this MAX3232 communication chip U1 is to direct supply positive voltage terminal VDD3V3, V-mouth serial connection one the 4th capacitor C 4 of this MAX3232 communication chip U1 is to direct current seedbed end GND, the VCC mouth of this MAX3232 communication chip U1 is connected to direct supply positive voltage terminal VDD3V3, the GND mouth of this MAX3232 communication chip U1 is connected to direct current seedbed end GND, the T1IN mouth of this MAX3232 communication chip U1 and R1OUT mouth are as the communication interface DBG_TXD that is connected to one-chip machine port, DBG_RXD, the T1OUT mouth of this MAX3232 communication chip U1 and R1IN mouth are as the communication interface RS232_DBG_TXD that is connected to host computer serial ports terminal, RS232_DBG_RXD.
Further, described communication interface DBG_TXD, DBG_RXD also are connected in series respectively an electrostatic defending chip U2 to ground.
Further, described direct supply positive voltage terminal VDD3V3 is also other meets 3 filter capacitor C2, C6, C7 extremely.
The utility model adopts above-mentioned technical scheme, be used for the AccessPort between GPS equipment and host computer, can allow GPS equipment directly be connected with the serial ports of computing machine, and can not occur not mate because of level, and the communication that causes is undesired, or even burns out the phenomenon generation of device.
Description of drawings
Fig. 1 is the connection diagram of AccessPort circuit of the present utility model and GPS equipment.
Fig. 2 is the circuit theory diagrams of the AccessPort circuit of an embodiment.
Embodiment
Now with embodiment, the utility model is further illustrated by reference to the accompanying drawings.
Consult Fig. 1 and Fig. 2, be used for the AccessPort circuit between GPS equipment and host computer, this AccessPort circuit is connected between the serial ports terminal J1 of the interface microcontroller J2 of GPS equipment and host computer.
consult Fig. 2, the AccessPort circuit of one embodiment is specifically: serial connection one the 3rd capacitor C 3 between the C1+ mouth of a MAX3232 communication chip U1 and C1-mouth, serial connection one the 5th capacitor C 5 between the C2+ mouth of this MAX3232 communication chip U1 and C2-mouth, V+ mouth serial connection one first capacitor C 1 of this MAX3232 communication chip U1 is to direct supply positive voltage terminal VDD3V3, V-mouth serial connection one the 4th capacitor C 4 of this MAX3232 communication chip U1 is to direct current seedbed end GND, the VCC mouth of this MAX3232 communication chip U1 is connected to direct supply positive voltage terminal VDD3V3, the GND mouth of this MAX3232 communication chip U1 is connected to direct current seedbed end GND, the T1IN mouth of this MAX3232 communication chip U1 and R1OUT mouth are as the communication interface DBG_TXD that is connected to one-chip machine port, DBG_RXD, the T1OUT mouth of this MAX3232 communication chip U1 and R1IN mouth are as communication interface RS232_DBG_TXD(the 2nd pin that is connected to host computer serial ports terminal), RS232_DBG_RXD(the 3rd pin), the 5th pin of host computer serial ports terminal is grounding leg.
Preferably, described communication interface DBG_TXD, DBG_RXD also are connected in series respectively an electrostatic defending chip U2 to ground, can be for the protection of interface microcontroller J2.
Preferably, described direct supply positive voltage terminal VDD3V3 is also other meets 3 filter capacitor C2, C6, C7 extremely.Filter capacitor C2 is connected on the VCC mouth position of closing on MAX3232 communication chip U1, and 2 filter capacitor C6, C7 in addition are connected on the position (the 4th pin) of closing on interface microcontroller J2.
In the AccessPort circuit of embodiment, be to adopt proprietary low voltage difference transmitter output stage, utilize dual charge pump can realize real RS-232 performance when 3.0V to 5.5V Power supply, device only needs the outside small size charge pump electric capacity of four 0.1 μ F.MAX3232 communication chip U1 guarantees the data rate at 120kbps, keeps simultaneously the RS-232 output level.MAX3232 communication chip U1 has No. two receivers and two road drivers, and 1 μ A shutdown mode is provided, and effectively reduces effect and postpones the battery of portable product.Under shutdown mode, the receiver state of remaining valid is monitored external unit, only consumes 1 μ a-power supply electric current, and pin, encapsulation and the function of MAX3232 communication chip U1 is compatible with industrial standard MAX242 and MAX232 respectively.Even be operated under high data rate, the minimum transmitter output voltage of the positive and negative 5.0V that MAX3232 communication chip U1 still can keep rs-232 standard to require.As long as input voltage in 3.0V to 5.5V scope, can provide+5.5V(multiplication of voltage charge pump) and-the anti-phase charge pump of 5.5V() output voltage, charge pump is operated in non-continuous mode, in case output voltage lower than 5.5V, will be opened charge pump; Output voltage surpasses 5.5V, can close charge pump, and each charge pump needs one and flies container and a storage capacitor, produces the voltage of V+ and V-.MAX3232 communication chip U1 can guarantee the data rate of 120kbps under the poorest condition of work.Generally, can work in the 235kbps data rate, but a plurality of receivers of transmitter parallel drive.In the circuit of this embodiment, C1, C3, C4, C5 consist of charge pump, realize level match.C2, C6, C7 are to the MAX3232ESE power filtering capacitor.U2 is that an electrostatic defending IC is for the protection of interface.
Although specifically show and introduced the utility model in conjunction with preferred embodiment; but the those skilled in the art should be understood that; within not breaking away from the spirit and scope of the present utility model that appended claims limits; can make a variety of changes the utility model in the form and details, be protection domain of the present utility model.
Claims (3)
1. be used for the AccessPort circuit between GPS equipment and host computer, this AccessPort circuit is connected between the interface microcontroller and host computer serial ports terminal of GPS equipment, this AccessPort circuit is specifically: serial connection one the 3rd capacitor C 3 between the C1+ mouth of a MAX3232 communication chip U1 and C1-mouth, serial connection one the 5th capacitor C 5 between the C2+ mouth of this MAX3232 communication chip U1 and C2-mouth, V+ mouth serial connection one first capacitor C 1 of this MAX3232 communication chip U1 is to direct supply positive voltage terminal VDD3V3, V-mouth serial connection one the 4th capacitor C 4 of this MAX3232 communication chip U1 is to direct current seedbed end GND, the VCC mouth of this MAX3232 communication chip U1 is connected to direct supply positive voltage terminal VDD3V3, the GND mouth of this MAX3232 communication chip U1 is connected to direct current seedbed end GND, the T1IN mouth of this MAX3232 communication chip U1 and R1OUT mouth are as the communication interface DBG_TXD that is connected to one-chip machine port, DBG_RXD, the T1OUT mouth of this MAX3232 communication chip U1 and R1IN mouth are as the communication interface RS232_DBG_TXD that is connected to host computer serial ports terminal, RS232_DBG_RXD.
2. according to claim 1 for the AccessPort circuit between GPS equipment and host computer, it is characterized in that: described communication interface DBG_TXD, DBG_RXD also are connected in series respectively an electrostatic defending chip U2 to ground.
3. according to claim 1 and 2 for the AccessPort circuit between GPS equipment and host computer, it is characterized in that: described direct supply positive voltage terminal VDD3V3 is also other meets 3 filter capacitor C2, C6, C7 extremely.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220729443 CN203012709U (en) | 2012-12-26 | 2012-12-26 | Serial port debugging circuit between global position system (GPS) equipment and upper computer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220729443 CN203012709U (en) | 2012-12-26 | 2012-12-26 | Serial port debugging circuit between global position system (GPS) equipment and upper computer |
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| Publication Number | Publication Date |
|---|---|
| CN203012709U true CN203012709U (en) | 2013-06-19 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220729443 Expired - Fee Related CN203012709U (en) | 2012-12-26 | 2012-12-26 | Serial port debugging circuit between global position system (GPS) equipment and upper computer |
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| CN (1) | CN203012709U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105116760A (en) * | 2015-03-27 | 2015-12-02 | 上海大学 | System for dynamically detecting state of railway retarder based on FPGA |
| CN105159861A (en) * | 2015-08-28 | 2015-12-16 | 上海斐讯数据通信技术有限公司 | Anti-jamming apparatus and method for SPI bus |
| CN105488003A (en) * | 2015-11-24 | 2016-04-13 | 上海斐讯数据通信技术有限公司 | Circuit structure and method for enhancing reliability of RS232 communication interface |
-
2012
- 2012-12-26 CN CN 201220729443 patent/CN203012709U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105116760A (en) * | 2015-03-27 | 2015-12-02 | 上海大学 | System for dynamically detecting state of railway retarder based on FPGA |
| CN105159861A (en) * | 2015-08-28 | 2015-12-16 | 上海斐讯数据通信技术有限公司 | Anti-jamming apparatus and method for SPI bus |
| CN105488003A (en) * | 2015-11-24 | 2016-04-13 | 上海斐讯数据通信技术有限公司 | Circuit structure and method for enhancing reliability of RS232 communication interface |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130619 Termination date: 20151226 |
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| EXPY | Termination of patent right or utility model |