CN201166564Y - Non-contact test system for solar wafer - Google Patents
Non-contact test system for solar wafer Download PDFInfo
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- CN201166564Y CN201166564Y CNU2008200548035U CN200820054803U CN201166564Y CN 201166564 Y CN201166564 Y CN 201166564Y CN U2008200548035 U CNU2008200548035 U CN U2008200548035U CN 200820054803 U CN200820054803 U CN 200820054803U CN 201166564 Y CN201166564 Y CN 201166564Y
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Abstract
The utility model relates to a non-contact measurement system for a solar wafer, which comprises a wafer holding platform which is used for holding a solar wafer, a pair of probes which respectively measure the distances between the upper and the lower surfaces and the probes, and the distances are used to calculate the thickness of the water, a pair of eddy-current type transducers which are used for measuring the variable quantity of the eddy-current field of the wafer can provide the conductance of the wafer, thereby the specific resistance of the wafer can be figured out through combining the obtained conductance and the thickness of the wafer, furthermore, the deviation of the thickness can be obtained through calculating the measured thickness values of different points during calculating the process that the wafer moves between probe transducers, and the system further can conserve the measured data through responding to a data conserving switch. The measurement system of the utility model has the advantages of no contact, one time measurement, rapid speed, accuracy and the like.
Description
Technical field
The utility model relates to the field tests of solar energy grade semiconductor wafer, relates in particular to the solar wafer non-contact type test macro of the measurement of thickness, thickness deviation and the body resistivity that can finish the solar energy grade semiconductor wafer in the single job process.
Background technology
Multiple parameters such as the thickness of solar energy grade wafer, thickness deviation and body resistivity all need through test.For example: solar level wafer manufacturing enterprise need the different links in whole process flow test respectively and monitor the parameters such as thickness, thickness deviation and body resistivity of product wafer especially, satisfies solar industry or client's technical indicator with the wafer product that guarantees finally to dispatch from the factory.And in the market, although have several equipment to distinguish to test separately these parameters, yet can possess characteristics such as multi-functional, reliability, high-level efficiency simultaneously, to satisfy the growing rival demand of solar wafer industry without any a kind of testing apparatus.
Specifically, traditional test mode thickness and the body resistivity that need test the solar level wafer with two kinds of different testing tools respectively.Test thickness is generally with a kind of clock gauge or condenser type thickness measuring instrument that is equipped on the support.And test body resistivity is generally with four point probe formula probe or eddy current sensor type testing tool.The test of solar level wafer generally needs to finish with the thickness measuring instrument earlier the test of thickness, uses the test of resistivity testing tool perfect aspect resistance parameter then.And this mode needs at least two steps to finish, the record of data with mate elapsed time too, simultaneously, the breakage of wafer, fragment rate also can obviously improve, these have all influenced production efficiency greatly.
Therefore, a kind of test and data storage function that can only need single job can finish thickness, thickness deviation, body resistivity, and have both simultaneously fast, accurately, the multifunctional solar energy level wafer testing system of characteristics such as reasonable price become the market demand of enjoying popular confidence.
The utility model content
Technical problem to be solved in the utility model provides a kind of solar wafer non-contact type test macro, only needs a non-contact type to operate the test that can finish thickness, thickness deviation and body resistivity.
The utility model is to solve the problems of the technologies described above the technical scheme that adopts to provide a kind of solar wafer non-contact type test macro, comprises measurement module, signal processing module and control module.Wherein measurement module comprises: a wafer-supporting platform in order to the carrying solar wafer; A pair of probe at a distance of a gauged distance, wherein first probe is with respect to the upper wafer surface setting, to measure first distance of upper wafer surface to the first probe, second probe is provided with respect to the wafer lower surface, to measure the second distance of wafer lower surface to the second probe; And a pair of eddy current sensor, in order to measure the vortex field variable quantity of wafer.Signal processing module is connected in measurement module, is used for the signal of first probe, second probe and eddy current sensor is handled back output.Control module connects signal processing module, in order to calculating wafer thickness according to this gauged distance, first distance and second distance, and calculates slice resistivity according to wafer thickness and vortex field variable quantity.
In above-mentioned solar wafer non-contact type test macro, can have at least one pair of scale mark on the described wafer-supporting platform in order to the calibration chip position.
In above-mentioned solar wafer non-contact type test macro, signal processing module comprises amplification and/or filtering to Signal Processing.
In above-mentioned solar wafer non-contact type test macro, control module is according to formula: wafer thickness=G-(A+B) calculates wafer thickness, and wherein G is described gauged distance, and A is first distance, and B is a second distance.
In above-mentioned solar wafer non-contact type test macro, control module is according to formula:
Calculate slice resistivity, wherein the wafer conductivity is to be converted to according to the vortex field variable quantity.
In above-mentioned solar wafer non-contact type test macro, measurement module also comprises oscillatory circuit, be connected between a pair of eddy current sensor and the signal processing module, in order to the driving source oscillation signal to be provided to eddy current sensor, and produce the current signal that exports signal processing module to according to the vortex field variable quantity that detects.
In above-mentioned solar wafer non-contact type test macro, signal processing module also is connected with a thickness deviation measuring switch, and control module then responds the thickness deviation measuring switch and repeatedly measures wafer thickness and calculated thickness deviation.
In above-mentioned solar wafer non-contact type test macro, signal processing module also is connected with data and preserves switch, and control module has a database and response data and preserves switch and be pressed and wafer thickness, resistivity and thickness deviation are saved in this database.
In above-mentioned solar wafer non-contact type test macro, control module has a display, in order to shows wafer thickness, resistivity and thickness deviation.
The utility model makes it compared with prior art owing to adopt above technical scheme, can obtain the test result of thickness, thickness deviation and the body resistivity of solar level wafer by single stepping simultaneously.Cooperate the once action of switch will finish the data storage of wafer simultaneously.The heed contacted measure that is measured as of the present utility model will reduce greatly to the damage of wafer.
Description of drawings
For above-mentioned purpose of the present utility model, feature and advantage can be become apparent, below in conjunction with accompanying drawing embodiment of the present utility model is elaborated, wherein:
Fig. 1 is the solar wafer test system structure figure of an embodiment of the utility model.
Fig. 2 is the actual test flow chart of test macro shown in Figure 1.
Fig. 3 is the thickness reperformance test result schematic diagram of test macro of the present utility model.
Fig. 4 is the thickness dependence test result synoptic diagram of test macro of the present utility model.
Fig. 5 is the resistivity reperformance test result schematic diagram of test macro of the present utility model.
Fig. 6 is the resistivity correlativity test result synoptic diagram of test macro of the present utility model.
Fig. 7 is thickness reperformance test result schematic diagram when each parameter is measured simultaneously in the test macro of the present utility model.
Fig. 8 is resistivity reperformance test result schematic diagram when each parameter is measured simultaneously in the test macro of the present utility model.
Embodiment
Fig. 1 is the solar wafer test system structure figure of an embodiment of the utility model.Native system is applicable to thickness, thickness deviation and the body resistivity of measuring the solar level semiconductor wafer.We are described in further detail shall know that native system can just can realize that the parameter values such as thickness, thickness deviation and body resistivity to wafer carry out the heed contacted measure of high precision and high reliability by single stepping by following.
As shown in Figure 1, native system has comprised wafer measurement module 1, signal processing module 5 and control module 2, and wherein wafer measurement module 1 is connected with signal processing module 5, and signal processing module 5 links to each other with control module 2.As shown in Figure 1, wafer 10 is the solar level semiconductor wafer, and wafer 10 is generally thin positive square body, and is made by the high-purity semiconductor material (as silicon) with fixed resistance rate scope.Its two surperficial opposing parallel, and physical dimension meets industrial standard.Yet under special application background, semiconductor wafer also can be made other shape according to demand.
Wafer measurement module 1 has comprised a wafer-supporting platform 11 that plays the supporting wafers effect in test process.Generally speaking, wafer-supporting platform 11 is as supporting wafers, but if desired, its also can play calibration chip 10 and probe 131,132 or and eddy current sensor 161,162 between the effect of center.For instance, wafer-supporting platform 11 has two to (promptly 4) scale mark, and purpose is to determine the two-dimensional position of wafer 10.Wherein a pair of scale mark is to set for the wafer that placement is of a size of 125 millimeters of 125 millimeters *, and another is to set for the wafer that placement is of a size of 156 millimeters of 156 millimeters * to scale.These marks can guiding operation person at probe 131,132 or between eddy current sensor 161 and 162, place wafer exactly.And to accurately the laying of wafer, can guarantee in test process, obtain the test result of high duplication.Wafer-supporting platform 11 is square platforms, and its size is bigger a little than 156 millimeters of 156 millimeters *.In any case this wafer-supporting platform is suitable for the measurement of any contour structure size wafer, and this wafer-supporting platform cooperates quite coordination with base station 12.When wafer 10 was positioned over wafer-supporting platform 11, they were between a pair of probe 131,132 formed spacings, and between eddy current sensor 161,162 formed spacings.
According to aforementioned, measurement module 1 measured distance signal (voltage form) is exported by amplifying circuit 133, and measurement module 1 measured vortex field variation value signal (current forms) is exported by oscillatory circuit 163.
Three independently signal processing units are arranged in the signal processing module 5.Wherein signal processing unit 50 is used to handle the distance signal of the voltage form of amplifying circuit 133 outputs, and the processing of being done comprises: after the voltage signals mixing of 131 and 132 outputs of at first will pop one's head in, utilize low-pass filter that signal is carried out Filtering Processing again.And signal processing unit 51 at first is converted to the current signal that oscillatory circuit 163 produces voltage signal and carries out processing and amplifying, utilizes low-pass filter to carry out Filtering Processing again.In addition, signal processing unit 52 is switching signal input interfaces that data are preserved switch 53 and thickness deviation measuring switch 54.At last, the signal of three signal processing units output is transferred to control module 2 and carries out further signal Processing.
Fig. 2 is the schematic flow sheet according to the thickness of measurement semiconductor wafer of the present utility model, thickness deviation and body resistivity.At first, step 60 places wafer on the wafer-supporting platform.And step 61 is to utilize probe 131 to measure first distance A between itself and the upper wafer surface, and step 62 is to utilize probe 132 to measure second distance B between itself and the wafer lower surface.If desired, before measurement, can calibrate probe.Step 63 is calculated for 2 pairs of wafer thicknesses of control module, and computing formula is:
Wafer thickness=G-(A+B)
Wherein G is the gauged distance between the known probe 131 and 132, first distances from upper wafer surface to this probe that A measures for probe 131, the second distances from the wafer lower surface to this probe that B measures for probe 132.
Wherein S is the conductivity of the wafer that records.If required, the numerical value of conductivity also can compensate according to the variation of environment temperature.
After finishing measurement, tested wafer is removed the person of being operated from wafer-supporting platform 11, and the measurement of next wafer will repeat above process.It approximately was 3 seconds that one wafer is measured required time.
As mentioned above, native system is very suitable for the testing requirement of solar industry to the solar level semiconductor wafer: a reasonable price, and possess high speed test wafer thickness, the autonomous system of parameter functions such as thickness deviation and resistivity.Fig. 3～Fig. 7 has showed measuring accuracy and repeatability that native system has.
Fig. 3 carries out 10 thickness measures for native system to same wafer result.The one-tenth-value thickness 1/10 that this wafer is demarcated by metering institute of country is 309.6 microns.As can be seen from the figure, its measuring error is within ± 1 micron.The result of Fig. 4 for the wafer of 5 different-thickness is carried out thickness measure, the thickness distribution scope of wafer does not wait from 300 microns to 700 microns.Used crystal chip is all demarcated and was authenticated by metering institute of country.Fig. 4 is the correlation results between thickness calibration print nominal value and the actual one-tenth-value thickness 1/10 of testing, wherein R
2=1, represent relevant fully.
Fig. 5 carries out 10 resistivity measurements for native system to same wafer result.The resistivity that this wafer is demarcated by metering institute of country is 26.37 ohm-cms.As can be seen from the figure, measuring error is less than 3%.The result of Fig. 6 for 5 wafer are carried out resistivity measurement, the resistivity distribution scope of wafer does not wait to 95 ohm-cms from 1 ohm-cm.Used crystal chip is all demarcated and authentication via metering institute of country.Fig. 6 is the correlation results between resistivity standard sample of photo nominal value and the actual resistivity value of testing, wherein R
2=0.9999, represent almost completely relevant.
Fig. 7 and Fig. 8 carry out thickness and resistivity measurement continuously for native system on same wafer test result.As can be seen from the figure, the thickness deviation of measurement ± 1 micron with interior, resistivity error in 3%.
In sum, test macro of the present utility model can obtain the test result of thickness, thickness deviation and the body resistivity of solar level wafer simultaneously by single stepping.Native system is integrated, and a cover capacitance probe sensor and a cover eddy current type probe sensor are used to measure the thickness and the body resistivity of solar level semiconductor wafer.Thickness deviation and body resistivity deviation obtain by the value of calculating wafer diverse location in the motion track in the probe sensor assembly.The once action of cooperation switch will be finished the data storage of this wafer.Simultaneously, system can be according to the wafer of automatic judgement of the criterion of acceptability of the wafer thickness that sets in advance, thickness deviation and body resistivity and sorting different brackets.The heed contacted measure that is measured as of the present utility model will reduce greatly to the damage of wafer.
Though the utility model discloses as above with preferred embodiment; right its is not in order to limit the utility model; any those skilled in the art; in not breaking away from spirit and scope of the present utility model; when doing a little modification and perfect, therefore protection domain of the present utility model is worked as with being as the criterion that claims were defined.
Claims (9)
1. solar wafer non-contact type test macro is characterized in that comprising:
Measurement module, it comprises:
One wafer-supporting platform in order to the carrying solar wafer;
A pair of probe at a distance of a gauged distance, wherein first probe is with respect to the upper wafer surface setting, to measure first distance of upper wafer surface to the first probe, second probe is provided with respect to the wafer lower surface, to measure the second distance of wafer lower surface to the second probe; And
A pair of eddy current sensor is in order to measure the vortex field variable quantity of wafer;
One signal processing module is connected in measurement module, and the signal of first probe, second probe and eddy current sensor is handled back output; And
One control module connects signal processing module, in order to calculating wafer thickness according to this gauged distance, first distance and second distance, and calculates slice resistivity according to wafer thickness and vortex field variable quantity.
2. solar wafer non-contact type test macro as claimed in claim 1 is characterized in that, has at least one pair of scale mark in order to the calibration chip position on the described wafer-supporting platform.
3. solar wafer non-contact type test macro as claimed in claim 1 is characterized in that, described signal processing module comprises amplification and/or filtering to Signal Processing.
4. solar wafer non-contact type test macro as claimed in claim 1 is characterized in that, described control module is according to formula: wafer thickness=G-(A+B) calculates wafer thickness, and wherein G is described gauged distance, and A is first distance, and B is a second distance.
5. solar wafer non-contact type test macro as claimed in claim 1 is characterized in that, described control module is according to formula:
Calculate slice resistivity, wherein the wafer conductivity is to be converted to according to the vortex field variable quantity.
6. solar wafer non-contact type test macro as claimed in claim 1, it is characterized in that, described measurement module also comprises oscillatory circuit, be connected between a pair of eddy current sensor and the signal processing module, in order to the driving source oscillation signal to be provided to eddy current sensor, and produce the current signal that exports signal processing module to according to the vortex field variable quantity that detects.
7. solar wafer non-contact type test macro as claimed in claim 1, it is characterized in that, described signal processing module also is connected with a thickness deviation measuring switch, and described control module responds the thickness deviation measuring switch and repeatedly measures wafer thickness and calculated thickness deviation.
8. solar wafer non-contact type test macro as claimed in claim 7, it is characterized in that, described signal processing module also is connected with data and preserves switch, and described control module has a database and response data and preserves switch and be pressed and wafer thickness, resistivity and thickness deviation are saved in this database.
9. solar wafer non-contact type test macro as claimed in claim 7 is characterized in that described control module has a display, in order to shows wafer thickness, resistivity and thickness deviation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200548035U CN201166564Y (en) | 2008-01-17 | 2008-01-17 | Non-contact test system for solar wafer |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200548035U CN201166564Y (en) | 2008-01-17 | 2008-01-17 | Non-contact test system for solar wafer |
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| CN201166564Y true CN201166564Y (en) | 2008-12-17 |
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| CNU2008200548035U Expired - Fee Related CN201166564Y (en) | 2008-01-17 | 2008-01-17 | Non-contact test system for solar wafer |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104052398A (en) * | 2014-05-27 | 2014-09-17 | 江苏瑞新科技股份有限公司 | Electrical resistivity eddy current testing method of solar silicon chip |
| CN104569600A (en) * | 2013-10-09 | 2015-04-29 | 新余百川技术有限公司 | Polycrystalline silicon resistivity tester |
| CN104613879A (en) * | 2015-01-19 | 2015-05-13 | 无锡名谷科技有限公司 | Silicon wafer thickness measuring device and measuring method |
| CN105044463A (en) * | 2015-06-29 | 2015-11-11 | 上海大学 | On-line electrical resistivity test system |
| CN105319444A (en) * | 2015-11-27 | 2016-02-10 | 爱德森（厦门）电子有限公司 | Method for assessing conductivity uniformity of conductive material |
| CN104280616B (en) * | 2013-07-12 | 2017-03-22 | 苏州博昇科技有限公司 | Silicon wafer resistivity measurement device and method |
| CN108325863A (en) * | 2018-01-19 | 2018-07-27 | 温州职业技术学院 | The sorting equipment of semiconductor chilling plate integral test system |
| CN108700405A (en) * | 2016-12-06 | 2018-10-23 | 爱思开矽得荣株式会社 | Silicon wafer carrier measurer for thickness |
| CN111246970A (en) * | 2018-04-03 | 2020-06-05 | 应用材料公司 | Polishing apparatus using machine learning and compensation for pad thickness |
| US11780047B2 (en) | 2020-06-24 | 2023-10-10 | Applied Materials, Inc. | Determination of substrate layer thickness with polishing pad wear compensation |
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2008
- 2008-01-17 CN CNU2008200548035U patent/CN201166564Y/en not_active Expired - Fee Related
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104280616B (en) * | 2013-07-12 | 2017-03-22 | 苏州博昇科技有限公司 | Silicon wafer resistivity measurement device and method |
| CN104569600A (en) * | 2013-10-09 | 2015-04-29 | 新余百川技术有限公司 | Polycrystalline silicon resistivity tester |
| CN104052398A (en) * | 2014-05-27 | 2014-09-17 | 江苏瑞新科技股份有限公司 | Electrical resistivity eddy current testing method of solar silicon chip |
| CN104613879A (en) * | 2015-01-19 | 2015-05-13 | 无锡名谷科技有限公司 | Silicon wafer thickness measuring device and measuring method |
| CN105044463A (en) * | 2015-06-29 | 2015-11-11 | 上海大学 | On-line electrical resistivity test system |
| CN105044463B (en) * | 2015-06-29 | 2018-01-02 | 上海大学 | online resistivity test system |
| CN105319444A (en) * | 2015-11-27 | 2016-02-10 | 爱德森（厦门）电子有限公司 | Method for assessing conductivity uniformity of conductive material |
| CN105319444B (en) * | 2015-11-27 | 2017-12-05 | 爱德森（厦门）电子有限公司 | A kind of conductive material electrical conductivity uniformity coefficient appraisal procedure |
| CN108700405B (en) * | 2016-12-06 | 2020-12-25 | 爱思开矽得荣株式会社 | Wafer carrier thickness measuring device |
| CN108700405A (en) * | 2016-12-06 | 2018-10-23 | 爱思开矽得荣株式会社 | Silicon wafer carrier measurer for thickness |
| US11371829B2 (en) | 2016-12-06 | 2022-06-28 | Sk Siltron Co., Ltd. | Wafer carrier thickness measuring device |
| CN108325863B (en) * | 2018-01-19 | 2019-10-18 | 温州职业技术学院 | The sorting equipment of semiconductor chilling plate integral test system |
| CN108325863A (en) * | 2018-01-19 | 2018-07-27 | 温州职业技术学院 | The sorting equipment of semiconductor chilling plate integral test system |
| CN111246970A (en) * | 2018-04-03 | 2020-06-05 | 应用材料公司 | Polishing apparatus using machine learning and compensation for pad thickness |
| US11524382B2 (en) | 2018-04-03 | 2022-12-13 | Applied Materials, Inc. | Polishing apparatus using machine learning and compensation for pad thickness |
| US11780047B2 (en) | 2020-06-24 | 2023-10-10 | Applied Materials, Inc. | Determination of substrate layer thickness with polishing pad wear compensation |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20081217 Termination date: 20160117 |
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| EXPY | Termination of patent right or utility model |