CN201001099Y - Oscillator - Google Patents
Oscillator Download PDFInfo
- Publication number
- CN201001099Y CN201001099Y CNU200620133988XU CN200620133988U CN201001099Y CN 201001099 Y CN201001099 Y CN 201001099Y CN U200620133988X U CNU200620133988X U CN U200620133988XU CN 200620133988 U CN200620133988 U CN 200620133988U CN 201001099 Y CN201001099 Y CN 201001099Y
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- CN
- China
- Prior art keywords
- current
- nmos pipe
- source module
- drain electrode
- current source
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Abstract
The utility model discloses an oscillator, which comprises a current supply module and a phase inverter chain; wherein the current output end of the current supply module is respectively outputted an N way current to provide a load current for the phase inverter chain, the N way current of the input end of the current supply module provides a discharging current for the phase inverter chain. The oscillator of the utility model has strong anti interference capacity, the oscillating frequency of the oscillator changes following the change of the power voltage, the applied circuit is simple and the cost is low.
Description
Technical field
The utility model relates to the high oscillator of a kind of anti-jam frequency stability, belongs to electronic technology field.
Background technology
At present in needing the chip of integrated oscillator, adopt two kinds of schemes: 1. the oscillator of external oscillation resistance, as shown in Figure 1, in frame of broken lines inside was placed in chip among the figure, resistance R placed outside the chip more.Can be by changing the frequency of oscillation that external resistance changes oscillator, but do like this and just a pin need be drawn out to chip exterior and be used for connecting non-essential resistance, in the more serious applied environment of some interference ratio, as motor driven, high static environment etc., external disturbance enters chip internal by this pin easily, makes oscillator high-frequency noise occur, causes the unstable or deadlock of system works.2. ring oscillator as shown in Figure 2, all is integrated in chip internal, and frequency is bigger with change in voltage, and frequency can not change.
The utility model content
In order to address the above problem, the utility model provides a kind of oscillator, and it comprises a current source module and a chain of inverters; One end of current source module is connected to voltage source; The current output terminal of current source module is exported N road electric current respectively, for chain of inverters provides load current; The N road electric current of the current input terminal of current source module provides discharging current for chain of inverters.
Each road load current Io1, Io2 of the current output terminal of current source module ... IoN equates; Each road confession discharge stream Ii1, Ii2 of the chain of inverters of current input terminal ... IiN equates.
N is more than or equal to 3.
Current source module comprises a resistance R
EXTThe one end is connected to voltage source V DD, the other end links to each other with the drain electrode of NMOS pipe M3, the source ground of NMOS pipe M3, and the grid of NMOS pipe M3 connects its drain electrode, be connected to the grid of NMOS pipe M4 simultaneously, the source ground of NMOS pipe M4, the drain electrode of NMOS pipe M4 are connected to the source electrode of M0 in the output circuit part of current source module, the output circuit part of current source module comprise PMOS pipe M1, M11, M21 ... MN1, form current mirror with M0 respectively, their drain electrode is connected to voltage source V DD; The source electrode of M1 is connected to the drain electrode of the NMOS pipe M5 in the input circuit part of current source module, M11, M21 ... drain electrode output current Io1, the Io2 of MN1 ... IoN; The source electrode of NMOS pipe M3, M4 links to each other with the input circuit part of current source module, M12, M22 ... MN2 forms current mirror with M5 respectively, their source ground, M12, M22 ... drain electrode input current Ii1, the Ii2 of MN2 ... IiN.
The breadth length ratio of NMOS pipe M3 and M4 equates.
The output circuit part M0 of current source module, M1 and M11, M21 ... the breadth length ratio of MN1 equates.
The NMOS pipe M5 of the input circuit part of current source module and M12, M22 ... the breadth length ratio of MN2 equates with NMOS pipe M3, M4.
Current source module is an anti-interference current source module, comprises that also a protective resistance R0, PMOS pipe M2, capacitor C 0: protective resistance R0 one end are connected to resistance R
EXT, the other end links to each other with the drain electrode of NMOS pipe M3; Between the output circuit part of the drain electrode of NMOS pipe M4 and current source module, add PMOS and manage M2, its source electrode is connected to the drain electrode of NMOS pipe M4, grid meets power vd D, drain electrode connects the source electrode of M0 in the current source module, PMOS pipe M1, the M11 of the output circuit part of current source module, M21 ... MN1 forms current mirror with M0 respectively, their drain electrode is connected to voltage source V DD, the source electrode of M1 is connected to the drain electrode of the NMOS pipe M5 in the input circuit part of current source module, M11, M21 ... drain electrode output current Io1, the Io2 of MN1 ... IoN; M4 is in parallel for capacitor C 0 and NMOS pipe, the drain electrode of one termination NMOS pipe M4, and other end ground connection is connected to the source electrode of NMOS pipe M3, M4 simultaneously and links to each other with the input circuit part of current source; The source electrode of NMOS pipe M3, M4 links to each other with the input circuit part of current source module, M12, M22 ... MN2 forms current mirror with M5 respectively, their source ground, M12, M22 ... drain electrode input current Ii1, the Ii2 of MN2 ... IiN.
Chain of inverters comprises the N level, in the 1st grade, the drain electrode of one PMOS pipe M13 is connected to voltage source V DD, its source electrode connects a current input terminal of current source module, input current is Io1, one road current output terminal of current source module is connected to the drain electrode of NMOS pipe M14 simultaneously, electric current is output as Ii1, the source ground of NMOS pipe M14, one end of one capacitor C 1 is connected to the source electrode of PMOS pipe M13 and the grid of NMOS pipe M14, other end ground connection, the drain electrode of the termination NMOS pipe M14 of an inverter IV1, the grid of the PMOS pipe M23 in the next stage that the other end connects; In like manner, comprise PMOS pipe M23, NMOS pipe M24 in the 2nd grade, capacitor C 2, each element connected mode is identical with the 1st grade, and inverter IV2 is connected to the grid of the PMOS pipe of 3rd level; Successively to the N level, comprise PMOS pipe MN3, NMOS pipe MN4 among the N, capacitor C N, each element connected mode is identical with the 1st grade, the grid of PMOS pipe M13 is connected to the output of the inverter IVN of N level in the 1st grade, simultaneously by an inverter IVF clock signal.
NMOS pipe M14, the M24 of chain of inverters ... NMOS pipe M3, M4 in the breadth length ratio of MN4 and the current source module equate.
The capacitor C 1 of chain of inverters, C2 ... the capacitance of CN equates.
The utility model advantage is that antijamming capability is strong, and frequency of oscillation is with the little RC oscillator of mains voltage variations, and application circuit is simple, and cost is low.In addition, this oscillator has improved the frequency stability of frequency of oscillation with power source change, and when power supply had interference and fluctuation, oscillator can keep stable frequency of oscillation like this
By below in conjunction with the accompanying drawing description of the preferred embodiment of the present invention, other characteristics of the present invention, purpose and effect will become clear more and easy to understand.
Description of drawings
Fig. 1 is a kind of RC oscillator that generally uses;
Fig. 2 is a kind of ring oscillator that generally uses;
Fig. 3 is the structured flowchart of oscillator that the utility model provides;
Fig. 4 is the circuit theory diagrams of current source module in the structured flowchart shown in Figure 3;
Fig. 5 is the circuit theory diagrams of anti-interference current source module for current source module;
Fig. 6 is the circuit theory diagrams of chain of inverters in the structural representation shown in Figure 3;
In all above-mentioned accompanying drawings, identical label represents to have identical, similar or corresponding feature or function.
Embodiment
Embodiment one
A kind of oscillator that the utility model provides, it comprises current source module and chain of inverters, as shown in Figure 3.
Current source module in the oscillator as shown in Figure 4, current source module comprises a resistance R
EXTThe one end is connected to voltage source V DD, the other end links to each other with the drain electrode of NMOS pipe M3, the source ground of NMOS pipe M3, the grid of NMOS pipe M3 connects its drain electrode, be connected to the grid of NMOS pipe M4 simultaneously, the source ground of NMOS pipe M4, the drain electrode of NMOS pipe M4 is connected to the source electrode of M0 in the output circuit part of current source module, the PMOS pipe M1 of the output circuit part of current source module, M11, M21, MN1 forms current mirror with M0 respectively, their drain electrode is connected to voltage source V DD, the source electrode of M1 is connected to the drain electrode of the NMOS pipe M5 in the input circuit part of current source module, M11, M21, the drain electrode output current Io1 of MN1, Io2, IoN; The source electrode of NMOS pipe M3, M4 links to each other with the input circuit part of current source module, M12, M22 ... MN2 forms current mirror with M5 respectively, their source ground, M12, M22 ... drain electrode input current Ii1, the Ii2 of MN2 ... IiN.The breadth length ratio of NMOS pipe M3 and M4 equates, form current mirror, so the conducting electric current of M4 is I
DS (M4), I
DS (M4)=I
REFI
REFBe resistance R
EXTThe electric current at place; The conducting electric current of M0 is I
DS (M0), I
DS (M0)=I
REF
Wherein,
I
REF＝(V
DD-V
GS(M3))/R
EXT
Wherein, V
GS (M3)Be the cut-ff voltage of NMOS pipe M3, V
DDMagnitude of voltage for voltage source V DD.
The output circuit part of current source module comprise PMOS pipe M0, M1, M11, M12 ... MN1, their breadth length ratio is identical, M0 and M1, M11, M12 ... MN1 forms current mirror, therefore, and output current Io1=Io2=...=IoN=I
DS (M1)=I
DS (M0)=I
REF(I
DS (M1)Conducting electric current for PMOS pipe M1).The input circuit part of current source module comprise NMOS pipe M5, M12, M22 ... MN2, their breadth length ratio is identical, M5 and M12, M22 ... MN2 forms current mirror, therefore, and input current Ii1=Ii2=...=IiN=I
DS (M5)=I
REF(I
DS (M5)Conducting electric current for NMOS pipe M5).
Fig. 6 is the circuit theory diagrams of chain of inverters.The frequency of oscillation of chain of inverters is smaller with mains voltage variations.Select NMOS pipe M14, M24 ... the breadth length ratio of MN4 and NMOS pipe M3, M4, M4, M12, M22 ... MN2 is identical, and M14 and Io1 equivalence are an inverter like this, and it is exported at V
GS (M14)≈ V
GS (M4)=V
GS (M3)In time, overturn.In like manner, M24 and Io2 ... MN4 and IoN equivalence are inverter, respectively at V
GS (M24)≈ V
GS (M4)=V
GS (M3)... V
GS (MN4)≈ V
GS (M4)=V
GS (M3)In time, overturn.Select PMOS pipe M13, M23 ... the breadth length ratio of MN3 make capacitor C 1, C2 ... the charging interval of CN is far smaller than discharge time, C1=C2=...=CN.Like this T cycle of oscillation of chain of inverters be C1 discharge time, C2 discharge time ... reach the CN summation of discharge time.Formula is: T=N (V
DD-V
GS (M3)) * C1/I
REF,
Work as I
REF=(V
DD-V
GS (M3))/R
EXTThe time,
T＝NR
EXTC1
As mentioned above as can be seen, cycle of oscillation T and supply voltage V
DDIrrelevant.Be that frequency of oscillation keeps stablizing constant with voltage fluctuation substantially.
Embodiment two
If current source module is the circuit among Fig. 4, if then in resistance R
EXTThe place has voltage fluctuation to enter, electric current I
REFFluctuation with voltage changes, and causes the output current of current source module and input current all to change thereupon.For guaranteeing stable output and the input of current source module, we improve current source module, make it to have jamproof function.
As shown in Figure 5, on the basis of Fig. 4 current source module, protective resistance R0, PMOS pipe M2, capacitor C 0 have been added.Protective resistance R0 one end is connected to resistance R
EXT, the other end links to each other with the drain electrode of NMOS pipe M3; Between the output circuit part of the drain electrode of NMOS pipe M4 and current source module, add PMOS and manage M2, its source electrode is connected to the drain electrode of NMOS pipe M4, grid meets power vd D, drain electrode connects the source electrode of M0 in the current source module, PMOS pipe M1, the M11 of the output circuit part of current source module, M21 ... MN1 forms current mirror with M0 respectively, their drain electrode is connected to voltage source V DD, the source electrode of M1 is connected to the drain electrode of the NMOS pipe M5 in the input circuit part of current source module, M11, M21 ... drain electrode output current Io1, the Io2 of MN1 ... IoN; M4 is in parallel for capacitor C 0 and NMOS pipe, the drain electrode of one termination NMOS pipe M4, and other end ground connection is connected to the source electrode of NMOS pipe M3, M4 simultaneously and links to each other with the input circuit part of current source; The source electrode of NMOS pipe M3, M4 links to each other with the input circuit part of current source module, M12, M22 ... MN2 forms current mirror with M5 respectively, their source ground, M12, M22 ... drain electrode input current Ii1, the Ii2 of MN2 ... IiN.Resistance R
EXTThe electric current at place is I
REF:
I
REF＝(V
DD-V
GS(M3))/(R
EXT+R0)。
Like this as voltage fluctuation from the current source module resistance R
EXTAfter entering,, interference magnitude is reduced earlier through the pressure drop of protective resistance R0; NMOS pipe M4, PMOS pipe M2 and capacitor C 0 constitute T type filter network, and High-frequency Interference is filtered significantly.
The chain of inverters circuit is given unnecessary details still as shown in Figure 6 no longer one by one.
Work as I
REF=(V
DD-V
GS (M3))/(R
EXT+ R0) time,
T＝N(R
EXT+R0)C1
As mentioned above as can be seen, cycle of oscillation T and supply voltage V
DDIrrelevant.Be that frequency of oscillation keeps stablizing constant with voltage fluctuation substantially.
The results showed, work as resistance R
EXTAn amplitude is arranged is 200V at the place, and the rise time is when being the interference of 30ns, to the influence of frequency of oscillation is:
1) do not have the oscillator of anti-interference function, frequency of oscillation will improve 10 times, and the duration is 5 μ s;
2) and if oscillator when jamproof function is arranged, frequency of oscillation can improve 2 times, the duration is 1 μ s.
This shows that will guarantee the stable of frequency of oscillation, oscillator preferably should have good interference free performance.
Need to prove that most preferred embodiment of the present utility model is N=3, but the utility model also can be realized stable concussion frequency when N＞3.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (11)
1. an oscillator comprises a current source module and a chain of inverters;
It is characterized in that: an end of current source module is connected to voltage source; The current output terminal of current source module is exported N road electric current respectively, for chain of inverters provides load current; The N road electric current of the current input terminal of current source module provides discharging current for chain of inverters.
2. oscillator according to claim 1 is characterized in that: each road load current Io1, Io2 of the current output terminal of described current source module ... IoN equates; Each road confession discharge stream Ii1, Ii2 of the chain of inverters of current input terminal ... IiN equates.
3. according to the oscillator described in the claim 1, it is characterized in that: N is more than or equal to 3.
4. according to the oscillator described in the claim 1, it is characterized in that: described current source module comprises a resistance R
EXTThe one end is connected to voltage source V DD, the other end links to each other with the drain electrode of NMOS pipe M3, the source ground of NMOS pipe M3, and the grid of NMOS pipe M3 connects its drain electrode, be connected to the grid of NMOS pipe M4 simultaneously, the source ground of NMOS pipe M4, the drain electrode of NMOS pipe M4 are connected to the source electrode of M0 in the output circuit part of current source module, the output circuit part of current source module comprise PMOS pipe M1, M11, M21 ... MN1, form current mirror with M0 respectively, their drain electrode is connected to voltage source V DD; The source electrode of M1 is connected to the drain electrode of the NMOS pipe M5 in the input circuit part of current source module, M11, M21 ... drain electrode output current Io1, the Io2 of MN1 ... IoN; The source electrode of NMOS pipe M3, M4 links to each other with the input circuit part of current source module, M12, M22 ... MN2 forms current mirror with M5 respectively, their source ground, M12, M22 ... drain electrode input current Ii1, the Ii2 of MN2 ... IiN.
5. oscillator according to claim 4 is characterized in that: NMOS pipe M3 wherein and the breadth length ratio of M4 equate.
6. oscillator according to claim 4 is characterized in that: the output circuit part M0 of described current source module, M1 and M11, M21 ... the breadth length ratio of MN1 equates.
7. oscillator according to claim 4 is characterized in that: the NMOS pipe M5 of the input circuit part of described current source module and M12, M22 ... the breadth length ratio of MN2 equates with NMOS pipe M3, M4.
8. according to claim 1 or 4 described oscillators, it is characterized in that: current source module wherein is an anti-interference current source module, comprises that also a protective resistance R0, PMOS pipe M2, capacitor C 0: protective resistance R0 one end are connected to resistance R
EXT, the other end links to each other with the drain electrode of NMOS pipe M3; Between the output circuit part of the drain electrode of NMOS pipe M4 and current source module, add PMOS and manage M2, its source electrode is connected to the drain electrode of NMOS pipe M4, grid meets power vd D, drain electrode connects the source electrode of M0 in the current source module, PMOS pipe M1, the M11 of the output circuit part of current source module, M21 ... MN1 forms current mirror with M0 respectively, their drain electrode is connected to voltage source V DD, the source electrode of M1 is connected to the drain electrode of the NMOS pipe M5 in the input circuit part of current source module, M11, M21 ... drain electrode output current Io1, the Io2 of MN1 ... IoN; M4 is in parallel for capacitor C 0 and NMOS pipe, the drain electrode of one termination NMOS pipe M4, and other end ground connection is connected to the source electrode of NMOS pipe M3, M4 simultaneously and links to each other with the input circuit part of current source; The source electrode of NMOS pipe M3, M4 links to each other with the input circuit part of current source module, M12, M22 ... MN2 forms current mirror with M5 respectively, their source ground, M12, M22 ... drain electrode input current Ii1, the Ii2 of MN2 ... IiN.
9. according to the RC oscillator described in the claim 1, it is characterized in that: described chain of inverters comprises the N level, in the 1st grade, the drain electrode of one PMOS pipe M13 is connected to voltage source V DD, its source electrode connects a current input terminal of current source module, input current is Io1, one road current output terminal of current source module is connected to the drain electrode of NMOS pipe M14 simultaneously, electric current is output as Ii1, the source ground of NMOS pipe M14, an end of a capacitor C 1 are connected to the source electrode of PMOS pipe M13 and the grid of NMOS pipe M14, other end ground connection, the drain electrode of the termination NMOS pipe M14 of an inverter IV1, the grid of the PMOS pipe M23 in the next stage that the other end connects; In like manner, comprise PMOS pipe M23, NMOS pipe M24 in the 2nd grade, capacitor C 2, each element connected mode is identical with the 1st grade, and inverter IV2 is connected to the grid of the PMOS pipe of 3rd level; Successively to the N level, comprise PMOS pipe MN3, NMOS pipe MN4 among the N, capacitor C N, each element connected mode is identical with the 1st grade, the grid of PMOS pipe M13 is connected to the output of the inverter IVN of N level in the 1st grade, simultaneously by an inverter IVF clock signal.
10. according to the oscillator described in the claim 9, it is characterized in that: NMOS pipe M14, the M24 of described chain of inverters ... NMOS pipe M3, M4 in the breadth length ratio of MN4 and the current source module equate.
11. the oscillator according to described in the claim 9 is characterized in that: the capacitor C 1 of described chain of inverters, C2 ... the capacitance of CN equates.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU200620133988XU CN201001099Y (en) | 2006-10-08 | 2006-10-08 | Oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU200620133988XU CN201001099Y (en) | 2006-10-08 | 2006-10-08 | Oscillator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201001099Y true CN201001099Y (en) | 2008-01-02 |
Family
ID=39015500
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU200620133988XU Expired - Lifetime CN201001099Y (en) | 2006-10-08 | 2006-10-08 | Oscillator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201001099Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102237859A (en) * | 2010-05-07 | 2011-11-09 | 旺宏电子股份有限公司 | Oscillator with frequency determined by relative magnitudes of current sources |
| CN102739197A (en) * | 2012-07-17 | 2012-10-17 | 杭州士兰微电子股份有限公司 | RC (remote control) annular oscillator and voltage regulating method thereof |
-
2006
- 2006-10-08 CN CNU200620133988XU patent/CN201001099Y/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102237859A (en) * | 2010-05-07 | 2011-11-09 | 旺宏电子股份有限公司 | Oscillator with frequency determined by relative magnitudes of current sources |
| US8836435B2 (en) | 2010-05-07 | 2014-09-16 | Macronix International Co., Ltd. | Oscillator with frequency determined by relative magnitudes of current sources |
| CN102237859B (en) * | 2010-05-07 | 2015-04-15 | 旺宏电子股份有限公司 | Oscillator with frequency determined by relative magnitudes of current sources |
| CN102739197A (en) * | 2012-07-17 | 2012-10-17 | 杭州士兰微电子股份有限公司 | RC (remote control) annular oscillator and voltage regulating method thereof |
| CN102739197B (en) * | 2012-07-17 | 2015-08-19 | 杭州士兰微电子股份有限公司 | A kind of RC ring oscillator and voltage adjusting method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term |
Granted publication date: 20080102 |
|
| EXPY | Termination of patent right or utility model | ||
| DD01 | Delivery of document by public notice |
Addressee: Beijing Sigma Hexin Micro-electronic Technology Co., Ltd. Document name: Notification of Expiration of Patent Right Duration |