CN1983529A - Method for ion implantation of high-voltage transistor LDD - Google Patents

Method for ion implantation of high-voltage transistor LDD Download PDF

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Publication number
CN1983529A
CN1983529A CN 200510111433 CN200510111433A CN1983529A CN 1983529 A CN1983529 A CN 1983529A CN 200510111433 CN200510111433 CN 200510111433 CN 200510111433 A CN200510111433 A CN 200510111433A CN 1983529 A CN1983529 A CN 1983529A
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China
Prior art keywords
ldd
ion implantation
ion
grid
injects
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Pending
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CN 200510111433
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Chinese (zh)
Inventor
钱文生
胡君
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Hua Hong NEC Electronics Co Ltd
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Priority to CN 200510111433 priority Critical patent/CN1983529A/en
Publication of CN1983529A publication Critical patent/CN1983529A/en
Pending legal-status Critical Current

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Abstract

The invention is concerned with the method of high-pressured transistor LDD ion implantation, it is: separates the multi-times LDD ion implantation during the high-pressured parts technics, processes the high-energy ion implantation before forming the silicon oxidation sidewall of the grid, the low-energy ion implantation finishes after the silicon oxidation sidewall of the grid, in order that the fold area of the LDD and the grid adulterates slightly, increases the breakdown potential of the LDD knot, decreases heat carrier effect, improves the reliability of the parts, the threshold value voltage and saturation current of the parts maintains steadily because the adulterating thickness between the sidewall and the active leaking is steadiness.

Description

The method that the high-voltage transistor LDD ion injects
Technical field
The present invention relates to the method that a kind of transistor ion injects, the method that especially a kind of high-voltage transistor LDD (Lightly Doped Drain, lightly-doped source leaks) ion injects.
Background technology
High tension apparatus need have sufficiently high puncture voltage, no matter is raceway groove or source-and-drain junction therefore, and its puncture voltage is all had higher requirement.Improve the raceway groove puncture voltage and generally can finish by increasing channel length, the puncture voltage that increases source-and-drain junction then needs to leak by lightly-doped source the ion injection of (LDD), realizes to obtain darker progressive junction.Under the long certain situation of grid, increasing length of effective channel is conflicting with deepening the LDD junction depth, therefore in the high tension apparatus design, satisfies the LDD junction breakdown voltage earlier, selects enough grid to cover with sufficient raceway groove again and punctures.It all is to constitute by energy repeatedly injection from high to low usually that the LDD ion injects, and all is to finish before grid form in the common process, and repeatedly injects and finish continuously.As shown in Figure 1, existing method is carried out twice energy LDD ion injection from high to low earlier, forms the monox lateral wall of grid afterwards, carries out the source then and leaks ion injection and annealing process.This technology forms laterally Impurity Distribution uniformly in the LDD zone.The transistor that this method is made can't further improve its puncture voltage, and because hot carrier's effect, its reliability neither be fine.
Summary of the invention
Technical problem to be solved by this invention provides the method that a kind of high-voltage transistor LDD ion injects, make this method can increase the puncture voltage of LDD knot, can also reduce hot carrier's effect, improve the reliability of device, guarantee that simultaneously the threshold voltage of device and saturation current will remain unchanged substantially.
For solving the problems of the technologies described above, the technical scheme of the method that high-voltage transistor LDD ion of the present invention injects is to comprise the steps:
(1) carries out the LDD ion injection first time;
(2) the silicon nitride side wall of grid forms;
(3) carry out the LDD ion injection second time;
(4) ion injection and annealing are leaked in the source;
The energy of LDD ion injection for the first time will be higher than the energy of step (3) LDD ion injection for the second time in the described step (1).
The invention enables LDD lighter doping to be arranged, can increase the puncture voltage of LDD knot, can also reduce hot carrier's effect, improve the reliability of device at crossover region with grid; Because the doping content between side wall and source leakage is constant, the threshold voltage of device and saturation current will remain unchanged substantially simultaneously.
Description of drawings
Below in conjunction with drawings and Examples the present invention is further described:
Fig. 1 is the flow chart of existing high-voltage transistor LDD ion injection method;
Fig. 2 is the flow chart of high-voltage transistor LDD ion injection method of the present invention;
Fig. 3 is for carrying out the preflood device architecture figure of ion;
Fig. 4 carries out the schematic diagram of LDD ion injection for the first time for the present invention;
The schematic diagram that Fig. 5 forms for gate oxidation silicon side wall of the present invention;
Fig. 6 carries out the schematic diagram of LDD ion injection for the second time for the present invention;
Fig. 7 leaks the schematic diagram that ion injects for the present invention carries out the source;
Fig. 8 is the device architecture figure after method of the present invention is handled;
Fig. 9 and Figure 10 are the partial enlarged drawing of device;
Figure 11 is the boron concentration and the vertical relation of the degree of depth in the device;
Figure 12 is the electric field strength and the vertical relation of the degree of depth in device;
Reference numeral is among the figure, 1. silicon substrate; 2.PN junction interface; 3. gate oxidation silicon; 4. polysilicon; 5. monox lateral wall; 6. photoresist; 7. the position injected of ion; 8. local amplifier section.
Embodiment
The method that high-voltage transistor LDD ion of the present invention injects, its flow chart can specifically comprise four steps referring to Fig. 2.Figure 3 shows that and do not carry out the device architecture that ion injects as yet, it comprises following silicon substrate 1, gate oxidation silicon 3 and polysilicon 4.For this device, carry out the LDD ion injection first time earlier, the element of injection is a boron, and the dosage that injects boron is 30kev, and energy is 6e12, and through after this step, PN junction interface 2 can deform, as shown in Figure 4.Form the silicon nitride side wall 5 of grid again, as shown in Figure 5.Carry out the LDD ion injection second time then, the element of injection is still boron, and the dosage that injects boron is 10kev, and energy is 5e12, and as shown in Figure 6, the energy that this LDD ion injects will be lower than the energy of LDD ion injection for the first time.Carry out the source at last and leak ion injection and annealing, as shown in Figure 7, on device, coat photoresist 6, carry out ion afterwards and inject.
In the high tension apparatus of routine, after the polysilicon deposit is finished, usually adopt the repeatedly injection from high to low of continuous energy to form darker lightly-doped source drain junction (Fig. 1 uses twice injection), and between leak in the source, keep bigger LDD zone, to increase the puncture voltage of source-and-drain junction.
Among the present invention, under the long certain situation of grid, by adjusting the order that LDD injects, a LDD who carries out higher-energy before monox lateral wall injects, after forming monox lateral wall, carrying out more low-energy repeatedly LDD ion again injects, make LDD lighter doping be arranged at crossover region with grid, can increase the puncture voltage of LDD knot, improve the raceway groove breakdown characteristics of device, can also reduce hot carrier's effect, improve the reliability of device, because the doping content between side wall and source leakage is constant, fundamental characteristics such as the threshold voltage of device and saturation current will remain unchanged substantially simultaneously.
In Fig. 9, near the zone its monox lateral wall 8 is amplified, as shown in figure 10.Along longitudinally line orientations is downward by silicon chip surface among Figure 10, can obtain as Fig. 9 and boron ion concentration shown in Figure 10 and transverse electric field intensity relation with vertical change in depth.
As seen from Figure 9, through processing of the present invention, the overlapping region of LDD and grid has lighter doping, and puncture voltage is brought up to 18.6V from 17.7V, and LDD has had bigger improvement.In addition, as can be seen from Figure 10, through processing of the present invention, near the drain electrode field intensity reduces to some extent, has reduced hot carrier's effect effectively, has improved the reliability of device, simultaneously because the doping content between side wall and source leakage is constant, and the relative LDD length of lateral wall width is less relatively, and is little to the threshold voltage and the saturation current influence of device, shown in the following table.
Threshold voltage Saturation current Puncture voltage
Former technology 0.979V 278uA 17.7V
New technology 0.978V 265uA 18.6V

Claims (4)

1. the method that the high-voltage transistor LDD ion injects is characterized in that, comprises the steps:
(1) carries out the LDD ion injection first time;
(2) the silicon nitride side wall of grid forms;
(3) carry out the LDD ion injection second time;
(4) ion injection and annealing are leaked in the source;
The energy of LDD ion injection for the first time will be higher than the energy of step (3) LDD ion injection for the second time in the described step (1).
2. the method that high-voltage transistor LDD ion according to claim 1 injects is characterized in that, the element that ion injects is a boron.
3. the method that high-voltage transistor LDD ion according to claim 1 injects is characterized in that, the dosage of LDD boron ion implantation is 30kev for the first time, and energy is 6e12.
4. the method that high-voltage transistor LDD ion according to claim 1 injects is characterized in that, the dosage of LDD boron ion implantation is 10kev for the second time, and energy is 5e12.
CN 200510111433 2005-12-13 2005-12-13 Method for ion implantation of high-voltage transistor LDD Pending CN1983529A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200510111433 CN1983529A (en) 2005-12-13 2005-12-13 Method for ion implantation of high-voltage transistor LDD

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200510111433 CN1983529A (en) 2005-12-13 2005-12-13 Method for ion implantation of high-voltage transistor LDD

Publications (1)

Publication Number Publication Date
CN1983529A true CN1983529A (en) 2007-06-20

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Application Number Title Priority Date Filing Date
CN 200510111433 Pending CN1983529A (en) 2005-12-13 2005-12-13 Method for ion implantation of high-voltage transistor LDD

Country Status (1)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101935824B (en) * 2009-07-03 2013-03-06 中芯国际集成电路制造(上海)有限公司 Ion injection method, equipment and method for forming light-dope structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101935824B (en) * 2009-07-03 2013-03-06 中芯国际集成电路制造(上海)有限公司 Ion injection method, equipment and method for forming light-dope structure
US8466050B2 (en) 2009-07-03 2013-06-18 Semiconductor Manufacturing International (Shanghai) Corporation Method for dual energy implantation for ultra-shallow junction formation of MOS devices
US9024281B2 (en) 2009-07-03 2015-05-05 Semiconductor Manufacturing International (Shanghai) Corporation Method for dual energy implantation for ultra-shallow junction formation of MOS devices

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