CN1983204A - Device and method for correcting and repairing BIOS function by LPC interface - Google Patents
Device and method for correcting and repairing BIOS function by LPC interface Download PDFInfo
- Publication number
- CN1983204A CN1983204A CN 200510134461 CN200510134461A CN1983204A CN 1983204 A CN1983204 A CN 1983204A CN 200510134461 CN200510134461 CN 200510134461 CN 200510134461 A CN200510134461 A CN 200510134461A CN 1983204 A CN1983204 A CN 1983204A
- Authority
- CN
- China
- Prior art keywords
- bios
- computer system
- repair
- lpc interface
- debugging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Stored Programmes (AREA)
Abstract
An error-removal device using LPC interface and enabling to repair BIOS is prepared as electric-connecting LPC interface to decoder and firmware center as well as display unit, obtaining POST code of computer system to monitor switch-on state of computer system and to display each switch-on step of computer system by decoder through LPC interface, providing back-up BIOS to switch computer system on and to repair damaged original BIOS by firmware center when original BIOS of computer system is damaged and computer system can not be switched on.
Description
Technical field
The present invention relates to a kind of apparatus for debugging and debug method thereof, and be particularly related to a kind of LPC of use interface and can repair the apparatus for debugging and the debug method thereof of BIOS function.
Background technology
Known Debug Card is by PCI (Peripheral Component Interconnect, peripheral componentinterconnection) bus interface or MINI PCI (mini Peripheral Component Interconnect, miniperipheral component interconnection) interface reception POST (power supply selftest, power on self test) sign indicating number shows error eliminating function.And the POST sign indicating number is for when computer system boot-strap, the result of each assembly power supply test on the computer system, for example can represent information such as hard disk entity fault, memory test failure, known Debug Card can receive this POST sign indicating number with numeral or alphabet code, so that the start test result of user's computer system to be provided.
Because the structure of computer system has towards speed faster, the trend that volume is littler, especially (analyze by the network application performance at NAPA for notebook computer, network applicationperformance analyzer) changes one after another with new specification on the platform, MINI pci interface on the notebook computer disappears, and replace with mini-card (MINI CARD) interface, and the POST sign indicating number that originally reaches pci bus changes into and is sent to lpc bus, and lpc bus and being connected on the mini-card (MINI CARD), therefore, the Debug Card of known employing pci interface or MINI pci interface can't use in new interface.
Simultaneously, if the original BIOS (basic input/output of computer system, basic input/outputsystem) due to illness situation such as bios version failure is attacked, upgraded to poison and when damaging, this moment, main frame can't be started shooting, be known under this damage situation and BIOS need not be able to be being taken off under the motherboard, it is used specific apparatus burning reparation again.But, can improve speed and save on the NAPA platform of area, the common burning of bios program is at less SPI FLASH (the serial peripheral interface flash memory of volume, serial peripheral interface flash) on the member, in order to cooperate the less SPI FLASH member of volume and to reduce the influence of socket mass discrepancy, so with the SPI FLASH member motherboard of directly burn-oning.That is to say that in case the bios program code damage, need take off whole SPI FLASH member and renew, and make maintenance cost and servicing time greatly improve.
Summary of the invention
Purpose of the present invention just provides a kind of LPC of use interface and can repair the apparatus for debugging of BIOS function, can save by instrument reparation BIOS and reach great amount of cost and the time loss of changing the BIOS element again, also can obtain the POST sign indicating number with monitoring main frame start situation by the LPC interface simultaneously, not only can increase the compatibility of apparatus for debugging, and can save the element area.
A further object of the present invention provides a kind of LPC of use interface and can repair the apparatus for debugging of BIOS function, but at-once monitor main frame start situation, and can save and use instrument burning BIOS and change the cost consumption of BIOS element again.
Another purpose of the present invention provides a kind of LPC of use interface and can repair the debug method of BIOS function, repairs BIOS with minimum time and cost, and can grasp the start situation immediately by the high LPC interface of compatibility.
Based on above-mentioned and other purpose, the present invention proposes a kind of LPC of use interface and can repair the apparatus for debugging of BIOS function, comprises: Firmware Hub, demoder, LPC interface, and display unit.Firmware Hub stores back-up BIOS, when the original BIOS of computer system damages, can provide back-up BIOS to make computer system use start, and can repair the original BIOS of computer system.Demoder receives the POST sign indicating number of this computer system from the LPC interface, and exports this POST sign indicating number decoding to display unit, and display unit is decoded signal and show the start situation according to this.The LPC interface is electrically connected to Firmware Hub, demoder and computer system, in order to the control signal of transmitting this Firmware Hub and this POST sign indicating number of computer system.
Described according to preferred embodiment of the present invention, above-mentioned use LPC interface and the apparatus for debugging that can repair the BIOS function can be arranged on the object that adopts mini-card (mini card) commercial size.
From another viewpoint, the present invention proposes a kind of LPC of use interface and can repair the apparatus for debugging of BIOS function, comprises Firmware Hub and LPC interface.When the original BIOS of computer system damages and when causing starting shooting, the back-up BIOS of the Firmware Hub brain system of can powering uses carrying out start, and can repair the original BIOS of computer system by back-up BIOS.And the LPC interface is electrically connected this Firmware Hub and this computer system, as the communication control interface of control maincenter and computer system.
Described according to preferred embodiment of the present invention, above-mentioned use LPC interface and the apparatus for debugging that can repair the BIOS function can be arranged on the object that adopts mini-card (mini card) commercial size.
From another viewpoint, the present invention proposes a kind of LPC of use interface and can repair the debug method of BIOS function, comprises the following step, at first stores back-up BIOS.Then, when the original BIOS of computer system damages and when causing starting shooting, but so that being provided, this back-up BIOS makes this computer system normal boot-strap by the LPC interface.Next.Re-use the original BIOS that the back-up BIOS reparation damages.
Described according to preferred embodiment of the present invention, above-mentioned use LPC interface and can repair the debug method of BIOS function further comprises and receives the POST sign indicating number, by with the decoding of POST sign indicating number to show the start situation of this computer system.
The present invention repairs BIOS and obtains the structure of POST sign indicating number because of adopting by LPC and Firmware Hub, and Firmware Hub can be immediately and with minimum cost and time reparation BIOS, and can obtain POST by compatible height and the little LPC interface of area and learn the start situation.
State with other purposes, feature and advantage and can become apparent on the present invention for allowing, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 uses the LPC interface and can repair the apparatus for debugging circuit block diagram of BIOS function for the embodiment of the invention.
Fig. 2 uses the LPC interface and can repair the apparatus for debugging circuit block diagram of BIOS function for another embodiment of the present invention.
Fig. 3 uses the LPC interface and can repair the debug method process flow diagram of BIOS function for the embodiment of the invention.
The main element description of symbols
10,20: apparatus for debugging
101,201: Firmware Hub
102: demoder
1021:7 n segment display n demoder
1022: low pin-count demoder
103,203: low pin-count interface
104: display unit
The 1041:7 n segment display n
11,21: computer system
111,211: the serial peripheral interface flash memory
112,212: control chip group
113,213: the computer peripheral cell
S301～S313: each step of using the LPC interface and can repairing the debug method of BIOS function
Embodiment
Fig. 1 uses LPC (low pin-count, low pin count) interface and can repair the apparatus for debugging circuit block diagram of BIOS (basic input/output, basic input/output system) function for the embodiment of the invention.Apparatus for debugging 10 comprises Firmware Hub 101, demoder 102, low pin-count interface (low pin count,, and display unit 104 LPC) 103, debugging system 10 can be by display unit 104 to show the start erroneous condition of computer system 11, to reach the BIOS erroneous procedures of repairing in the serial peripheral interface storer 111 that can not start shooting.
Computer system 11 comprises serial peripheral interface storer 111, control chip group 112, computer peripheral cell 113.The original bios program of record in the serial peripheral interface storer 11, transferring to control chip group 112 by lpc bus makes computer system 11 finish the start operation, when start, control chip group 112 can also be sent POST (power supply selftest by power supply test computer peripheral cell 113 simultaneously, power on self test) sign indicating number, progress with the display power supply test, if this moment, computer peripheral 113 faults caused can not normal boot-strap the time, the POST sign indicating number can show and stop at a certain information because of the fault element in the computer peripheral cell 113.By differentiating the information of POST sign indicating number, can learn the testing progress in the computer peripheral cell 113.
Demoder 102 is electrically connected to low pin-count interface 103, and passes through the POST sign indicating number that low pin-count interface 103 receives computer systems 11, and this POST sign indicating number is decoded into decoded signal, inputs to display unit 104.The decoded signal of display unit 104 Rcv decoders 102 and demonstrate start progress.The display unit 104 of present embodiment is implemented with 7 n segment display ns 1041, and demoder 102 contains 7 n segment display n demoders 1021 and low pin-count demoder 1022.Low pin-count demoder 1022 receives the POST sign indicating number of computer system 11 from low pin-count interface 103, and send 7 n segment display n demoders 1021 after being decoded to, and 7 n segment display n demoders 1021 will hang down the shows signal that the decoded signal of pin-count demoder 1022 converts 7 n segment display ns 1041 to.Drive the light emitting diode in 7 n segment display ns 1041 respectively by the decoding of 7 n segment display n demoders 1041, can on 7 n segment display ns 1041, demonstrate the symbol that human eye can be known identification, for example arabic numeral or English can these be made the start error message table of comparisons for the use reference of user as computer system 11.
Present embodiment uses the low pin-count interface of 9 barss owing to adopt the combination of low pin-count interface 103 and low pin-count demoder 1022, compares with the MINIPCI interface of 124 barss and can significantly save the space.Can use simultaneously multiple low pin-count connector to connect computer system 11, for example TCPA (believable computer platform alliance, trustedcomputing platform alliance) module connector, firmware integrated circuit groove, mini draw-in groove or connect low pin bus place at motherboard and can reserve 9 pin sockets.And this uses the debugging device circuit of low pin interface less, can reduce the cost.
Firmware Hub 101 is in order to store back-up BIOS, when the original BIOS of the serial peripheral interface flash memory 11 of computer system 11 damages, and computer system 11 just can't be started shooting, Firmware Hub 101 meetings this moment be sent by low pin-count interface 103 and be controlled signal to control chip group 112, this control signal makes computer system 11 no longer by the original bios program code start of the damage in the serial peripheral interface flash memory 111, and changes the back-up BIOS program code start by Firmware Hub 101.The embodiment that this change bios program is inserted computer system 11 is applied to present commercial size and is described as follows, control chip group 112 is the South Bridge chip group ICH-7M that company produced of Intel (intel) for example, by on the South Bridge chip group ICH-7M being that pin (strap pin) GNT5#/GNT#T4 forces computer system 11 to read back-up BIOS program code start by Firmware Hub 101.In case after making that by Firmware Hub 101 computer system 11 is successfully started shooting, re-use the read-write program of corresponding serial peripheral interface flash memory 11, after the original bios program reparation with serial peripheral interface flash memory 11, then computer system 11 next starts will change by from serial peripheral interface flash memory 11 start, and finish the reparation that damages original BIOS.
Present embodiment damage the pattern of original BIOS with the back-up BIOS reparation by Firmware Hub 101, can save maintenance BIOS required purchase serial peripheral interface flash memory cd-rom recorder or accessory, also need not on motherboard, set up connector for maintenance BIOS takes off the serial peripheral interface flash memory, cause the possibility of other elements infringements in the time of can saving servicing time simultaneously and reduce maintenance.And apparatus for debugging 10 can be arranged on the object that adopts mini-card (MINI CARD) commercial size, it is little and can use PCIe (fast peripheral component interconnection that mini-card has a volume, peripheral component interconnection express) and USB (USB (universal serial bus), universal serial bus) multi-functional characteristic is finished the convenience that the operation of debug and reparation BIOS can more increase use by hanging down pin interface on mini-card.
Fig. 2 uses the LPC interface and can repair the apparatus for debugging circuit block diagram of BIOS function for another embodiment of the present invention.Apparatus for debugging 20 comprises Firmware Hub 201 and low pin-count interface 203.Firmware Hub 201 stores back-up BIOS.Low pin interface 203 is connected to computer system 21 by low pin bus.Computer system 21 comprises serial peripheral interface flash memory 211, control chip group 212, computer peripheral cell 213, serial peripheral interface flash memory 211 contains the required original bios program of computer system 11 starts, and by control chip group 212 member in the computer peripheral cell 213 is done test respectively.When the original bios program of serial peripheral interface flash memory 211 storages damages, control chip group 212 transfers to read back-up BIOS with start by low pin control interface 203 from Firmware Hub 201, and repairs the original BIOS of damage of serial peripheral interface flash memory 211 after the start again by back-up BIOS.And apparatus for debugging 20 can be arranged on the object that adopts mini-card (MINI CARD) commercial size, finishes the operation of debug and reparation BIOS by low pin interface.
Fig. 3 uses the LPC interface and can repair the debug method process flow diagram of BIOS function for the embodiment of the invention.At first, when step S301, the back-up BIOS program.Then, judge in step S303 whether the original BIOS of computer system boot-strap damages.If when original bios program damages, just use LPC to be interfaced to Firmware Hub and read back-up BIOS, to finish normal boot-strap.Next, when step S307.Use the burning program of corresponding serial peripheral interface flash memory to repair original BIOS.
, then enter step S309 and receive the POST sign indicating number if judge when original BIOS does not damage at step S303, then the POST sign indicating number is decoded in step S311.Show the computer system boot-strap situation at step S313 then.
In sum, use the LPC interface and can repair the apparatus for debugging and the debug method thereof of BIOS function in the present invention, reach the structure of obtaining the POST sign indicating number by the LPC interface owing to adopt Firmware Hub to store back-up BIOS and can repair original BIOS by the LPC interface, make the connection area of Debug Card transmission interface greatly reduce also increase compatibility, repair original BIOS by back-up BIOS simultaneously, can significantly reduce servicing time and maintenance cost.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; any person of ordinary skill in the field; without departing from the spirit and scope of the invention; when can doing a little change and change, so the present invention's protection domain is as the criterion when looking the claim person of defining.
Claims (16)
1. a LPC interface and can repair the apparatus for debugging of BIOS function is characterized in that comprising:
Firmware Hub, in order to store back-up BIOS, and the original BIOS that works as the computer system that connected damages and when causing starting shooting, and provides this back-up BIOS to use carrying out start to this computer system, and repairs this original BIOS of this computer system by this back-up BIOS;
Demoder is electrically connected to this LPC interface, in order to receiving the POST sign indicating number of this computer system, and this POST sign indicating number is decoded into decoded signal;
The LPC interface is electrically connected to this Firmware Hub, this demoder and this computer system, in order to this POST sign indicating number that controls signal to this computer system and transmit this computer system of transmitting this Firmware Hub to this demoder; And
Display unit is electrically connected to this demoder, shows the start situation in order to this decoded signal that receives this demoder.
2. use LPC interface according to claim 1 and can repair the apparatus for debugging of BIOS function is characterized in that this apparatus for debugging is arranged on the mini-card.
3. use LPC interface according to claim 1 and can repair the apparatus for debugging of BIOS function is characterized in that this demoder comprises 7 n segment display n demoders.
4. use LPC interface according to claim 1 and can repair the apparatus for debugging of BIOS function is characterized in that this display unit is 7 n segment display ns.
5. one kind is used the LPC interface and can repair the apparatus for debugging of BIOS function, it is characterized in that comprising:
Firmware Hub, in order to store back-up BIOS, and the original BIOS that works as the computer system that connected damages and when causing starting shooting, and provides this back-up BIOS to use carrying out start to this computer system, and repairs this original BIOS of this computer system by this back-up BIOS; And
The LPC interface is electrically connected this Firmware Hub and this computer system, in order to transmit this computer system that controls signal to of this Firmware Hub.
6. use LPC interface according to claim 5 and can repair the apparatus for debugging of BIOS function is characterized in that this apparatus for debugging is arranged on the mini-card.
7. use LPC interface according to claim 5 and can repair the apparatus for debugging of BIOS function is characterized in that this LPC interface receives the POST sign indicating number of this computer system.
8. use LPC interface according to claim 5 and can repair the apparatus for debugging of BIOS function, it is characterized in that further comprising demoder, wherein this demoder is electrically connected to this LPC interface, in order to receiving this POST sign indicating number of this computer system, and this POST sign indicating number is decoded into decoded signal.
9. use LPC interface according to claim 8 and can repair the apparatus for debugging of BIOS function is characterized in that this demoder comprises 7 n segment display n demoders.
10. use LPC interface according to claim 5 and can repair the apparatus for debugging of BIOS function, it is characterized in that further comprising display unit, wherein this display unit is electrically connected to this demoder, shows the start situation in order to this decoded signal that receives this demoder.
11. use LPC interface according to claim 10 and can repair the apparatus for debugging of BIOS function is characterized in that this display unit is 7 n segment display ns.
12. one kind is used the LPC interface and can repair the debug method of BIOS function, it is characterized in that comprising the following step:
Store back-up BIOS;
When the original BIOS of this computer system damages and when causing starting shooting, use the LPC interface to make this computer system normal boot-strap so that this back-up BIOS to be provided; And
This original BIOS that uses this back-up BIOS reparation to damage.
13. use LPC interface according to claim 12 and can repair the debug method of BIOS function is characterized in that further comprising and receives the POST sign indicating number, by with this POST sign indicating number decoding to show the start situation of this computer system.
14. use LPC interface according to claim 12 and can repair the debug method of BIOS function is characterized in that further being included in and shows this start situation on the mini-card and repair the BIOS function operations.
15. computer system, be applicable to claim 1～11 described use LPC interface and can repair the apparatus for debugging of BIOS function, it is characterized in that the original BIOS of the storage system on this computer system sends the POST sign indicating number to show the start situation by this apparatus for debugging reparation and this computer system.
16. computer system, be applicable to claim 12～14 described use LPC interface and can repair the debug method of BIOS function, it is characterized in that the system of this original BIOS of storage on this computer system sends the POST sign indicating number to show the start situation by this debug method reparation and this computer system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510134461 CN1983204A (en) | 2005-12-15 | 2005-12-15 | Device and method for correcting and repairing BIOS function by LPC interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510134461 CN1983204A (en) | 2005-12-15 | 2005-12-15 | Device and method for correcting and repairing BIOS function by LPC interface |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1983204A true CN1983204A (en) | 2007-06-20 |
Family
ID=38165757
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200510134461 Pending CN1983204A (en) | 2005-12-15 | 2005-12-15 | Device and method for correcting and repairing BIOS function by LPC interface |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1983204A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101609422A (en) * | 2008-06-19 | 2009-12-23 | 环旭电子股份有限公司 | Main board debug card |
| US7900091B2 (en) | 2008-03-26 | 2011-03-01 | Asustek Computer Inc. | Method for recovering basic input output system and computer device thereof |
| CN102385545A (en) * | 2010-08-30 | 2012-03-21 | 鸿富锦精密工业（深圳）有限公司 | BIOS (Basic Input Output System) debugger and debugging method |
| CN103999041A (en) * | 2012-01-03 | 2014-08-20 | 惠普发展公司，有限责任合伙企业 | Backing up firmware during initialization of device |
| CN105786658A (en) * | 2014-12-17 | 2016-07-20 | 环旭电子股份有限公司 | Computer system and method capable of detecting internal computer state |
| CN106445858A (en) * | 2015-08-13 | 2017-02-22 | 联想(北京)有限公司 | Information processing method, information processing module and electronic device |
| CN106569764A (en) * | 2016-10-24 | 2017-04-19 | 浙江大华技术股份有限公司 | Display system, method for decoding device hot backup in display system and backup decoding device |
-
2005
- 2005-12-15 CN CN 200510134461 patent/CN1983204A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7900091B2 (en) | 2008-03-26 | 2011-03-01 | Asustek Computer Inc. | Method for recovering basic input output system and computer device thereof |
| CN101609422A (en) * | 2008-06-19 | 2009-12-23 | 环旭电子股份有限公司 | Main board debug card |
| CN101609422B (en) * | 2008-06-19 | 2013-07-17 | 环旭电子股份有限公司 | Main board debug card |
| CN102385545A (en) * | 2010-08-30 | 2012-03-21 | 鸿富锦精密工业（深圳）有限公司 | BIOS (Basic Input Output System) debugger and debugging method |
| CN103999041A (en) * | 2012-01-03 | 2014-08-20 | 惠普发展公司，有限责任合伙企业 | Backing up firmware during initialization of device |
| US9672112B2 (en) | 2012-01-03 | 2017-06-06 | Hewlett-Packard Development Company, L.P. | Backing up firmware during initialization of device |
| CN103999041B (en) * | 2012-01-03 | 2018-03-27 | 惠普发展公司，有限责任合伙企业 | The backup firmware during equipment initializes |
| US10613773B2 (en) | 2012-01-03 | 2020-04-07 | Hewlett-Packard Development Company, L.P. | Backing up firmware during initialization of device |
| CN105786658A (en) * | 2014-12-17 | 2016-07-20 | 环旭电子股份有限公司 | Computer system and method capable of detecting internal computer state |
| CN106445858A (en) * | 2015-08-13 | 2017-02-22 | 联想(北京)有限公司 | Information processing method, information processing module and electronic device |
| CN106445858B (en) * | 2015-08-13 | 2020-06-23 | 联想(北京)有限公司 | Information processing method, information processing module and electronic equipment |
| CN106569764A (en) * | 2016-10-24 | 2017-04-19 | 浙江大华技术股份有限公司 | Display system, method for decoding device hot backup in display system and backup decoding device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20070168737A1 (en) | Debugging device using an lpc interface capable of recovering functions of bios, and debugging method therefor | |
| CN107423169B (en) | Method and system for testing high speed peripheral device interconnection equipment | |
| CN1983204A (en) | Device and method for correcting and repairing BIOS function by LPC interface | |
| US20080294939A1 (en) | Debugging device and method using the lpc/pci bus | |
| US8886996B2 (en) | Debugging device and method for performing a debugging process to a target system | |
| CN102270167A (en) | System and method for testing a plurality of hard disk ports of mainboard | |
| CN211427190U (en) | Server circuit and mainboard based on Feiteng treater 2000+ | |
| CN105955911B (en) | Hot plug control circuit and control method thereof | |
| CN101996128A (en) | Hard disk state indicator lamp control system | |
| CN102135930A (en) | Error detecting device and method for computer system | |
| CN112825011A (en) | Power-on and power-off control method and system of PCIe device | |
| CN102467431A (en) | SATA interface test device and test method thereof | |
| CN103412836A (en) | Hot plug processing method, device and system | |
| CN102662808A (en) | Method and device for realizing hardware fault detection on PCIE (peripheral component interconnect express) | |
| CN102455965A (en) | Electronic device test system and method | |
| CN101620580A (en) | Computer system and control method of the same | |
| CN111726563A (en) | Video storage device for train video monitoring system | |
| CN213400574U (en) | Device for performing abnormal power failure test on memory | |
| US20080301427A1 (en) | Basic input/output system memory simulation module | |
| US20080040632A1 (en) | Baseboard testing interface and testing method thereof | |
| CN117630637A (en) | Testing device | |
| CN108549042B (en) | NVME LED detection system and detection method | |
| KR19990079978A (en) | PCI Hot Plug Device and Control Method Using I2C Bus | |
| CN101989219B (en) | Hardware fault detection debugging code information output method, device and system | |
| CN208444286U (en) | A kind of NVMe back plate testing device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |