CN1982907A - Method for testing transistor life - Google Patents

Method for testing transistor life Download PDF

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Publication number
CN1982907A
CN1982907A CN 200510111419 CN200510111419A CN1982907A CN 1982907 A CN1982907 A CN 1982907A CN 200510111419 CN200510111419 CN 200510111419 CN 200510111419 A CN200510111419 A CN 200510111419A CN 1982907 A CN1982907 A CN 1982907A
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China
Prior art keywords
transistor
life
normal
deterioration
span
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CN 200510111419
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Chinese (zh)
Inventor
胡晓明
仲志华
万星拱
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Shanghai IC R&D Center Co Ltd
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Original Assignee
Shanghai Hua Hong NEC Electronics Co Ltd
Shanghai Integrated Circuit Research and Development Center Co Ltd
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Application filed by Shanghai Hua Hong NEC Electronics Co Ltd, Shanghai Integrated Circuit Research and Development Center Co Ltd filed Critical Shanghai Hua Hong NEC Electronics Co Ltd
Priority to CN 200510111419 priority Critical patent/CN1982907A/en
Publication of CN1982907A publication Critical patent/CN1982907A/en
Pending legal-status Critical Current

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Abstract

A method for testing service-life time of transistor includes selecting transistors in regular specification, controlling ambient temperature of selected transistors to be at 70-250K, setting offset voltage of drain end on transistor to carry out hot carrier deterioration and recording deterioration time, using deterioration time to calculate service-life time of transistor under normal operation state at low temperature and obtaining service-life time of transistor under normal operation state at ambient temperature based on calculated service-life time.

Description

The method of testing transistor life
Technical field
The present invention relates to transistor reliability evaluation method in a kind of VLSI (very large scale integrated circuit) manufacturing field, especially a kind of method of testing transistor life.
Background technology
Hot carrier's effect is one of failure mechanism main in the microelectronic component, and hot carrier's effect can cause the transistor drift of key property parameter in use for some time, causes the inefficacy of entire chip.After sub-micron, deep-submicron development, size of devices constantly reduces at device, and hot carrier's effect is more serious.Hot carrier's effect can seriously influence transistorized reliability, can make transistor threshold voltage in long-term use, and the drift of important parameters such as saturation current causes the inefficacy of chip.Therefore, along with the progress of technology, the evaluation of hot carrier's effect enjoys attention.
But the evaluation of traditional hot carrier's effect is carried out at normal temperatures, and whole evaluation procedure is consuming time longer.And because the restriction of time often can not measure the ultimate failure time of device, the device actual effect time that the method by extrapolation obtains can not reflect the truth of device sometimes in the evaluation procedure of traditional hot carrier's effect.
The method of the testing transistor life of prior art both may not test transistor true hot carrier's effect and transistorized life-span, also need to expend long time, increase hot carrier's effect and the evaluation cycle of transistor life, increase and produce the needed time, make production efficiency lower.
Summary of the invention
Technical matters to be solved by this invention provides a kind of method of testing transistor life, can test accurately and calculate the transistorized life-span, and can save the evaluation time of hot carrier's effect and transistor life, enhance productivity, reduce production costs.
For solving the problems of the technologies described above, the technical scheme of the method for a kind of testing transistor life of the present invention is may further comprise the steps: the first step, and sample is carried out the test in early stage, and select the normal transistor of specification; In second step, control above-mentioned transistorized environment temperature between 70-250K; The 3rd step applied the bias voltage that is higher than normal working voltage at transistorized drain terminal, carried out the deterioration of hot-carrier test, and obtained the deterioration time; In the 4th step, utilize deterioration Time Calculation transistor life-span under the normal working voltage when low temperature; In the 5th step, draw the life-span of transistor under the normal temperature normal working voltage in the life-span under the low temperature normal working voltage according to transistor.
The present invention is by carrying out deterioration to transistor under the situation of low temperature, thereby calculate transistor and obtain the life-span of transistor under the normal temperature normal operating conditions in the life-span under the low temperature normal operating conditions, not only the transistorized hot carrier's effect of evaluation that can be more accurate, calculate the life-span of transistor under the normal temperature normal operating conditions, also save a large amount of time, enhance productivity, reduce production costs.
Description of drawings
Below in conjunction with drawings and Examples the present invention is further described:
Fig. 1 is the method flow synoptic diagram of testing transistor life of the present invention;
Fig. 2 is an embodiment of the invention schematic flow sheet;
Fig. 3 is the difference synoptic diagram of transistor on drain terminal down slope time under low temperature and the normal temperature state.
Embodiment
Fig. 1 is the method flow synoptic diagram of testing transistor life of the present invention.As shown in Figure 1, the method for a kind of testing transistor life of the present invention may further comprise the steps: the first step, and sample is carried out the test in early stage, and select the normal transistor of specification; In second step, control above-mentioned transistorized environment temperature between 70-250K; The 3rd step applied the bias voltage that is higher than normal working voltage at transistorized drain terminal, carried out the deterioration of hot-carrier test, and obtained the deterioration time; In the 4th step, utilize deterioration Time Calculation transistor life-span under the normal working voltage when low temperature; In the 5th step, draw the life-span of transistor under the normal temperature normal working voltage in the life-span under the low temperature normal working voltage according to transistor.
Fig. 2 is an embodiment of the invention schematic flow sheet.As shown in Figure 2, when testing transistor life, at first, sample is carried out the test in early stage, select the normal transistor of specification.In the test in early stage, need the value of test to comprise threshold voltage, drive current and channel transconductance, judge by above parameter whether transistor is normal.Secondly, transistorized environment temperature is fallen between 70-250K.The 3rd step applied the bias voltage that is higher than normal working voltage at transistorized drain terminal, carried out the deterioration of hot-carrier test.In the 4th step, at the deterioration test period, transistorized parameter is tested, and the test result of gained and the test result in early stage in the first step are compared.The 5th step, early stage test and deterioration device are judged to transistorized test whether characteristics of transistor floats to certain numerical value by the 4th step, this value generally is 10%.If do not reach this numerical value, then proceed deterioration, if reach this numerical value, then stop the deterioration test.In the 6th step, obtain the deterioration time.In the 7th step, utilize deterioration Time Calculation transistor life-span under the normal working voltage when low temperature; In the 8th step, draw the life-span of transistor under the normal temperature normal working voltage in the life-span under the low temperature normal working voltage according to transistor.
According to the life-span of transistor under the low temperature normal operating conditions draw transistor at normal temperatures the used mathematical expression of life-span of normal operating conditions be:
LFtemp_use=exp (Ea/KB) *(1/Temp_use-1/Temp_stress) *LFtemp_stress wherein, LFtemp_use is the transistorized life-span under the normal temperature normal operating conditions; LFtemp_stress is the transistorized life-span under the low temperature normal operating conditions; KB is a Boltzmann constant; Ea is an activation energy; Temp_use is the normal temperature temperature; Temp_stress is a cryogenic temperature.To between-the 0.18eV, it can utilize the life-span projection under 3 to 5 different temperatures to come out to the numerical value of activation energy Ea at-0.2eV, and the deviation of the numerical value of dissimilar transistor activation energy Ea is very little.
At low temperatures, because the reduction of phon scattering ability in the transistor channel, the transfer ability of electronics increases thereupon, and under same bias condition, transistorized drive current is the drive current under the normal temperature at low temperatures.At low temperatures, the depletion region of electric current between raceway groove pinch-off point and drain terminal that has strengthened can produce more ion collision, to the damage aggravation of raceway groove so that the device performance deterioration process accelerate.
Fig. 3 is the difference synoptic diagram of identical transistor on drain terminal down slope time under low temperature and the normal temperature state.As shown in Figure 3, ordinate is the number percent of transistor drain terminal current attenuation, and horizontal ordinate is the time of test decay.Select 3 different drain terminal bias voltages (2.4V/2.7V/3.0V) for use, identical two different temperature conditions of bias voltage test.As can be seen, identity unit only is 1/3rd under the normal temperature in the time that identical bias is issued to drain terminal current attenuation 10% at low temperatures.Especially for bias voltage less the time, this temporal reduction effect is more obvious.At bias voltage is under the 2.4V situation, and when the current attenuation 10% of transistor drain terminal, the test duration of two different temperatures differed about 140 hours.
Utilize the inventive method can effectively improve speedup factor in the hot carrier's effect accelerated test.The failure mode of this method is identical with the failure mode of traditional normal temperature test, and the transistorized life-span that obtains at low temperatures derives the transistor life to normal temperature, there is good consistance in resulting transistorized life-span of deriving, and the test duration is 1/3rd of traditional normal temperature test.Significantly shortened the cycle that the transistor hot carrier's effect is estimated.Reduce the test duration significantly, very important meaning is arranged cutting down testing cost quickening technological development progress.
The method of a kind of testing transistor life of the present invention, carry out the deterioration test at low temperatures, thereby the calculating transistor life-span at low temperatures obtains the life-span of transistor under the normal temperature normal operating conditions, not only the transistorized hot carrier's effect of evaluation that can be more accurate, calculate the life-span of transistor under the normal temperature normal operating conditions, also save a large amount of time, enhance productivity, reduce production costs.

Claims (6)

1. the method for a testing transistor life is characterized in that, may further comprise the steps: the first step, and sample is carried out the test in early stage, and select the normal transistor of specification; In second step, control above-mentioned transistorized environment temperature between 70-250K; The 3rd step applied the bias voltage that is higher than normal working voltage at transistorized drain terminal, carried out the deterioration of hot-carrier test, and obtained the deterioration time; In the 4th step, utilize deterioration Time Calculation transistor life-span under the normal working voltage when low temperature; In the 5th step, draw the life-span of transistor under the normal temperature normal working voltage in the life-span under the low temperature normal working voltage according to transistor.
2. the method for testing transistor life according to claim 1 is characterized in that, the above-mentioned transistorized environment temperature of control is 213K in second step.
3. the method for testing transistor life according to claim 1, it is characterized in that, the 3rd step carried out the charge carrier deterioration to transistor and obtains the deterioration time and comprise following step: at first, apply the bias voltage that is higher than normal working voltage at transistorized drain terminal, carry out the deterioration of hot-carrier test.Second step, at the deterioration test period, transistorized parameter is tested, and with the test result of gained and test result comparison in earlier stage.Whether the 3rd step floated to certain numerical value by second characteristics of transistor of relatively judging that goes on foot parameter, and this value generally is 10%.If do not reach this numerical value, then proceed deterioration, if reach this numerical value, then stop the deterioration test.In the 4th step, draw the deterioration time.
4. the method for testing transistor life according to claim 1 and 2 is characterized in that, the 5th the step in according to the life-span of transistor under the low temperature normal operating conditions draw transistor at normal temperatures the used mathematical expression of life-span of normal operating conditions be:
LFtemp_use=exp (Ea/KB) * (1/Temp_use-1/Temp_stress) * LFtemp_stress wherein, LFtemp_use is the transistorized life-span under the normal temperature normal operating conditions; LFtemp_stress is the transistorized life-span under the low temperature normal operating conditions; KB is a Boltzmann constant; Ea is an activation energy; Temp_use is the normal temperature temperature; Temp_stress is a cryogenic temperature.
5. the method for testing transistor life according to claim 4 is characterized in that, calculate in the 5th step transistor at normal temperatures in the used mathematical expression of life-span of normal operating conditions the numerical value of activation energy Ea at-0.2ev between-the 0.18ev.
6. the method for testing transistor life according to claim 4 is characterized in that, calculate in the 4th step transistor at normal temperatures in the used mathematical expression of life-span of normal operating conditions the numerical value of activation energy Ea be-0.18ev.
CN 200510111419 2005-12-13 2005-12-13 Method for testing transistor life Pending CN1982907A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101726695B (en) * 2008-10-17 2011-12-28 和舰科技(苏州)有限公司 Method for testing service life of NMOS hot carrier injection
CN103884977A (en) * 2014-03-06 2014-06-25 北京大学 Method for forecasting NBTI life of semiconductor device and fluctuation of NBTI life
CN105911446A (en) * 2016-04-12 2016-08-31 重庆大学 IGBT aging state monitoring method and IGBT aging state monitoring device
CN108169650A (en) * 2016-12-06 2018-06-15 深圳市蓝海华腾技术股份有限公司 It is a kind of to detect IGBT service lifes method and device whether up to standard
CN108982998A (en) * 2018-07-12 2018-12-11 浙江大学 A kind of detection circuit and detection method of on-line checking binding line ageing process
CN111060794A (en) * 2019-11-19 2020-04-24 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) Method and device for evaluating service life of hot carrier injection effect and computer equipment

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101726695B (en) * 2008-10-17 2011-12-28 和舰科技(苏州)有限公司 Method for testing service life of NMOS hot carrier injection
CN103884977A (en) * 2014-03-06 2014-06-25 北京大学 Method for forecasting NBTI life of semiconductor device and fluctuation of NBTI life
CN103884977B (en) * 2014-03-06 2016-02-17 北京大学 A kind of method predicting semiconductor devices NBTI life-span and fluctuation thereof
CN105911446A (en) * 2016-04-12 2016-08-31 重庆大学 IGBT aging state monitoring method and IGBT aging state monitoring device
CN105911446B (en) * 2016-04-12 2018-09-04 重庆大学 IGBT ageing states monitoring method and device
CN108169650A (en) * 2016-12-06 2018-06-15 深圳市蓝海华腾技术股份有限公司 It is a kind of to detect IGBT service lifes method and device whether up to standard
CN108169650B (en) * 2016-12-06 2020-04-14 深圳市蓝海华腾技术股份有限公司 Method and device for detecting whether service life of IGBT reaches standard
CN108982998A (en) * 2018-07-12 2018-12-11 浙江大学 A kind of detection circuit and detection method of on-line checking binding line ageing process
CN108982998B (en) * 2018-07-12 2019-11-22 浙江大学 A kind of detection circuit and detection method of on-line checking binding line ageing process
CN111060794A (en) * 2019-11-19 2020-04-24 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) Method and device for evaluating service life of hot carrier injection effect and computer equipment
CN111060794B (en) * 2019-11-19 2022-05-13 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) Method and device for evaluating service life of hot carrier injection effect and computer equipment

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Open date: 20070620