CN1921279A - DC voltage balance control for three-level npc power converters with even-order harmonic elimination scheme - Google Patents
DC voltage balance control for three-level npc power converters with even-order harmonic elimination scheme Download PDFInfo
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Abstract
Three-level inverter and rectifier power conversion systems and space vector modulation (SVM) controls having even-order harmonic elimination for neutral voltage balancing with a predefined vector switching sequences for half-wave symmetry in open loop system operation. The vector sequence listings for each SVM diagram segment includes switching state entries individually indicating one of three possible switching state levels positive (P), zero (0), or negative (N) for each of three or more switching groups of the power conversion system, with listings for each pair of first and second diametrically opposite diagram segments include symmetrically opposite switching states, with positive levels in the entries of the listing for the first segment corresponding to negative levels in the entries of the listing for the second segment and vice versa.
Description
Related application
It is 60/671 that the application requires sequence number, 714 U.S. Provisional Application No. and the rights of submitting on April 15th, 2005 that are entitled as " DC VoltageBalance Control for Three-Level NPC Inverter with Selective Harmonic EliminationScheme " (with the dc voltage Balance Control of selecting the harmonic wave cancellation scheme to three grades of NPC inverters), this application is incorporated herein by reference in full.
Technical field
The present invention relates generally to power source conversion, relate in particular to the control and the method for the pulse-width modulation operation that is used for three-stage inverter and rectification type power supply changeover device.
Background technology
Otherwise power supply changeover device be widely used in the medium voltate motor-driven and wherein power supply need from DC convert to AC or other application.If this conversion equipment is often referred to and is used for converting DC the inverter of AC to or is transformed into the DC power supply from AC then refers to rectifier, wherein AC power supplies connects provides heterogeneous output or input usually respectively.Multiphase converter usually uses the high-voltage high-speed switch arrays to make up, switching device such as grid turn off thyristor (GTO), insulated gate bipolar transistor (IGBT) or other based semiconductor, these switches optionally drive by pulse-width modulation (PWM), so that AC connects and one or another DC bus terminal coupling, wherein the power source conversion performance is determined in the timing of array switch.In the medium voltate motor driven is used, the timing controlled of switch drive is used for providing from input DC bus the heterogeneous AC out-put supply of variable frequency, variable amplitude in the senior inverter type power supply changeover device, thereby can be in big voltage and velocity interval inner control CD-ROM drive motor.
Neutral-point-clamped (NPC) transducer is included in the high-voltage capacitor of two similar sizes that are connected in series between the DC bus, and wherein capacitor is connected with each other at transducer " neutrality " node.In these NPC transducers, three step switch control usually is used to provide three on off states of each AC terminal, wherein AC terminal selectively ground and DC terminal or neutral node coupling.The three step switch technology allows than higher operating voltage of analogous secondary inverter design and better (for example lower) total harmonic distortion (THD) and electromagnetic interference (EMI).Some PWM switching techniques are used for the control switch array in high pressure or middle pressure NPC power supply changeover device, wherein space vector modulation (SVM) method is because harmonic curve, effectively neutral point potential control and be easy to implemented in digital and more and more used preferably.In the NPC power supply changeover device, need make neutral voltage remain on certain level, wherein two condenser voltages are equal substantially, promptly are called the target of neutral point balance.If the mid point of the voltage deviation DC bus on the NPC inverter neutral point, then problem can produce, and comprises to the assembly of transducer itself and/or by the stress of the equipment of transducer power supply, and harmonic distortion is made an addition in the output of inverter.In order to control neutral point voltage, many transducers all are equipped with feed back control system.Yet this closed loop neutral equilibrium method is expensive, needs feedback sensing and advance control algorithm to adjust neutral voltage, and required AC output waveform also is provided simultaneously.Except the neutral point balance, the operating frequency of array switch is minimized.These problems require balance according to frequency, amplitude and other performance and the control of given converter application certainly.Thereby, to improved three stage power source transducer and in medium voltate motor-driven and other SVM method and control system that needs to use in the application of power source conversion lasting needs are arranged.
Summary of the invention
Conclude one or more aspects of the present invention now so that basic comprehension of the present invention, wherein this conclusion is not an extensive overview of the present invention, and is not to be intended to identify some key element of the present invention, is not to be intended to mark its scope yet.On the contrary, the main purpose of this conclusion is to present more detailed description hereinafter before to present notions more of the present invention with reduced form.The present invention relates to the PWM control of three stage power source transducer, wherein space vector modulation (SVM) is used for control transformation device switch.Three grades of NPC transducers and control system are provided, and have been used to provide the three step switch control signal coming the balance neutral point voltage with the open circuit mode, and do not increased the method for cost, size and the weight of feedback neutral equilibrium control element by space vector modulation.The present invention advantageously realizes with rectifier and/or inverter applications, utilizes the neutral voltage balancing of three grades of SVM transducers, low THD and EMI and other feature performance benefit so that promote to save the high pressure or the conversion of middle voltage source of cost.
According to one or more aspects of the present invention, a kind of three grades of SVM NPC power conversion systems are provided, it can be to be used for DC to the inverter of AC conversion or be used for AC power supplies is converted to the rectifier of DC.This system comprises the three step switch network that DC connects, heterogeneous AC connects and be coupled with it and provides the SVM switch controlling signal with the control system with open circuit mode balance neutral voltage.DC connects and to have first and second terminals that are used for receiving or providing the DC power supply, and between the DC terminal first and second capacitors of series coupled, wherein capacitor is coupled on common node or neutral point.AC connects provides or receives polyphase source by three or more AC terminal, and wherein switching network comprises many groups and AC phase terminal associated switch equipment.These switches come optionally AC terminal to be coupled to one of DC terminal or neutral common node by switching from the control signal of control system, wherein control system provides many group switch controlling signals by space vector modulation, so that make electric voltage equalization on the capacitor in power conversion system operating period with the open circuit mode.In one realizes, control system has the space vector modulation system provides switch controlling signal according to even-order harmonic elimination (EHE) vector switch sequence, thereby provide the half-wave symmetry so that the balance of voltage on the common node, a series of on off states of each section of vector switch sequence definition SVM figure wherein, the vector switch sequence that is used for opposite figure section on the diameter in this SVM figure provides the opposite coupling of symmetry of AC terminal and DC terminal.
Others of the present invention relate to a kind of space vector modulation control system that is used for providing to the three stage power source converting system switch controlling signal.This control system comprises and is used for the driver that selectivity drives converter switch, and comes voltage on the balanced to unbalanced transformer capacitor by the space vector modulation Control Driver with open circuit operation.In one embodiment, switch controlling device comprises that even-order harmonic eliminates vectorial on off sequence, and is used for according to the Voltage Reference vector and according to the processing unit of vector switch sequence Control Driver.
Other aspect of the present invention is provided for the vector switch sequence of the space vector modulation of switching network in the three stage power source converting system.This vector switch sequence comprises a machine readable media, it comprises the vector sequence listings of each section of space vector modulation figure, a plurality of zones around the initial point that the fixed space vector of the on off state of definition expression switching network and definition are positioned at space vector modulation figure.Each zone all has a plurality of triangle fragments (for example being 6 in an example), each fragment is all defined by unique one group of three space vector on the triangle angle, wherein each vector sequence listings definition and the corresponding a series of on off states of three space vectors that define each fragment, wherein the opposite vector switch sequence of the former point symmetry with respect to figure for the definition of figure section comprises symmetrical opposite on off state.
Others of the present invention relate to a kind of method of the space vector modulation control that is used for the three stage power source converting system.This method comprises provides the vector switch of space vector modulation sequence, it comprises the vector sequence listings of each section of space vector modulation figure, each vector sequence listings definition and the corresponding a series of on off states of three space vectors that define each fragment, wherein the opposite vector switch sequence of the former point symmetry with respect to figure for the definition of figure section comprises symmetrical opposite on off state.This method also comprises the reference vector that obtains expression power conversion system expectation state, and determines this reference vector section position on space vector modulation figure.Switch controlling signal provides to power conversion system according to the vector sequence listings of reference vector fragment position.
Description of drawings
The following description and drawings elaborate some illustrative of the present invention and implement, and they illustrate some illustrative methods of putting into practice the principle of the invention.Yet these illustrated examples are not to be the limit of many possibility embodiment of the present invention.Other purpose of the present invention, advantage and novelty from following with reference to becoming apparent the accompanying drawing detailed description of the present invention, in the accompanying drawings:
Figure 1A is the schematic diagram that the one exemplary three-stage inverter type DC-AC power conversion system of one or more aspects according to the present invention is shown, this power conversion system has the space and shows Vector Modulation (SVM) switch controlling device, and it provides the open circuit of even-order harmonic to suppress and neutral voltage balancing;
Figure 1B is the diagrammatic sketch that illustrates according to of the present invention one exemplary three grades of SVM rectifiers, and it uses even-order harmonic to eliminate (EHE) SVM on-off control system and converts heterogeneous AC to the DC power supply;
Fig. 1 C is the schematic diagram of an exemplary SVM control system that the power supply changeover device of the Figure 1A of the various aspects according to the present invention and 1B is shown, and this control system comprises: the driver that is used for the driving power converter switch; And processor, come Control Driver by space vector modulation according to EHE SVM vector switch sequence, so that the voltage on the balanced capacitor and reduce even-order harmonic in the open circuit operation of power conversion system;
Fig. 1 D is the form of residence Time Calculation that the SVM control system of Figure 1A-1C is shown;
Fig. 1 E illustrates the illustrative switch sequence of specific SVM figure section and the form of the corresponding time of staying;
Fig. 1 F is the flow chart that illustrates according to the illustrative methods of the SVM control that is used for the three stage power source converting system of this aspect others;
Fig. 2 A and 2B are the schematic diagrames that the one exemplary EHE SVM vector switch sequence of others according to the present invention is shown, and this on off sequence uses the serial clauses and subclauses of half-wave symmetry to provide the open circuit even-order harmonic to suppress and neutral equilibrium;
Fig. 3 and 4 is schematic diagrames that an exemplary SVM figure is shown, and this SVM illustrates the space vector that expression is used for the on off state of power supply changeover device switching network and defines 6 zones of each six triangle fragment in zone;
Fig. 5 is the voltage waveform V that the exemplary simulated half-wave symmetrical phase of Figure 1A three-phase inverter when reference vector rotates in a complete cycle is shown
A0And V
ABCurve chart;
Fig. 6 illustrates in three grades of SVM control inverters that use conventional SVM switch controlling schemes the inverter line to the curve chart of the even-order harmonic content of line waveform;
Fig. 7 is the curve chart such as the simulation even-order harmonic content in three grades of SVM control inverters of Figure 1A that the EHE AVM vector switch sequence of the SVM control system of using Fig. 1 C and Fig. 2 A and 2B is shown;
Fig. 8 is that total harmonic distortion (THD) level is compared in the simulation that the conventional SVM method and the SVM modulating control system of the EHE AVM vector switch sequence of using Fig. 2 A and 2B are shown;
Fig. 9 A is the curve chart that is illustrated in the voltage waveform of line to the center Points And lines to line of the experiment in three grades of SVM control inverters that use conventional SVM switch controlling schemes;
Fig. 9 B is illustrated in the odd of the experiment in the SVM inverter that uses conventional SVM switch controlling schemes and the curve chart corresponding to Fig. 9 A of even-order harmonic content curves;
Figure 10 A is the curve chart such as the voltage waveform of line to the center Points And lines to line of the experiment in three grades of SVM control inverters of Figure 1A that the EHE AVM vector switch sequence of the SVM control system of using Fig. 1 C and Fig. 2 A and 2B is shown;
Figure 10 B is the curve chart corresponding to Figure 10 A that is illustrated in the odd and the even-order harmonic content curves of the experiment in the SVM inverter, wherein has sizable even-order harmonic to suppress;
Figure 11 is the curve chart of comparative voltage balance situation that the experiment of conventional and EHE SVM technology is shown.
Embodiment
Referring now to accompanying drawing,, some embodiment of the present invention or be implemented in hereinafter are described in conjunction with the accompanying drawings, and wherein same numeral is used for referring to from start to finish similar elements.Figure 1A illustrates an exemplary three-stage inverter power conversion system 100, comprises that DC connects 100, three-phase AC connects 120 and comprise that coupled in common DC respectively is connected 110 and 120 switches set 130a, 130b and the three step switch network 130 of 130c with AC.Converting system 100 also comprises space vector modulation (SVM) switch controlling device 140, and its one or more aspect according to the present invention provides the open circuit inhibition of even-order harmonic to connect 110 neutral point 0 with active balance DC.DC connects 110 and comprises first and second DC terminal 112a and the 112b that are used for receiving from power supply 114 the DC power supply respectively, and between terminal 112 first and second capacitor C 1 and the C2 of series coupled, wherein capacitor C1 and C2 are coupled on common node or neutral point 0.Voltage on the terminal 112 can be described as the DC bus voltage, and wherein capacitor C1 and C2 preferably have identical or basic rated capacity and the voltage that equates, thereby neutral point 0 is ideally the mid point between the voltage on the bus terminal 112 mid point of DC bus voltage (for example).Power supply 114 can be any DC power supply, other AC composition that is with or without ripple voltage or exports such as rectifier bridge (rectifier bridge); Switching rectifier receives input AC (single-phase or heterogeneous) and DC after terminal 112 provides rectification; Battery or other DC power supply.In the application of picture medium voltate motor drive inverter, the DC bus voltage on the terminal 112 can be several kilovolts.
AC connects 120 three AC terminal 122a, 122b that comprise that the threephase load that is connected with the Y type respectively is coupled and 122c, and this threephase load comprises phase place load LA, LB and LC, such as the motor coil in the example.Other heterogeneous enforcement is possible, AC terminal 122 more than three wherein is provided, add the switches set of respective numbers, thereby each AC terminal 122 can optionally be coupled by the space example modulation switch control signal SC that comes self-controller 140 with one of DC terminal 112 or neutral point 0.Switching network 130 comprises the switchgear S that is associated with AC phase terminal 122a, 122b and 122c respectively
A1-S
A4, S
B1-S
B4And S
C1-S
C4Group 130a, 130b and 130c, wherein switchgear S can be any type of switch that provides in first state that selectivity is electrically connected, electric insulation is provided in second state, for example (being IGBT in the illustrated embodiment) such as GTO, IGBT, IGCT.In addition, in the embodiment shown, each switchgear S comprises and is associated with switchgear S respectively
A1-S
A4, S
B1-S
B4And S
C1-S
C4Fly-wheel diode, be shown D in the drawings
A1-D
A4, D
B1-D
B4And D
C1-D
C4
Shown in the inverter system 100, three group 130a, 130b and 130c are provided, every group is included in four switch S that are connected in series between DC bus terminal 112a and the 112b, so that provide corresponding AC terminal 122 to be connected with the selectivity of one of DC terminal 112 or neutral point 0.In operation, the switch S of every group of 130a, 130b and 130c activates in pairs to realize being used for this three step switch function of pulse-width modulation by SVM technology described herein.For example, for phase place A, switch S
A1And S
A2Between a DC terminal 112a and AC terminal 122a, be connected in series, wherein switch S
A1And S
A2Between node by diode D
A5Be connected neutral point 0 links to each other with DC.In addition, switch S
A3And S
A4Between AC terminal 122a and the 2nd DC terminal 112b, be connected in series, wherein switch S
A3And S
A4Between node by diode D
A6Be connected neutral point 0 is coupled with DC.In this configuration, switching signal SC
A1-SC
A4Offer IGBT S respectively
A1-S
A4The control grid, be used for driving by control system 140 selectivity.The first switches set 130a is provided with control signal SC
A1-SC
A4Some the combination to reach one of three on off states so that optionally an AC phase terminal 122a is connected with one of first (for example+) DC terminal 112a, neutral point 0 or second (for example-) DC terminal 112b, correspond respectively to switch S
A1And S
A2First on off state of conducting, switch S
A2And S
A3The second switch state and the switch S of conducting
A3And S
A4The third state of conducting.The second and the 3rd switches set 130b and 130c are by respective switch sets of signals SC
B1-SC
B4And SC
C1-SC
C4Similarly configuration and optionally operation are to be coupled to corresponding AC terminal the one DC terminal 112a, neutral point 0 or the 2nd DC terminal 112b.
Figure 1B illustrates another preferred embodiment of power conversion system 150, it have be connected with the input AC of terminal 162a, 162b and 162c 160 and DC output connect 170, NPC DC connection has DC terminal 172a and 172b in this case, and two be connected in series capacitor C1 and C2 that limit central neutral common nodes 0.This system 150 is built as three grades of NPC rectifiers, is used to use even-order harmonic to eliminate (EHE) SVM on-off control system 140 and converts heterogeneous AC input to the DC power supply, to drive aforesaid switching network 130.In this embodiment, three-phase AC power supplies 164 provides phase voltage on AC end line LA, LB and LC, phase voltage is converted into the DC bus voltage on the DC terminal 172 then, and wherein switching network 130 uses EHE SVM technology described herein to drive, and is used for the open circuit balance of neutral point voltage.
Referring to Fig. 1 C, control system of using in the inverter 140 and rectifier systems 100 and 150 are to provide the even-order harmonic of switch controlling signal SC group to eliminate (EHE) controller by space vector modulation.Can use any suitable SVM system 140, provide the neutral point balance to use the voltage on balanced capacitor C 1 of open circuit mode and the C2 at power conversion system 110,150 duration of works.Embodiment 140 is based on the system of processor, and this processor comprises and be used to store the data that realize said function and the memory (not shown) of instruction, but also can use other processing unit, such as FPGA (Field Programmable Gate Array) etc.Shown in Fig. 1 C, exemplary controller 140 provides the system of the space vector modulation with processor 142, this processor control is used for optionally driver for isolating circuit or other drive assembly 144 of driving power converter switch network 130 switch S, is used to make single AC terminal 122,162 to be coupled to one of DC terminal 112,172 or common node 0.Processor 142 can be treatment facility, logical circuit, software, firmware or its combination of any kind, it constitutes switch controlling device together with SVM EHE vector switch sequence 146, in this case, for inverter 100 (Figure 1A) or rectifier (Figure 1B) situation, the half-wave symmetrical switch by network 130 is provided is with the voltage on open circuit mode balanced capacitor C1 and the C2.On off sequence 146 can be any other expression of hardware, software or its combination of vector sequence listings of each fragment of file, data structure, one group of machine readable instructions or value or representation space Vector Modulation figure.
Referring to Fig. 3 and 4, exemplary space vector modulation Figure 200 is shown.When power supply changeover device 100,150 work, the processor 142 of Fig. 1 C is according to reference vector V
REF(Fig. 4) and according to EHE SVM vector switch sequence 146 come Control Driver 144.Especially, driver 144 and thereby switching network 130 according to V
REFCurrent location in space vector modulation Figure 200 is controlled, and this Figure 200 has 19 fixed space vector V 0-V18 of 27 on off states of expression three step switch network 130.Zero vector (V on figure central authorities or the initial point
0) have 0 amplitude and comprise three Redundanter schalter states [PPP], [000] and [NNN], wherein first figure place is represented the on off state of the first switches set 130a (Figure 1A), second order digit is corresponding to second switch group 130b, and the 3rd figure place is represented the on off state of switches set 130c.Like this, digital " 0 " represents that respective switch group 130 is connected to AC terminal 122 situation (the switch S among the switches set 130a for example of neutral point 0
A2And S
A3Conducting).Numeral " P " (for example just) expression respective switch group 130 is connected to AC terminal 122 situation (the switch S of first (+) DC terminal 112a
A1And S
A2And numeral " N " (for example negative) expression respective switch group 130 is connected to AC terminal 122 to the respective drive of S the situation (switch S of second (-) DC terminal 112b by suitable switch conducting),
A3And S
A4Conducting).Fig. 3 and 4 chart 200 comprise the small vector V1～V6 with amplitude Vd/3, and comprise two Redundanter schalter states, one comprises [P] and another comprises [N], therefore can be expressed as P or N type small vector with on off sequence (among following Fig. 2 A and the 2B) selectively, wherein Vd is the DC bus voltage on the terminal 112.In addition, chart 200 provides and has amplitude 3
-2Medium vector V 7～V12 of Vd/3, and big vector V 13～V18 with amplitude 2Vd/3.
Fig. 3 and 4 chart 200 are definition double-deck hexagons around 6 zones (zone 1 among Fig. 4 is to zone 6) that initial point (with the corresponding chart of zero vector V0 center) is placed, wherein each zone has 6 triangle fragments, be denoted as K-1a, K-1b, K-2a, K-2b, K-3 and K-4, wherein K is zone number (1～6), illustrates as Fig. 4 the best.Each fragment is limited by unique one group of three space vector V on leg-of-mutton each angle of correspondence, wherein triangle fragment 1-1a and 1-1b are constituted as a grouping, each is corresponding to the triangle that is made of V0, V1 and V2, and all correspondingly definition in chart 200 of other sub-fragment.Reference vector V
REFPosition is at any given time determined by SVM processor controls 142, respective entries in these SVM processor controls 142 reference switch sequences 146 tabulation then, be used for by the switch controlling signal SC that optionally sorts corresponding to the various combinations of the three-level schema of three definition space vector V of current fragment, to realize the space vector modulation of switching network 130.In addition, according to the specific V in the given triangular plot fragment
REFReference vector V is considered in the position
REFWith each degree of closeness of three definition space vector V, can determine the duration (time of staying) of switching mode.
Referring to Fig. 1 D and 1E, the exemplary reference vector position among the fragment 1-2a of Fig. 4 provides and relates to the Vector Modulation that defines vector V 1, V2 and V7.Time T a, Tb and Tc that controller 140 rests on the particular switch state of V1, V7 and V2 respectively calculate according to relational expression V1Ta+V7Tb+V2Tc=VrefTs, and wherein sampling period Ts=Ta+Tb+Tc and Ts are according to the V of reference vector
REFSelected speed calculate (according to the sample frequency fTs=1/f of inverter system 100).Known sampling period Ts and modulation index Ma, the time of staying of given fragment calculates according to the formula among the form 148a of Fig. 1 D, and for V among the figure section 1-2a
REFThe exemplary reference position, on off state sequence and corresponding time are shown in the form 148b of Fig. 1 D.Like this, SVM control system 140 is according to the reference vector position and carry out the space vector modulation of network switchings 130 according to EHE vector switch sequence 146.
Fig. 2 A and 2B illustrate other details of exemplary EHE SVM vector switch sequence 146, and this EHE SVM vector switch sequence 146 provides the open circuit even-order harmonic to suppress by half-wave symmetric sequences clauses and subclauses or eliminates (EHE).In this respect, the inventor understands half-wave symmetry in the SVM on off sequence 146 is convenient to reduce even-order harmonic in the AC power supplies, and even-order harmonic eliminates and to provide DC to understand the execution balance of voltage in 110,170, and do not need the FEEDBACK CONTROL to NPC transducer 100,150.In addition, the exemplary sequence 146 of Fig. 2 A and 2B is by providing this open circuit even-order harmonic to eliminate for the careful genbank entry of selecting of SVM figure section.This vector switch sequence 146 can be any type of storage, tabulation, database, file etc., is operated according to three grades of NPC power conversion systems of this sequence neutral voltage balance of can opening a way.
In the embodiment shown, this sequence 146 comprises the machine readable media such as the processor readable memory, it comprises the vector sequence listings by each of 6 fragments of SVM chart 200 definition, and wherein each tabulation is shown as a plurality of 7 entry column in the table format of Fig. 2 A and 2B is represented.Although each vector sequence listings of each fragment comprises 7 on off state clauses and subclauses in the exemplary sequence 146, other embodiment also is possible, and wherein any amount of three or more clauses and subclauses can provide to each regional particular list.Row and column form shown in Fig. 2 A and the 2B person only is for the ease of understanding, and actual sequence 146 can carry out index according to the reference vector regional location by this layout sequence with any appropriate format storage.In addition, although each tabulation definition is corresponding to a series of on off states of three space vectors of definition corresponding figures section, wherein each on off state connect phase terminal 122,162 to three AC each provide, but can make up other embodiment of the transducer with three above AC phase places, wherein the respective entries in the sequence 146 will provide with the additional character clauses and subclauses of respective numbers (P, 0 or N).
In order to be illustrated in the operation of the sequence 146 that adopts among the above-mentioned transducer embodiment, notice during beginning: the clauses and subclauses of regional 1-2a provide a succession of vector V that defines three grades of SVM on off state P00, P0N, 00N, 0NN, 00N, P0N and P00 respectively among Fig. 2 A
1P, V
7, V
2N, V
1N, V
2N, V
7And V
1PIn addition, shown in the sequence 146, for the vector switch sequence about the opposite figure section of the former point symmetry of figure (on the diameter opposite fragment) definition comprises the on off state that symmetry is opposite.Thereby as shown in Figure 4, regional 4-2a is opposite on diameter with reference vector fragment 1-2a.As in the sequence 146 among Fig. 2 B as seen, the clauses and subclauses of regional 4-2a are passed through vector V respectively among Fig. 2 A
4N, V
10, V
5P, V
4P, V
5P, V
10And V
4NContinuous supply provide symmetry opposite on off state N00, N0P, 00P, 0PP, 00P, N0P and N00.Like this, the half-wave symmetry connects on 120,160 at AC to be guaranteed, causes the inhibition of even-order harmonic or eliminates the neutral voltage balancing that is connected with DC on 110,170 substantially.In addition, this balance realizes in the open circuit mode, thereby need not complicated and expensive closed loop neutral equilibrium control.As among Fig. 2 A and the 2B as seen, the vector sequence listings of each fragment comprise each (for example each AC phase place) of representing three switches set 130 in the conventional system respectively three may the on off state level 7 on off state clauses and subclauses of one of (P), zero (0) or negative (N) just, wherein comprise the on off state that symmetry is opposite about each opposite vector sequence listings on initial point (V0) diameter of figure to the first and second figure sections, wherein just (P) level in the list of entries of first fragment is corresponding to negative (N) level in the list of entries of second fragment, and vice versa.Like this, when reference vector during around one of space vector Figure 200 revolution rotation, each phase voltage waveform (Line To Line and line are to neutral point) comprises the half negative circulation of half positive circulation and symmetry, further specifies and describes with reference to Fig. 5 and 10A as following.
Referring now to Fig. 1 F,, a kind of illustrative methods 180 of the space vector modulation control of the three stage power source converting system that is used for the others according to the present invention is shown.Although this method 180 describes and describes with the demonstration of a series of actions or incident below, be appreciated that the whole bag of tricks of the present invention be not limited to these actions or incident shown in the ordering.Like this, unless hereinafter specify, run or incident can by different order and/or with except that other action of this explanation and description or incident, carrying out synchronously according to the present invention.Be also noted that, be not all illustrate step all be realize necessary according to process of the present invention or method, and one or more these actions capable of being combined.Method shown in of the present invention and other method available hardware, software or its combination realize, so that SVM modulation controlled function described herein is provided, and can in including but not limited to the wide modulation of any tertiary vein NPC power conversion system of said system 100 and 150, adopt, wherein the present invention is not limited to application-specific and the embodiment in this explanation and description.
The general continuous loop mode of method 180 usefulness is carried out, and the wherein current controlling of sampling cycle is by the reference vector V of the expectation state of acquisition expression power conversion system
REFIn 182 beginnings.This method 180 continues 184, wherein determines the position (zone and fragment) of reference vector fragment in SVM Figure 200.Based on V
REFCurrent location, vector sequence listings provides switch controlling signal 186 to power conversion system according to the fragment and the regional location of reference vector, wherein sequence list provides half-wave symmetric sequences definition.In the example shown, comprise at 186 switch controlling signals that provide: 188 obtain with from the corresponding vector switch sequence list in the reference vector position of SVM vector switch sequence, this SVM vector switch sequence is included as the sequence list of figure section definition opposite on the diameter that comprises the opposite on off state of symmetry, shown in the exemplary sequence 146 among above Fig. 2 A and the 2B.190, the compute switch time (for example Yi Shang Ta, Tb and Tc) to be using each on off state of vector sequence listings in the cycle in current controlling of sampling, and each on off state of vector sequence listings is used with according to controlling power conversion system the switching time that calculates 192.Then, next control cycle is in 194 beginnings, and process 180 repeats follow-up Control Circulation, as mentioned above.
Referring now to Fig. 5-8,, use above-mentioned EHE modulation concept of the present invention that the analog result of three grades of NPC SVM inverters of Figure 1A is shown.NPC inverter 100 is modeled as the rated power of 1MVA, and operates on the AC of 60Hz output frequency, and wherein threephase load LA, LB and LC comprise 17.3 ohm resistor being connected in series and the inductor of 2.3mH respectively.Analog input dc voltage on terminal 112 is 5600v DC, uses 2400 μ F capacitor C1 and C2, and wherein sample frequency is 1.44KHz.The phase voltage waveform V of the line that Fig. 5 illustrates the result simulation of showing whole circulation in the inverter 100 to line, line to neutral point
A0And V
AB, show the attainable half-wave symmetry of careful definition by on off sequence 146.As mentioned above, the inventor has been found that this half-wave symmetry has reduced even-order harmonic, and causes effective neutral voltage balancing, and it is adaptive to need not closed loop.
For this feature performance benefit is described, Fig. 6 provides in three grades of SVM modulated inverters that are illustrated in the similar design of using conventional SVM switch controlling schemes, and the line of function that is depicted as modulation index MI is to the curve chart 400 of the even-order harmonic content of line waveform.In this curve 400, V
AB, nBe the rms value of nth harmonic, V
AB, 1, MAXBe that line is to phase of line voltage V
ABThe maximum rms value of middle solvent, and MI is a modulation index.As seen, even-order harmonic is important when using conventional SVM transducer control technology from curve chart 400.Like this, existing SVM method provides has the vector sequence of two kinds of design considerations or target to select, and mainly is the switching frequency of switch S in the restriction converter switch network 130.The first conventional SVM sequences Design standard is that (in the given fragment) only should relate to twice switch change from a switch state to next on off state, once by another time conducting.Another modular design target is that the on off state that the conversion from SVM figure section to next SVM figure section should relate to minimum number changes, preferably twice or still less.These design objects or consideration are considered when selection is used for the ordinary tap sequence of simulated performance shown in Figure 6.Yet shown in curve chart 400, conventional SVM method produces a large amount of even-order harmonics, causes the unbalance problem of neutral points a large amount of in the three stage power source transformation applications.
Referring now to Fig. 7,, curve chart 500 illustrates three grades of simulation even-order harmonic contents in the SVM control inverter, and wherein three grades of SVM control inverters are such as Figure 1A inverter 100 of the SVM control system 140 of using Fig. 1 C with the EHE SVM vector switch sequence 146 of Fig. 2 A and 2B.Curve chart 500 clear demonstrations are by using line that half-wave symmetric sequences 146 produces to line voltage V
ABSuppress effectively or eliminated all even-order harmonics in the AC output.With reference to as described in Fig. 2 A and the 2B, EHE vector switch sequence 146 is configured in about any two zones of the former point symmetry of space vector Figure 200 by V as above
REFThe inverter phase voltage that produces has mirror image voltage, realizes the half-wave symmetry by this mirror image contact potential series 146, as shown in Figure 5.Analog result in Fig. 7 curve chart 500 and the explanation of the waveform of Fig. 5, EHE SVM system 140 provides open circuit waveform symmetry and even-order harmonic to eliminate.
Also referring to Fig. 8, the inventor has also simulated total harmonic distortion (THD) level of sequence 146, shown in curve chart 550, shows the V that is produced by conventional SVM sequence and new EHE SVM sequence solution 146 respectively
ABTHD curve 552 and 554.As seen, sequence 146 is compared with routine techniques to sacrifice basically and seldom or is not sacrificed the THD level in curve chart 550, and wherein curve 552 and 554 is about the same.Although do not wish to ascribe any particular theory to, it has been generally acknowledged that analogous THD level is because used identical fixed vector to select and residence Time Calculation in two kinds of simulation situations.In addition, the conversion that the exemplary EHE SVM sequence 146 of Fig. 2 A and 2B has satisfied from an on off state to next on off state (fixedly in the fragment) should only relate to the standard of twice switch change, has loosened the above-mentioned conventional restriction that on off state that conversion from a SVM figure fragment to next fragment should relate to minimum number changes simultaneously.Yet for given sample frequency, the facility switching frequency of new sequence 146 only than the summary height of conventional scheme a bit.For example, in above-mentioned simulation situation, use the facility switching frequency of ordinary tap sequence to be 750Hz, and the facility switching frequency of EHE sequence 146 shown in using only increase to 780Hz, wherein V
REFSome conversions of moving from the fragment to the fragment relate to 4 switches of new departure, but not two switches of conventional scheme.Thereby, consider at first it seems it is non-expectation although loosen second conventional design, but, only allow the switching frequency of trace to increase simultaneously, and do not sacrifice the THD level by the main advantages that the half-wave symmetry that exemplary EHE sequence 146 provides provides relevant neutral point balance and even-order harmonic to eliminate.
Referring now to Fig. 9 A-11,, experimental result also confirms the feature performance benefit of above-mentioned open circuit SVM EHE notion.The three-stage inverter of type shown in Figure 1A uses two seven clauses and subclauses SVM on off sequences to estimate, is used for comparison and the new EHE SVM technology of checking.The one SVM sequence is the conventional SVM scheme with even and odd harmonic, and second experimental program uses EHE on off sequence 146, and it does not produce even-order harmonic.The experiment parameter that uses in two kinds of situations comprises that dc voltage 300VDC on the terminal 112 is to produce line to line AC output voltage 208VAC, DC capacitor C1=C2=4700 μ F wherein, and the load of AC phase place comprises 3.2 ohm resistor and the inductor of 15mH, the PWM sample frequency is 1080Hz, wherein modulation index MI is the peak value of Vab/Vdc, all is about 0.9 in two experiments.Fig. 9 A provides the curve chart of the experiment line in three grades of SVM control inverters that use conventional SVM switch controlling schemes to neutral Points And lines to line voltage waveform Va0 and Vab respectively is shown, and Fig. 9 B is illustrated in the experiment line response curve Figure 61 0 to neutral Points And lines to line voltage even and odd harmonic content curves Va0 and Vab in the SVM inverter that uses conventional SVM switch controlling schemes.Shown in the wavy curve of curve chart 600, conventional SVM technology can not provide waveform symmetry, and the curve 610 of Fig. 9 B illustrates the appearance of considerable even-order harmonic in AC output.
The analogous curve 700 and 710 (for example adopting the sequence 146 of Fig. 2 A and 2B) of the above-mentioned EHE SVM method that the even-order harmonic that is used to open a way that Figure 10 A and 10B illustrates respectively suppresses.Curve chart 700 among Figure 10 A illustrates the voltage waveform of line to the center Points And lines to line such as the experiment in three grades of SVM control inverters of Figure 1A of the EHE AVM vector switch sequence of the SVM control system of using Fig. 1 C and Fig. 2 A and 2B, the half-wave symmetry of the voltage waveform of its center line to the center Points And lines to line in Figure 10 A as seen.In addition, the harmonic content curve chart 710 of Figure 10 B illustrates the harmonic content curve of the corresponding experiment among the EHE SVM, compares with the curve 610 of Fig. 9 B to have sizable even-order harmonic inhibition.Thereby experiment demonstration EHE SVM technology provides in three grades of NPC power conversion systems to be controlled the open circuit of even-order harmonic.
Figure 11 illustrates capacitor C1 and C2 respectively and goes up corresponding experimental voltage VC1 and VC2 as the function of time, and wherein voltage ratio is every lattice 25v.Curve 800 illustrates the analogous balance of voltage situation of experiment of conventional and EHE SVM technology, and wherein conventional SVM on off sequence is illustrated as pattern A in curve chart 800, and EHESVM sequence 146 is illustrated as pattern B.High-visible in Figure 11, when using new SVM sequence 146 (pattern B), dc voltage VC1 on capacitor C1 and the C2 and VC2 equate (the neutral point balance of opening a way preferably) in fact.On the contrary, the application of conventional SVM sequence (pattern A) makes neutral point depart from the mid point of DC bus greatly, and wherein condenser voltage VC1 and VC2 differ almost 60VDC in the curve 800.Once, the present invention can be implemented as to provide closes the main advantages that neutral voltage balancing and even-order harmonic are eliminated, and can influence THD level, no a large amount of switching frequency reduction sharply and not have the complexity or the expense of closed loop neutral point balance sysmte.
More than each example only illustrated that the some of various aspects of the present invention may embodiment, wherein those skilled in the art can do equivalence and change and/or change after reading and having connected this specification and accompanying drawing.Especially with respect to each function of carrying out by above-mentioned each assembly (assembly, equipment, system, circuit etc.), the term (comprising quoting " device ") that is used for describing these assemblies is intended to any assembly corresponding to (pointing out unless have in addition) such as hardware, software or its combination, even it structurally is not equal to the open structure of carrying out function in the realization of the present invention, it also carries out the appointed function (that is, being functional equivalents) of described assembly.In addition, although special characteristic of the present invention discloses with reference to one of some realizations, this feature can be as required and one or more further features combinations of other realization, and help any given or application-specific.In addition, with regard to be used to describe in detail and/or the term of claim " comprises ", with regard to " comprising ", " having ", " having ", " having " or its variant, these terms are intended to represent to include to be similar to the mode that term " comprises ".
Claims (10)
1. a three stage power source converting system (100,150) comprising:
Be used to receive or provide the DC of DC power supply to connect (110), described DC connect (110) comprise the first and second DC terminals (112) and first and DC terminal (112) between the first and second capacitor (C of series coupled
1, C
2), described capacitor is gone up coupling at common node (0);
Be used to receive or provide the heterogeneous AC connection (120) of polyphase source, described AC connects (120) and comprises first, second and the 3rd AC terminal (122), and
Three step switch network (130) comprising:
The first group of switchgear (130a) that is connected the coupling of (110) and described first AC terminal (122a) with described DC, one of described first group of available three state operations is with according to first group of switch controlling signal (SC
A) with first AC terminal (122a) one of electrical couplings to a DC terminal (112a), DC terminal (112b) and common node (0) selectively,
The second group of switchgear (130b) that is connected the coupling of (110) and described AC terminal (122b) with described DC, one of described second group of available three state operations is with according to second group of switch controlling signal (SC
B) with second AC terminal (122b) one of electrical couplings to a DC terminal (112a), DC terminal (112b) and common node (0) selectively, and
The 3rd group of switchgear (130c) that is connected the coupling of (110) and described the 3rd AC terminal (122c) with described DC, one of described the 3rd group of available three states operations is with according to the 3rd group of switch controlling signal (SC
C) with the 3rd AC terminal (122c) one of electrical couplings to a DC terminal (112a), the 2nd DC terminal (112b) and common node (0) selectively; And
On-off control system (140) provides many group switch controlling signals (SC) by space vector modulation, with power conversion system (100,150) operating period with open circuit mode equalizing capacitor (C
1, C
2) on voltage.
2. power conversion system (100 as claimed in claim 1,150), it is characterized in that, described on-off control system (140) comprises with the even-order harmonic of described three step switch network (130) coupling eliminates the space vector modulation system, described space vector modulation system eliminates vector switch sequence (146) according to even-order harmonic and provides many group switch controlling signals (SC) by space vector modulation, thereby provides balance common node (0) to go up the half-wave symmetry of voltage.
3. power conversion system as claimed in claim 2 (100,150) is characterized in that, described space vector modulation system (140) is according to reference vector (V
REF) position in space vector modulation figure (200) provides many group switch controlling signals (SC), described space vector modulation figure (200) has 19 fixed space vectors of 27 on off states of the described three step switch network of expression (130), and qualification is positioned at initial point (V0) 6 zones on every side, described each zone has 6 triangle segments, and each segment is limited by unique one group of three space vector on the angle of corresponding triangle fragment;
Wherein said vector switch sequence (146) is at described reference vector (V
REF) use in given segment the time with three corresponding on off states of space vector that limit described given segment the switch vector sequence is provided; And
Wherein said vector switch sequence (146) definition and the corresponding a series of on off states of three space vectors that limit each segment wherein provide the symmetrical opposite coupling of AC terminal (122) with the described first and second DC terminals (112) for the vector switch sequence about the opposite figure section definition of initial point (V0) symmetry of described figure.
4. a space vector modulation control system (14), be used for to three stage power source converting system (100,150) provide switch controlling signal (SC), a pair of capacitor (C that described converting system (100,150) has and is connected in series between the first and second DC terminals (112)
1, C
2) DC connect (110), described control system (140) comprising:
Drive assembly (144), be used for optionally driving described power conversion system switching network (130) each switch or each is to switch, so that each AC terminal (122) of described power conversion system is coupled to one of a DC terminal (112a), the 2nd DC terminal (112b) and common node (V0) selectively; And
Switch controlling device (142,146) is used for by space vector modulation controlling and driving apparatus so that the voltage of the open circuit operation of the described power conversion system of balance on described capacitor.
5. control system as claimed in claim 4 (140) is characterized in that, described switch controlling device comprises:
Even-order harmonic is eliminated vector switch sequence (146); And
Processing unit (142) is used for according to reference vector (V
REF) and control described drive assembly (144) according to described vector switch sequence (146).
6. control system as claimed in claim 5 (140) is characterized in that, described processing unit (142) is according to reference vector (V
REF) position in space vector modulation figure (200) comes controlling and driving apparatus (144), described space vector modulation figure (200) has 19 fixed space vectors of 27 on off states of the described three step switch network of expression (130), and qualification is positioned at initial point (V0) 6 zones on every side, described each zone has 6 triangle segments, and each segment is limited by unique one group of three space vector on the corresponding triangle fragment corner;
Wherein said vector switch sequence (146) is at described reference vector (V
REF) use in given segment the time with three corresponding on off states of space vector that limit described given segment the switch vector sequence is provided; And
Wherein said vector switch sequence (146) definition and the corresponding a series of on off states of three space vectors that limit each segment wherein provide the symmetrical opposite coupling of AC terminal (122) with the described first and second DC terminals (112) of power conversion system for the vector switch sequence about the opposite figure section definition of initial point (V0) symmetry of described figure.
7. control system as claimed in claim 5 (140), it is characterized in that, described even-order harmonic is eliminated vector switch sequence (146) and is comprised a machine readable media, it comprises the vector sequence listings of each section of space vector modulation figure (200), the fixed space vector of the on off state of definition expression switching network (130) and definition are positioned at initial point (V0) a plurality of zones on every side of space vector modulation figure (200), each zone all has a plurality of triangle fragments, each fragment is all defined by unique one group of three space vector on the angle of corresponding triangle fragment, wherein each vector sequence listings definition and the corresponding a series of on off states of three space vectors that define each fragment, wherein the symmetrical opposite vector switch sequence of the initial point with respect to figure (V0) for the definition of figure section comprises the on off state that symmetry is opposite.
8. vector switch sequence (146) that is used for the space vector modulation of switching network (130) in the three stage power source converting system (100,150), described vector switch sequence (146) comprising:
One machine readable media, it comprises the vector sequence listings of each section of space vector modulation figure (200), the fixed space vector of the on off state of definition expression switching network (130) and definition are positioned at initial point (V0) a plurality of zones on every side of space vector modulation figure (200), each zone all has a plurality of triangle fragments, each fragment is all defined by unique one group of three space vector on the angle of corresponding triangle fragment, wherein each vector sequence listings definition and the corresponding a series of on off states of three space vectors that define each fragment, wherein the symmetrical opposite vector switch sequence of the initial point with respect to figure (V0) for the definition of figure section comprises the on off state that symmetry is opposite.
9. the method (180) of a space vector modulation control that is used for the three stage power source converting system, described method (180) comprising:
The vector switch sequence (146) of space vector modulation is provided, it comprises the vector sequence listings of each section of space vector modulation figure (200), each vector sequence listings definition and the corresponding a series of on off states of three space vectors that define each fragment, wherein the symmetrical opposite vector switch sequence of the initial point with respect to figure (V0) for the definition of figure section comprises the on off state that symmetry is opposite;
Obtain the reference vector (V of (182) expression power conversion system (100,150) expectation state
REF);
Determine the position of (184) reference vector section on space vector modulation figure (200), the space vector of the on off state of definition expression switching network (130) and definition are positioned at initial point (V0) a plurality of zones on every side of space vector modulation figure (200), each zone all has a plurality of triangle fragments, and each fragment is all defined by unique one group of three space vector on the angle of corresponding triangle fragment; And
Vector sequence listings according to the reference vector fragment position provides (186) switch controlling signal to power conversion system (100,150).
10. method as claimed in claim 9 is characterized in that, provides (186) switch controlling signal to comprise according to the vector sequence listings of reference vector fragment position:
Use the switching time of each on off state of described vector sequence listings based on described reference vector fragment position calculation (190); And
The on off state of using (192) described vector sequence listings is with according to controlling described power conversion system the switching time of being calculated.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US67171405P | 2005-04-15 | 2005-04-15 | |
| US60/671,714 | 2005-04-15 | ||
| US11/354,597 | 2006-02-14 |
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| CNA2006100748253A Pending CN1921279A (en) | 2005-04-15 | 2006-04-17 | DC voltage balance control for three-level npc power converters with even-order harmonic elimination scheme |
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