CN1909155A - Panel display device with knot type field effect tube cathodic control array structure and its production technique - Google Patents
Panel display device with knot type field effect tube cathodic control array structure and its production technique Download PDFInfo
- Publication number
- CN1909155A CN1909155A CN 200610048509 CN200610048509A CN1909155A CN 1909155 A CN1909155 A CN 1909155A CN 200610048509 CN200610048509 CN 200610048509 CN 200610048509 A CN200610048509 A CN 200610048509A CN 1909155 A CN1909155 A CN 1909155A
- Authority
- CN
- China
- Prior art keywords
- layer
- type
- heavily doped
- doped region
- silicon wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)
Abstract
The invention relates to a plate display in junction field effect transistor cathode control array emission structure and relative production, wherein it comprises an anode glass panel, a cathode glass panel, and a sealing vacuum chamber surrounded by four glass frames; the anode glass panel is arranged with anode conductive layer and a fluorescent powder layer is above the conductive layer; a support wall structure and a gattering additional element are between the anode glass panel and the cathode glass panel to adjust the emission electron ability of carbon nanometer tube cathode relative to the pixel point to make it emit electron uniformly and stably; a control grid, a carbon nanometer tube cathode and junction field effect transistor cathode control array emission structure are arranged on the cathode glass panel. The invention can effectively reduce the working voltage and improve the production success, with lower cost and simple structure.
Description
Technical field
The invention belongs to the mutual crossing domain of vacuum science and technology, microelectronics science and technology, plane Display Technique and nanometer science and technology, relate to the element manufacturing of panel field emission display, be specifically related to the content of element manufacturing aspect of the panel field emission display of carbon nanotube cathod, specially refer to the element manufacturing and the manufacture craft thereof that have technotron cathodic control panel field emission display structure, carbon nanotube cathod.
Background technology
Carbon nano-tube has little tip curvature radius, high aspect rate and excellent conducting performance, can launch a large amount of electronics under the alive outside effect, has unique field emission characteristics, has caused showing great attention to of numerous researchers.For the dull and stereotyped field emission flat-panel display that utilizes carbon nano-tube as cathode material, the height of image quality is one of key index of integral display spare making success or not.And realize a large amount of electronics of emission that carbon nanotube cathod can be even, stable, this is the precondition that shows good image.
At present, the technology of preparation carbon nanotube cathod roughly can be divided into two classes, and a class is a grafting, promptly by silk-screen printing technique carbon nanotube cathod is produced on the large tracts of land substrate, is used as the negative electrode of flat-panel display device; Be subjected to the influence of various factorss such as concrete manufacture craft and doping slurry, carbon nano-tube electron emission ability after the transplanting has descended many, so how to take effective measures, guarantee even, the reliable and stable a large amount of electronics of emission of large-area carbon nanotube cathod realization, this is the problem that the researcher requires careful consideration.And another kind of be exactly the direct growth method, promptly on existing backing material, directly carry out the growth of carbon nanotube cathod; Utilize the carbon nanotube cathod stand density height of this method preparation, electron emission current density is big, and its field emission characteristics is better, but has unfavorable factor such as complex manufacturing technology.
Along with the increase of device display area, the quantity of carbon nano-tube is also in rapid increase.Be subjected to the influence of various extraneous factors, the field emission ability of different carbon nanotube cathods is difference to some extent, thereby the luminous degree that causes its corresponding light emitting pixel point also can be different, and this has just produced adverse effect to image quality.At this moment, need carry out extra circuit and carry out electricity and regulate, expectation allows and applies higher a little voltage on the poor carbon nanotube cathod of emitting electrons ability, launches more electronics, improves the luminosity of institute's corresponding pixel points; Apply lower a little voltage on the more intense carbon nanotube cathod of emitting electrons ability and allow, reduce the quantity of emitting electrons, reduce the luminosity of institute's corresponding pixel points, thereby guarantee the stability and the uniformity of whole display image.These all are the realistic problems of being badly in need of solution.
In addition, under the prerequisite of guaranteeing the display excellent image quality, also need further to reduce the element manufacturing cost; When can carrying out the broad area device making, it is complicated to need also to make that device fabrication processes avoids, and helps carrying out business-like large-scale production.
Summary of the invention
The objective of the invention is to overcome the deficiencies in the prior art and a kind of carbon nanotube cathod field emission flat-panel display knot type field effect tube cathodic control array structure, that manufacturing process is with low cost, that rate of finished products is high, simple in structure and reliable and stable that has is provided.
The object of the present invention is achieved like this: comprise by cathode glass faceplate, anode glass panel and all around glass enclose the sealed vacuum chamber that frame constitutes; Anode conductive layer and the phosphor powder layer of preparation on anode conductive layer that photoetching is arranged on the anode glass panel; Carbon nanotube cathod, control grid and knot type field effect tube cathodic control array structure that preparation is arranged on cathode glass faceplate; Supporting wall structure between anode glass panel and cathode glass faceplate and getter subsidiary component.
The backing material of described knot type field effect tube cathodic control array structure is a doped silicon wafer, and its doping type is the n type; There is a p type heavily doped layer in the dorsal part of n type doped silicon wafer; Etching is carried out in the front of n type doped silicon wafer, etches three square region; The etch areas plane will be lower than the original surface plane of n type doped silicon wafer; Three square region are a unit, and this element can repeated arrangement; Three square region are heavily doped region, are respectively n type heavily doped region, p type heavily doped region, n type heavily doped region; N type heavily doped region in the front doped region of n type doped silicon wafer is positioned at the both sides of p type heavily doped region; There is an insulating barrier in the surface in n type doped silicon wafer front; Silicon dioxide layer after the etching need expose n type heavily doped region and the p type heavily doped region below the silicon dioxide layer respectively, but all the other positions are all covered; There is a metal level in the upper surface of n type doped silicon wafer, and the metal level after the etching lays respectively at the upper surface of silicon dioxide layer, the upper surface of n type heavily doped region and the upper surface of p type heavily doped region, but is disconnected mutually between them; The metal level that is positioned at the upper surface of silicon dioxide layer is the control grid conducting layer, the metal level of the upper surface of p type heavily doped region is that negative electrode is regulated conductive layer, the metal level of the upper surface of a n type heavily doped region is a source layer, and the metal level of the upper surface of another n type heavily doped region is a drain electrode layer; There is a grid cover layer above the control grid conducting layer; Catalyst metal layer of the top existence of drain electrode layer; Can utilize catalyst metal layer to carry out the preparation of carbon nano-tube.
The fixed position of described knot type field effect tube cathodic control array structure is for being fixed on the cathode glass faceplate; Metal level at the upper surface evaporation of n type doped silicon wafer can be crome metal, molybdenum, gold, silver, platinum.Catalyst metal layer can be metallic iron, cobalt, nickel.
A kind of manufacture craft that has the flat-panel monitor of knot type field effect tube cathodic control array structure, its manufacture craft is as follows:
1) making of substrate: n type doped silicon wafer is carried out scribing, form substrate;
2) making of dorsal part p type heavily doped layer: prepare a p type heavily doped layer at the dorsal part of n type doped silicon wafer, form dorsal part p type heavily doped layer after the etching;
3) etching in n type doped silicon wafer front: the front surface to n type doped silicon wafer carries out etching, etches three square region; The plane of requirement etch areas will be lower than the original surface plane of n type doped silicon wafer; These three square region are a unit simultaneously, and such unit can be in the front surface repeated arrangement of n type doped silicon wafer;
1) doping of n type doped silicon wafer etch areas: the etch areas to n type doped silicon wafer is carried out heavy doping respectively, makes it all form heavily doped region, is respectively n type heavily doped region, p type heavily doped region, n type heavily doped region; In the middle of wherein p type heavily doped region is positioned at, and n type heavily doped region is positioned at the both sides of p type heavily doped region;
5) making of insulating barrier: the front surface in n type doped silicon wafer is prepared the layer of silicon dioxide layer, as insulating barrier; To expose following n type heavily doped region and p type heavily doped region in the insulating barrier after the etching, but all the other positions are all covered;
6) making of conductive layer: the front surface evaporation layer of metal chromium in n type doped silicon wafer, form grid conducting layer after the etching respectively, anode is regulated conductive layer, source electrode conductive layer and drain electrode conductive layer;
7) the tectal making of grid: on grid conducting layer, prepare the layer of silicon dioxide layer, form the grid cover layer after the etching;
8) making of catalyst metal layer: on the drain electrode conductive layer, prepare the Raney nickel metal level;
9) cleaning surfaces of knot type field effect tube cathodic control array structure: clean is carried out on the surface to knot type field effect tube cathodic control array structure, removes impurity and dust;
10) preparation of carbon nanotube layer: utilize catalyst metal layer to carry out the preparation of carbon nano-tube;
11) reprocessing of carbon nano-tube: carbon nano-tube is carried out reprocessing, improve field emission characteristics;
12) making of cathode glass faceplate: sodium calcium plate glass is carried out scribing, form cathode glass faceplate;
13) making of anode glass panel: sodium calcium plate glass is carried out scribing, form the anode glass panel;
14) making of anode conductive layer: evaporation one deck tin indium oxide rete on the anode glass panel forms anode conductive layer after the etching;
15) making of insulation paste layer: at the non-display area printing insulation paste layer of anode conductive layer;
16) making of phosphor powder layer: the viewing area printing phosphor powder layer on anode conductive layer; In the middle of baking oven, toast baking temperature: 120 ℃, the retention time: 10 minutes;
17) device assembling: with cathode glass faceplate, anode glass panel, supporting wall structure, glass encloses frame and knot type field effect tube cathodic control array structure is assembled together all around, and getter put in the middle of the cavity, fix with glass powder with low melting point; Around face glass, smeared glass powder with low melting point, fixed with clip;
18) finished product is made: the device that has assembled is carried out packaging technology form finished parts.
Described step 6 is specially the front surface evaporation layer of metal chromium in n type doped silicon wafer; Metal level after the etching is divided into four parts; A part is positioned at the upper surface of silicon dioxide layer, formation grid conducting layer, a part are positioned at the upper surface of the p type heavily doped region of n type doped silicon wafer front surface, formation negative electrode adjusting conductive layer, a part are positioned at the upper surface of n type heavily doped region, formation source electrode conductive layer, a part are positioned at the upper surface of another one n type heavily doped region, form the drain electrode conductive layer; This four partially conductives layer is disconnected mutually.
Described step 15 is specially the non-display area printing insulation paste layer at anode conductive layer, is used to prevent the parasitic electrons emission; Through overbaking (baking temperature: 150 ℃, retention time: 5 minutes) afterwards, be placed on and carry out high temperature sintering (sintering temperature: 580 ℃, retention time: 10 minutes) in the sintering furnace.
The device that described step 18 is specially having assembled carries out following packaging technology: toast in the middle of the sample device is put into baking oven; Carry out high temperature sintering in the middle of putting into sintering furnace; On exhaust station, carry out device exhaust, sealed-off, on the roasting machine that disappears, the getter of device inside bake and disappears, install pin formation finished parts at last additional.
The present invention has following good effect:
Feature of the present invention just is to have made knot type field effect tube cathodic control array structure, is used to regulate under the pixel emitting electrons ability of corresponding carbon nanotube cathod, makes a large amount of electronics of emission that it can be uniform and stable; On the basis of the good field emission characteristics that carbon nanotube cathod had that makes full use of the preparation of direct growth method, grid and carbon nanotube cathod height are integrated together simultaneously, help reducing the device operating voltage, improve the element manufacturing success rate.
At first, the knot type field effect tube cathodic control array structure among the present invention is to regulate the emission current of carbon nanotube cathod.When on source electrode, applying appropriate voltage, will be applied in the drain electrode by the conducting channel in n type doped silicon wafer, its voltage also will be applied to preparation on the carbon nanotube cathod in the drain electrode certainly; Yet when after applying appropriate voltage on the negative electrode adjusting conductive layer, the depletion layer that utilization forms in n type doped silicon wafer, will regulate the size of the conducting channel in the n type doped silicon wafer, just regulate the carbon nanotube cathod electric current of the conducting channel of flowing through, make and further strengthened for the control ability of carbon nanotube cathod electric current.When after applying voltage on the grid conducting layer, will form powerful electric field strength on the top of carbon nanotube cathod, force the carbon nano-tube emitting electrons, under the high-tension effect of anode, quicken the anode motion, impact fluorescence bisque and send visible light.Excessive when the electric current on a certain pixel, when pixel brightness is too high, pass through knot type field effect tube cathodic control array structure, can reach the effect that reduces the carbon nanotube cathod emission current by the conducting channel of the corresponding carbon nano-tube of this pixel of control; So, since electrons emitted reduces on the carbon nanotube cathod, the brightness of corresponding pixel also will reduce; Too small when the electric current of a certain pixel, when pixel brightness is low excessively, similar with the previous case, pass through knot type field effect tube cathodic control array structure, can be by the conducting channel of the corresponding carbon nanotube cathod of this pixel of control, reach the effect that increases the carbon nanotube cathod emission current, thereby improve the quantity of carbon nanotube cathod emitting electrons, the brightness of corresponding pixel also will strengthen.Utilize this knot type field effect tube cathodic control array structure, can regulate the electron emissivity of the carbon nanotube cathod under the different pixels point, reach the purpose of a large amount of electronics of emission of realizing that whole carbon nanotube cathod can be uniform and stable, thereby realize the uniformity and the stability of display image.
Secondly, grid and carbon nanotube cathod in knot type field effect tube cathodic control array structure of the present invention are integrated together.When n type doped silicon wafer front surface carries out the metal level etching, just produced grid conducting layer and drain electrode layer simultaneously, this drain electrode layer is the conductive layer of carbon nanotube cathod in fact just, and the two is disconnected.So just grid and carbon nanotube cathod height are integrated together, have reduced the technological process of element manufacturing, also greatly avoided the damage of carbon nanotube cathod simultaneously.Help further reducing the operating voltage of device, improve the power that is made into of integral device.
The 3rd, in knot type field effect tube cathodic control array structure of the present invention, on drain electrode layer, made catalyst metal layer, this has just done sufficient preparation for the growth of the carbon nanotube cathod in the subsequent technique, so just can be at the surperficial direct growth carbon nanotube cathod of drain electrode layer, make grid structure and carbon nanotube cathod structure be integrated together, help further improving the display resolution of device.Simultaneously, made full use of the good field emission characteristics that carbon nanotube cathod had of direct growth method preparation.
In addition, in knot type field effect tube cathodic control array structure of the present invention, do not adopt special structure fabrication material, do not adopt special device making technics yet, this has just further reduced the cost of manufacture of integral device to a great extent, simplify the manufacturing process of device, helped carrying out business-like large-scale production.
Description of drawings
Fig. 1 has provided the vertical structure schematic diagram of knot type field effect tube cathodic control array structure.
Fig. 2 has provided the transversary schematic diagram of knot type field effect tube cathodic control array structure.
Provided the structural representation of the embodiment of a carbon nanotube cathod field emission flat-panel screens that has a knot type field effect tube cathodic control array structure among Fig. 3.
Embodiment
Below in conjunction with drawings and Examples the present invention is further specified, but the present invention is not limited to these embodiment.
Described a kind of flat-panel monitor that has knot type field effect tube cathodic control array structure, comprise by cathode glass faceplate 10, anode glass panel 11 and all around glass enclose the sealed vacuum chamber that frame 16 is constituted; Anode conductive layer 12 and the phosphor powder layer 14 of preparation on anode conductive layer that photoetching is arranged on anode glass panel 11; Carbon nano-tube 9 negative electrodes, control grid 6 and knot type field effect tube cathodic control array structure that preparation is arranged on cathode glass faceplate 10; Supporting wall structure 15 between anode glass panel and cathode glass faceplate and getter 17 subsidiary components.
Described knot type field effect tube cathodic control array structure comprises that substrate 1, dorsal part p type heavily doped layer 2, source electrode conductive layer 3, negative electrode are regulated conductive layer 4, conductive layer 5, grid conducting layer 6, grid cover layer 7, catalyst metal layer 8 and carbon nanotube layer 9 parts drain.
The backing material of described knot type field effect tube cathodic control array structure is a doped silicon wafer, and its doping type is the n type; There is a p type heavily doped layer in the dorsal part of n type doped silicon wafer; Etching is carried out in the front of n type doped silicon wafer, etches three square region; The etch areas plane will be lower than the original surface plane of n type doped silicon wafer; Three square region are a unit, and this element can repeated arrangement; Three square region are heavily doped region, are respectively n type heavily doped region, p type heavily doped region, n type heavily doped region; N type heavily doped region in the front doped region of n type doped silicon wafer is positioned at the both sides of p type heavily doped region; There is an insulating barrier in the surface in n type doped silicon wafer front; Silicon dioxide layer after the etching need expose n type heavily doped region and the p type heavily doped region below the silicon dioxide layer respectively, but all the other positions are all covered; There is a metal level in the upper surface of n type doped silicon wafer, and the metal level after the etching lays respectively at the upper surface of silicon dioxide layer, the upper surface of n type heavily doped region and the upper surface of p type heavily doped region, but is disconnected mutually between them; The metal level that is positioned at the upper surface of silicon dioxide layer is the control grid conducting layer, the metal level of the upper surface of p type heavily doped region is that negative electrode is regulated conductive layer, the metal level of the upper surface of a n type heavily doped region is a source layer, and the metal level of the upper surface of another n type heavily doped region is a drain electrode layer; There is a grid cover layer above the control grid conducting layer; Catalyst metal layer of the top existence of drain electrode layer; Can utilize catalyst metal layer to carry out the preparation of carbon nano-tube.
The fixed position of described knot type field effect tube cathodic control array structure is for being fixed on the cathode glass faceplate; Metal level at the upper surface evaporation of n type doped silicon wafer can be crome metal, molybdenum, gold, silver, platinum.Catalyst metal layer can be metallic iron, cobalt, nickel.
A kind of manufacture craft that has the flat-panel monitor of knot type field effect tube cathodic control array structure, its manufacture craft is as follows:
1) making of substrate 1: n type doped silicon wafer is carried out scribing, form substrate;
2) making of dorsal part p type heavily doped layer 2: prepare a p type heavily doped layer at the dorsal part of n type doped silicon wafer, form dorsal part p type heavily doped layer after the etching;
3) etching in n type doped silicon wafer front: the front surface to n type doped silicon wafer carries out etching, etches three square region; The plane of requirement etch areas will be lower than the original surface plane of n type doped silicon wafer; These three square region are a unit simultaneously, and such unit can be in the front surface repeated arrangement of n type doped silicon wafer;
4) doping of n type doped silicon wafer etch areas: the etch areas to n type doped silicon wafer is carried out heavy doping respectively, makes it all form heavily doped region, is respectively n type heavily doped region, p type heavily doped region, n type heavily doped region; In the middle of wherein p type heavily doped region is positioned at, and n type heavily doped region is positioned at the both sides of p type heavily doped region;
5) making of insulating barrier: the front surface in n type doped silicon wafer is prepared the layer of silicon dioxide layer, as insulating barrier; To expose following n type heavily doped region and p type heavily doped region in the insulating barrier after the etching, but all the other positions are all covered;
6) making of conductive layer: the front surface evaporation layer of metal chromium in n type doped silicon wafer, form grid conducting layer after the etching respectively, anode is regulated conductive layer, source electrode conductive layer and drain electrode conductive layer;
7) making of grid cover layer 7: on grid conducting layer, prepare the layer of silicon dioxide layer, form the grid cover layer after the etching;
8) making of catalyst metal layer 8: on the drain electrode conductive layer, prepare the Raney nickel metal level;
9) cleaning surfaces of knot type field effect tube cathodic control array structure: clean is carried out on the surface to knot type field effect tube cathodic control array structure, removes impurity and dust;
10) preparation of carbon nanotube layer 9: utilize catalyst metal layer to carry out the preparation of carbon nano-tube;
11) reprocessing of carbon nano-tube: carbon nano-tube is carried out reprocessing, improve field emission characteristics;
12) making of cathode glass faceplate 10: sodium calcium plate glass is carried out scribing, form cathode glass faceplate;
13) making of anode glass panel 11: sodium calcium plate glass is carried out scribing, form the anode glass panel;
14) making of anode conductive layer 12: evaporation one deck tin indium oxide rete on the anode glass panel forms anode conductive layer after the etching;
15) making of insulation paste layer 13: at the non-display area printing insulation paste layer of anode conductive layer;
16) making of phosphor powder layer 14: the viewing area printing phosphor powder layer on anode conductive layer; In the middle of baking oven, toast (baking temperature: 120 ℃, the retention time: 10 minutes);
17) device assembling: with cathode glass faceplate, anode glass panel, supporting wall structure 15, glass encloses frame 16 and knot type field effect tube cathodic control array structure is assembled together all around, and getter 17 put in the middle of the cavity, fix with glass powder with low melting point; Around face glass, smeared glass powder with low melting point, fixed with clip;
18) finished product is made: the device that has assembled is carried out packaging technology form finished parts.
Described step 6 is specially the front surface evaporation layer of metal chromium in n type doped silicon wafer; Metal level after the etching is divided into four parts: a part is positioned at the upper surface of silicon dioxide layer, formation grid conducting layer 6, a part are positioned at the upper surface of the p type heavily doped region of n type doped silicon wafer front surface, formation negative electrode adjusting conductive layer 4, a part are positioned at the upper surface of n type heavily doped region, formation source electrode conductive layer 3, a part are positioned at the upper surface of another one n type heavily doped region, form drain electrode conductive layer 5; This four partially conductives layer is disconnected mutually;
Described step 15 is specially the non-display area printing insulation paste layer 13 at anode conductive layer, is used to prevent the parasitic electrons emission; Through overbaking (baking temperature: 150 ℃, retention time: 5 minutes) afterwards, be placed on and carry out high temperature sintering (sintering temperature: 580 ℃, retention time: 10 minutes) in the sintering furnace;
The device that described step 18 is specially having assembled carries out following packaging technology: toast in the middle of the sample device is put into baking oven; Carry out high temperature sintering in the middle of putting into sintering furnace; On exhaust station, carry out device exhaust, sealed-off, on the roasting machine that disappears, the getter of device inside bake and disappears, install pin formation finished parts at last additional.
Claims (7)
1, a kind of flat-panel monitor that has knot type field effect tube cathodic control array structure, comprise by cathode glass faceplate [10], anode glass panel [11] and all around glass enclose the sealed vacuum chamber that frame [16] is constituted; Anode conductive layer [12] and the phosphor powder layer [14] of preparation on anode conductive layer that photoetching is arranged on anode glass panel [11]; Supporting wall structure between anode glass panel and cathode glass faceplate [15] and getter subsidiary component [17] is characterized in that: carbon nano-tube [9] negative electrode, control grid [6] and knot type field effect tube cathodic control array structure that preparation is arranged on cathode glass faceplate [10].
2, a kind of flat-panel monitor that has knot type field effect tube cathodic control array structure as claimed in claim 1 is characterized in that: the substrate of described knot type field effect tube cathodic control array structure [1] material is a doped silicon wafer, and its doping type is the n type; There is a p type heavily doped layer [2] in the dorsal part of n type doped silicon wafer; Etching is carried out in the front of n type doped silicon wafer, etches three square region; The etch areas plane will be lower than the original surface plane of n type doped silicon wafer; Three square region are a unit, and this element is a repeated arrangement; Three square region are heavily doped region, are respectively n type heavily doped region, p type heavily doped layer, n type heavily doped region; N type heavily doped region in the front doped region of n type doped silicon wafer is positioned at the both sides of p type heavily doped region; There is an insulating barrier in the surface in n type doped silicon wafer front; Silicon dioxide layer after the etching need expose n type heavily doped region and the p type heavily doped region below the silicon dioxide layer respectively, but all the other positions are all covered; There is a metal level in the upper surface of n type doped silicon wafer, and the metal level after the etching lays respectively at the upper surface of silicon dioxide layer, the upper surface of n type heavily doped region and the upper surface of p type heavily doped region, but is disconnected mutually between them; The metal level that is positioned at the upper surface of silicon dioxide layer is the control grid conducting layer, the metal level of the upper surface of p type heavily doped region is that negative electrode is regulated conductive layer [4], the metal level of the upper surface of a n type heavily doped region is source electrode conductive layer [3], and the metal level of the upper surface of another n type heavily doped region is drain electrode conductive layer [5]; There is a grid cover layer [7] in control grid [6] above the conductive layer; A catalyst metal layer of top existence [8] of drain electrode conductive layer [5]; Utilize catalyst metal layer [8] to carry out the preparation of carbon nanotube layer [9].
3, a kind of flat-panel monitor that has knot type field effect tube cathodic control array structure as claimed in claim 2, it is characterized in that: the fixed position of described knot type field effect tube cathodic control array structure is for being fixed on the cathode glass faceplate, metal level at the upper surface evaporation of n type doped silicon wafer is crome metal, molybdenum, gold, silver, platinum, and catalyst metal layer can be metallic iron, cobalt, nickel.
4, a kind of manufacture craft that has the flat-panel monitor of knot type field effect tube cathodic control array structure is characterized in that, its manufacture craft is as follows:
1) making of substrate [1]: n type doped silicon wafer is carried out scribing, form substrate;
2) making of dorsal part p type heavily doped layer [2]: prepare a p type heavily doped layer at the dorsal part of n type doped silicon wafer, form dorsal part p type heavily doped layer after the etching;
3) etching in n type doped silicon wafer front: the front surface to n type doped silicon wafer carries out etching, etches three square region; The plane of requirement etch areas will be lower than the original surface plane of n type doped silicon wafer; These three square region are a unit simultaneously, and such unit can be in the front surface repeated arrangement of n type doped silicon wafer;
4) doping of n type doped silicon wafer etch areas: the etch areas to n type doped silicon wafer is carried out heavy doping respectively, makes it all form heavily doped region, is respectively n type heavily doped region, p type heavily doped region, n type heavily doped region; In the middle of wherein p type heavily doped region is positioned at, and n type heavily doped region is positioned at the both sides of p type heavily doped region;
5) making of insulating barrier: the front surface in n type doped silicon wafer is prepared the layer of silicon dioxide layer, as insulating barrier; To expose following n type heavily doped region and p type heavily doped region in the insulating barrier after the etching, but all the other positions are all covered;
6) making of conductive layer: the front surface evaporation layer of metal chromium in n type doped silicon wafer, form grid conducting layer after the etching respectively, anode is regulated conductive layer, source electrode conductive layer and drain electrode conductive layer;
7) making of grid cover layer [7]: on grid conducting layer, prepare the layer of silicon dioxide layer, form the grid cover layer after the etching;
8) making of catalyst metal layer [8]: on the drain electrode conductive layer, prepare the Raney nickel metal level;
9) cleaning surfaces of knot type field effect tube cathodic control array structure: clean is carried out on the surface to knot type field effect tube cathodic control array structure, removes impurity and dust;
10) preparation of carbon nanotube layer [9]: utilize catalyst metal layer [8] to carry out the preparation of carbon nano-tube;
11) making of cathode glass faceplate [10]: sodium calcium plate glass is carried out scribing, form cathode glass faceplate;
12) making of anode glass panel [11]: sodium calcium plate glass is carried out scribing, form the anode glass panel;
13) making of anode conductive layer [12]: evaporation one deck tin indium oxide rete on the anode glass panel forms anode conductive layer after the etching;
14) making of insulation paste layer [13]: at the non-display area printing insulation paste layer of anode conductive layer;
15) making of phosphor powder layer [14]: the viewing area printing phosphor powder layer on anode conductive layer; In the middle of baking oven, toast baking temperature: 120 ℃, the retention time: 10 minutes;
16) device assembling: with cathode glass faceplate, anode glass panel, supporting wall structure [15], glass encloses frame [16] and knot type field effect tube cathodic control array structure is assembled together all around, and getter [17] put in the middle of the cavity, fix with glass powder with low melting point; Around face glass, smeared glass powder with low melting point, fixed with clip;
17) finished product is made: the device that has assembled is carried out packaging technology form finished parts.
5, the manufacture craft that has the flat-panel monitor of knot type field effect tube cathodic control array structure as claimed in claim 4 is characterized in that: described step 6 is specially the front surface evaporation layer of metal chromium in n type doped silicon wafer; Metal level after the etching is divided into four parts: a part is positioned at the upper surface of silicon dioxide layer, formation grid conducting layer [6], a part are positioned at the upper surface of the p type heavily doped region of n type doped silicon wafer front surface, formation negative electrode adjusting conductive layer [4], a part are positioned at the upper surface of n type heavily doped region, formation source electrode conductive layer [3], a part are positioned at the upper surface of another one n type heavily doped region, form drain electrode conductive layer [5]; This four partially conductives layer is disconnected mutually.
6, the manufacture craft that has the flat-panel monitor of knot type field effect tube cathodic control array structure as claimed in claim 4, it is characterized in that: described step 14 is specially non-display area printing insulation paste [13] layer at anode conductive layer, is used to prevent the parasitic electrons emission; Through overbaking, baking temperature: 150 ℃, the retention time: 5 minutes, afterwards, be placed on and carry out high temperature sintering in the sintering furnace, sintering temperature: 580 ℃, the retention time: 10 minutes.
7, a kind of flat-panel monitor that has knot type field effect tube cathodic control array structure as claimed in claim 4, it is characterized in that: the device that described step 17 is specially having assembled carries out following packaging technology: toast in the middle of the sample device is put into baking oven; Carry out high temperature sintering in the middle of putting into sintering furnace; On exhaust station, carry out device exhaust, sealed-off, on the roasting machine that disappears, the getter of device inside bake and disappears, install pin formation finished parts at last additional.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100485099A CN100555535C (en) | 2006-08-02 | 2006-08-02 | The flat-panel monitor and the manufacture craft thereof that have knot type field effect tube cathodic control array structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100485099A CN100555535C (en) | 2006-08-02 | 2006-08-02 | The flat-panel monitor and the manufacture craft thereof that have knot type field effect tube cathodic control array structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1909155A true CN1909155A (en) | 2007-02-07 |
| CN100555535C CN100555535C (en) | 2009-10-28 |
Family
ID=37700209
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100485099A Expired - Fee Related CN100555535C (en) | 2006-08-02 | 2006-08-02 | The flat-panel monitor and the manufacture craft thereof that have knot type field effect tube cathodic control array structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100555535C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102262994A (en) * | 2011-06-21 | 2011-11-30 | 福州大学 | Oxide-nano-structure-based surface-conduction electron emission source and manufacturing method thereof |
-
2006
- 2006-08-02 CN CNB2006100485099A patent/CN100555535C/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102262994A (en) * | 2011-06-21 | 2011-11-30 | 福州大学 | Oxide-nano-structure-based surface-conduction electron emission source and manufacturing method thereof |
| CN102262994B (en) * | 2011-06-21 | 2013-01-23 | 福州大学 | Oxide-nano-structure-based surface-conduction electron emission source and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100555535C (en) | 2009-10-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1790599A (en) | Panel display with integrated triangle tapered grid cathode structure and its making process | |
| CN1909162A (en) | Bent grid case acuate type array emitting structural panel display device and its production technique | |
| CN1956129A (en) | Flat display of circular table cone structure cathode array emission structure and manufacturing process | |
| CN1956132A (en) | Flat display of side wall cathode emission array structure and its manufacturing process | |
| CN1909155A (en) | Panel display device with knot type field effect tube cathodic control array structure and its production technique | |
| CN1909157A (en) | Globular cactus type tip cathode array structural panel display device and its production technique | |
| CN1909156A (en) | Flexural probe type grid control cathode structural panel display device and its production technique | |
| CN1909173A (en) | Transversing cathode emitting structural panel display device and its production technique | |
| CN1909152A (en) | Honeycomb type grid control cathode emitting structural panel display device and its production technique | |
| CN1822294A (en) | Flat panel display with integrated double flat grid array structure and its producing process | |
| CN101075534A (en) | Planar display device with circular internal-grid controlled cathode structure and its production | |
| CN1694220A (en) | Field emission display with plane grid structure and manufacturing technology thereof | |
| CN1909163A (en) | Intersection type cathode adjusting structural panel display device and its production technique | |
| CN1909168A (en) | Reversal coplanar type ballast structural panel display device and its production technique | |
| CN1909151A (en) | Multiple round annular cathode array emitting structural panel display device and its production technique | |
| CN1909160A (en) | Annular blade type cathode emitting structural panel display device and its production technique | |
| CN1622272A (en) | Three-pole carbon nano tube field emission flat display with ballast resistor structure and fabrication process thereof | |
| CN1929082A (en) | Collar-gate pole ballast structural panel display device and its production technique | |
| CN101075538A (en) | Planar display device with capped bottom-grid controlled cathode structure and its production | |
| CN1917133A (en) | Grid controlled flat panel display in circular ring, tip shaped cathode type emission structure, and fabrication technique | |
| CN1956126A (en) | Flat display of multi-cathode side grid control structure and its manufacturing process | |
| CN1956125A (en) | Flat display of cone cathode array structure and its manufacturing technology | |
| CN1909169A (en) | Coplanar type current adjusting structural panel display device and its production technique | |
| CN101075530A (en) | Planar display device with stair-shaped sided-grid controlled transmitting structure and its production | |
| CN1909165A (en) | Inverted misarrangement type ballast structural panel display device and its production technique |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20091028 Termination date: 20100802 |