CN1897237A - Radiating semiconductor packer and its production - Google Patents

Radiating semiconductor packer and its production Download PDF

Info

Publication number
CN1897237A
CN1897237A CNA2005100842566A CN200510084256A CN1897237A CN 1897237 A CN1897237 A CN 1897237A CN A2005100842566 A CNA2005100842566 A CN A2005100842566A CN 200510084256 A CN200510084256 A CN 200510084256A CN 1897237 A CN1897237 A CN 1897237A
Authority
CN
China
Prior art keywords
substrate
semiconductor
packer
radiator structure
radiating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2005100842566A
Other languages
Chinese (zh)
Other versions
CN100466210C (en
Inventor
曾文聪
蔡和易
黄建屏
黄致明
萧承旭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siliconware Precision Industries Co Ltd
Original Assignee
Siliconware Precision Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siliconware Precision Industries Co Ltd filed Critical Siliconware Precision Industries Co Ltd
Priority to CNB2005100842566A priority Critical patent/CN100466210C/en
Publication of CN1897237A publication Critical patent/CN1897237A/en
Application granted granted Critical
Publication of CN100466210C publication Critical patent/CN100466210C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Abstract

A radiating semiconductor sealing piece and manufacture method, the semiconductor sealing piece includes: the base board, at least one semiconductor core chip, the sealing colloid and the radiating structure, the method is: the semiconductor core chip meets and electrical-connects with the base board, meets the radiating structure of the supporting part on the base board, the semiconductor core chip contains under the radiating structure, forms the projection plane size of the sealing colloid that is bigger than the prearrange plane size of the semiconductor sealing piece on the base board, removes the parts that is bigger than the prearrange size in the sealing colloid, the supporting part of the radiating structure and the base board when processes incise task along the prearrange size of the semiconductor sealing piece, forms the semiconductor sealing piece that conforms with the radiating structure, avoids the radiating structure to engross the area of the base board, the renegade layer between the radiating structure and the base board, the divulsion of the base board un-welded layer and the circuitry rupture.

Description

Radiating semiconductor packer and method for making thereof
Technical field
The invention relates to a kind of radiating semiconductor packer and method for making thereof, particularly about a kind of semiconductor package part and manufacture method thereof that is integrated with radiator structure.
Background technology
Along with requirement to compactization of electronic product, because ball grid array (BGA) semiconductor package part (Ball Grid Array Semiconductor Package) can provide the I/O link (I/O Connection) of quantity sufficient, the demand that meets high density electronic component and circuit semiconductor chip becomes the main flow of encapsulating products gradually.Yet, because this semiconductor package part provides the electronic circuit (Electronic Circuits) and electronic component (ElectronicComponents) of higher density, so the heat that produces during operation is also higher, if not in real time with the heat rapid release of chip surface, the heat that accumulates can have a strong impact on the electrical functionality and the product stability of semiconductor chip.On the other hand, for avoiding the packaging part internal circuit to be subjected to the pollution of extraneous water dust, semiconductor chip surface must outer be covered one deck packing colloid and completely cut off, the potting resin that constitutes this packing colloid is the relatively poor material of heat conductivity, its thermal conductivity coefficient is 0.8w/m0K only, and therefore, the heat that chip produces can't be delivered to outside the atmosphere by this packing colloid effectively, cause accumulating of heat, make and enjoy test in chip performance and useful life.
For solving the deficiency of existing ball grid array (BGA) semiconductor package in heat radiation, the method for installing radiator structure in this BGA semiconductor package part has appearred.Correlation technique is United States Patent (USP) 5,877,552,5,736,785,5,977,626,5,851,337,6,552,428,6,246,115,6,429,512,6,400,014,6,462,405 etc. for example.
Fig. 1 is a United States Patent (USP) the 5th, 977, a kind of radiating semiconductor packer that discloses for No. 626, the radiator structure 13 of this radiating semiconductor packer 1 include that par 130, frame that end face exposes outside packing colloid 14 support that this par 130 makes it to be positioned at a plurality of support portions 131 of semiconductor chip 11 tops and extend a plurality of contact sites 132 that are used for adhesive base plate 10 protuberances 137 from these 131 bottoms, support portion; Wherein, these support portion 131 rings are put outside 130 peripheries, this par are also downward gradually and are reached this contact site 132, constitute the channel 18 of holding a plurality of master/passive devices (as chip, bonding wire, capacitor etc.), the heat energy that chip 11 operations are produced can be discharged into the atmosphere by this radiator structure 13.
But, integrated and chip size packages (the Chip Scale Package along with chip, CSP) high development of type, make size of substrate move closer to chip size (Near chip size), lay the dual consideration that closeness increases if take into account the reduction and the bonding wire of substrate size, must in limited substrate area, vacate more spaces and integrate for element.For cooperating the formation of this protuberance 137 on the above-mentioned radiator structure 13, this contact site 132 often must keep certain area, help the punching out of this protuberance 137, and these radiator structure 13 contact sites 132 occupy substrate than large space, the bonding wire wiring zone that can supply wire bond pad (Fingers) configuration on this substrate is reduced relatively, and the layout of passive device also enjoys restriction simultaneously.
In addition, because the substrate peripheral region is occupied by this contact site 132, so all active elements only can be placed in the channel 18 of this support portion 131 and par 130 formations in the packaging part, therefore this contact site 132 is if can not reduce the substrate area that it takies, relatively provide the space of component positioning can be more not enough on the substrate, this radiator structure 13 can't be used for highly integrated encapsulation.
See also Fig. 2, for overcoming the problems referred to above, United States Patent (USP) the 6th, 720, a kind of radiator structure design that enlarges electronic component placement scope on the substrate then is provided for No. 649, it puts the support portion 232 of this radiator structure 23 at four jiaos of edge places, and the space that the conducting elements such as bonding wire 22 of any two adjacent supports portions 232 reservation power supplies property connection chip 21 and substrate 20 pass through, by this support portion 232 of extrapolation to radiator structure 23 on the angle end position at edge, make this radiator structure 23 take less substrate area, exchange for than large space and be used to settle bonding wire 22 wiring and a plurality of electronic components 27.
Even if the support portion of this radiator structure is arranged on the edge place, angle of this radiator structure in the above-mentioned design, this radiator structure still must rely on this support portion just can connect and put on this substrate, so still cause the waste of substrate expensive real estate.
In addition, because above-mentioned radiator structure all is to utilize the viscose glue mode that the support portion of radiator structure is anchored on the substrate, because of the thermal coefficient of expansion between this radiator structure (generally being the metallic copper material) and substrate variant, so often because of in the processing procedure thermal cycle, delamination takes place in the sticking place of putting at this radiator structure support portion and substrate, has a strong impact on reliability of products.Moreover, as when strengthening viscose glue the support portion of this radiator structure being fixed in substrate, be subjected to thermal stress and do the time spent, this radiator structure promptly may be torn the layer of refusing that covers substrate surface, even cause and cover this and refuse rupture of line under the layer, the destruction of causing packaging part.
Moreover, connect by adhesion coating at this radiator structure and to put behind substrate with support portion, insert when forming the molding operation (Molding) of packing colloid in the die cavity of encapsulating mould, the necessary contact of the end face of this radiator structure is to the roof of die cavity, if the end face of this radiator structure is failed effectively contact to the roof of die cavity, when being formed with the gap between the two, promptly can overflow glue on the end face of radiator structure, therefore, for avoiding the generation of excessive glue, as United States Patent (USP) 6,552, shown in 428, need make the fin height that adheres to behind the substrate be slightly larger than the about 0.1mm of the degree of depth of mould die cavity (cavity), mould can closely be compressed on the radiator structure, make this radiator structure effectively be connected to the roof of die cavity, avoid the generation of glue of overflowing, but, then often can cause the excessive generation fracture of base plate line pressurized of this below, radiator structure support portion again if the strength of the roof contact radiator structure of die cavity is excessive.
Therefore, how effectively solving the heat dissipation problem of semiconductor package part, simultaneously can avoid radiator structure to take taking place between substrate area, radiator structure and substrate delamination, substrate to refuse that layer is torn and problem such as rupture of line, is the big problem that this area need solve.
Summary of the invention
For overcoming the shortcoming of above-mentioned prior art, main purpose of the present invention is to provide a kind of radiating semiconductor packer and method for making thereof, and the radiator structure of avoiding being incorporated in the packaging part takies substrate area.
Another object of the present invention is to provide a kind of radiating semiconductor packer and method for making thereof, can on substrate, provide accessible the connecing of electronic component to put the space.
Another purpose of the present invention is to provide a kind of radiating semiconductor packer and method for making thereof, avoids being incorporated between radiator structure in the packaging part and substrate delamination takes place.
A further object of the present invention is to provide a kind of radiating semiconductor packer and method for making thereof, because of the stress that is heated, causes substrate to refuse that layer is torn and problem such as rupture of line when avoiding radiator structure to connect putting on substrate.
An also purpose of the present invention is to provide a kind of radiating semiconductor packer and method for making thereof, can avoid packaging part to weigh the problem of base plate line wounded because of mould cramping radiator structure in Encapsulation Moulds compacting journey.
For reaching above-mentioned and other purpose, the method for making that the invention provides a kind of radiating semiconductor packer comprises: this method for making comprises: semiconductor chip is connect put and be electrically connected on the substrate; A radiator structure is provided, this radiator structure comprises fin and extends the support portion downwards from this fin, this radiator structure is borrowed its support portion to connect and is put on this substrate, make this semiconductor chip be contained in this fin below, wherein this support portion connects and puts outside the default planar dimension that is positioned at this semiconductor package part on this substrate; Connect the packing colloid that forms this semiconductor chip of coating and radiator structure on the substrate that is equipped with semiconductor chip and radiator structure at this, the projection plane size of this packing colloid is greater than the default planar dimension of this semiconductor package part; And carry out cutting operation along the predetermined plane size positions of this semiconductor package part, remove the part that surpasses the default planar dimension of this packaging part in the support portion of this packing colloid, radiator structure and the substrate.
Wherein, this semiconductor chip can flip-chip or the routing mode be electrically connected to this substrate, and the end face of this fin exposes outside this packing colloid, this substrate can the single type attitude, or arrange with array way, vertical bar mode, so that after the encapsulation mold pressing is finished, plant a plurality of soldered balls and cut list at this substrate back.
The present invention also provides a kind of method for making of radiating semiconductor packer to comprise: semiconductor chip is connect put and be electrically connected on the substrate, and with this connect be equipped with semiconductor chip substrate orientation in being preset with the bearing part of opening, wherein the planar dimension of this substrate approaches the predetermined plane size of this semiconductor package part; Provide to include fin and extend the radiator structure of support portion downwards, and borrow its support portion to connect this radiator structure and put on this bearing part, this semiconductor chip is contained in the fin below from this fin; Carry out the mold pressing processing procedure, on this substrate and bearing part, be formed for coating the packing colloid of this semiconductor chip and radiator structure, wherein, the planar dimension that the planar dimension that this packing colloid covers is centered on greater than this radiator structure support portion; And carry out cutting operation along the preliminary dimension position of this semiconductor package part, remove the part that surpasses the default planar dimension of this packaging part in the support portion of this packing colloid and radiator structure.Wherein, the end face of this fin exposes outside this packing colloid; In addition, this substrate back can plant a plurality of soldered balls.
By above-mentioned method for making, a kind of radiating semiconductor packer of the present invention comprises: substrate has the substrate of first surface and relative second surface; At least one semiconductor chip connects and puts and be electrically connected on this substrate first surface; Packing colloid is formed on this substrate first surface, envelope this semiconductor chip, and the side of this packing colloid and substrate is cut mutually flat; And radiator structure, be coated in this packing colloid, the support portion that this radiator structure has a fin and extends downwards from this fin periphery, wherein this fin is formed in the packing colloid of this semiconductor chip top, its end face exposes outside this packing colloid, and at least a portion of this support portion is to be cut to remove outside this packing colloid when forming this packaging part.Wherein the heat sink top surface of this radiator structure can all or part ofly expose outside this packing colloid, and the support portion of this radiator structure can partly or entirely remove outside this packing colloid.
The present invention also provides a kind of semiconductor package part to comprise: substrate has first surface and relative second surface; At least one semiconductor chip connects and puts and be electrically connected on this substrate first surface; Packing colloid is formed on this substrate first surface, coat this semiconductor chip, and the side of this packing colloid and substrate is cut mutually flat; And radiator structure, be coated in this packing colloid, the support portion that this radiator structure has fin and extends downwards from this fin periphery, wherein this fin is formed in the packing colloid of this semiconductor chip top, its end face exposes outside this packing colloid, the edge of this fin then is formed with inner shrinking structure, and at least a portion of this support portion is cut outside this packing colloid when forming this packaging part.
Therefore, radiating semiconductor packer of the present invention and method for making thereof mainly are to put the radiator structure with support portion finishing to put to connect on the brilliant substrate, and this radiator structure is to connect with its support portion to put outside the default planar dimension of this substrate semiconductor-on-insulator packaging part, avoiding taking substrate can be for the configuration district that connects electronic components such as putting and electrically connect semiconductor chip and passive device, and then the substrate that these electronic component maximums are provided connects and puts the space, then, the substrate that chip and radiator structure are then arranged is contained in the mould with die cavity, and the projection plane size of this die cavity is greater than the default planar dimension of semiconductor package part, just make this mould be used for this radiator structure of cramping, make the substrate part in compression be positioned at the outside, configuration district of this substrate, avoid mould to weigh the circuit of substrate wounded, and potting resin is filled in this die cavity follow-up, be formed for coating the packing colloid of this semiconductor chip, make the preliminary dimension of the size of this packing colloid, then utilize cutting operation to remove this packing colloid again greater than semiconductor package part, size is greater than the part of this packaging part pre-set dimension in the support portion of radiator structure and the substrate.
Have again, the present invention also can connect chip earlier and put and be electrically connected on the substrate that planar dimension approaches package size, again with this substrate orientation in the bearing part that is preset with opening, the support portion of radiator structure is connect puts on this bearing part, be incorporated between radiator structure in the packaging part and substrate and delamination can not take place, because of the stress that is heated, cause substrate to refuse that layer is torn and problem such as rupture of line when avoiding radiator structure to connect putting on substrate; Not taking simultaneously substrate can be for the effective connecting area that connects electronic components such as putting and electrically connect semiconductor chip and passive device.
In addition, in the packaging part of the present invention, the support portion of this radiator structure does not directly connect puts in the configuration district of this substrate, so having complete space can be for a plurality of semiconductor chips and other electronic component are set, thereby can improve the electrical functionality of packaging part, avoid simultaneously in Encapsulation Moulds compacting journey because of mould cramping radiator structure, cause this radiator structure support portion to weigh the problem of base plate line wounded, moreover, on this radiator structure, can extend to form a protuberance towards this chip direction, or formation roughening, the structure of grooveization, or on this chip, connect the radiating efficiency of putting useless chip (dummy die) increase packaging part.
Description of drawings
Fig. 1 is a United States Patent (USP) the 5th, 977, the generalized section of the radiating semiconductor packer of No. 626 announcements;
Fig. 2 is a United States Patent (USP) the 6th, 720, the floor map of the radiating semiconductor packer of No. 649 announcements;
Fig. 3 A to Fig. 3 D is the generalized section of the method for making embodiment 1 of radiating semiconductor packer of the present invention;
Fig. 4 A is the present invention of Fig. 3 A to Fig. 3 D forms the packing colloid that coats semiconductor chip on counterpart substrate on the substrate module sheet a floor map;
Fig. 4 B is that fin in the radiator structure is in the floor map that forms inner shrinking structure along the planar dimension edge of semiconductor package part;
The plane that the end face of Fig. 4 C fin only partly exposes outside this packing colloid shows face figure;
Fig. 4 D is the semiconductor package part of Fig. 4 C and along the generalized section shown in its 4D-4D hatching;
Fig. 4 E is that in the cutting operation of follow-up formation semiconductor package part, the part support portion is retained in the generalized section in this packing colloid when the fin planar dimension that connects the radiator structure of putting on substrate during less than the semiconductor package part planar dimension;
Fig. 5 A to Fig. 5 E is the generalized section of the method for making embodiment 2 of radiating semiconductor packer of the present invention;
Fig. 6 is the generalized section of radiating semiconductor packer embodiment 3 of the present invention;
Fig. 7 is the generalized section of radiating semiconductor packer embodiment 4 of the present invention;
Fig. 8 is the generalized section of radiating semiconductor packer embodiment 5 of the present invention;
Fig. 9 is the generalized section of radiating semiconductor packer embodiment 6 of the present invention.
Embodiment
Below by particular specific embodiment explanation embodiments of the present invention.
Accompanying drawing only shows the assembly relevant with the present invention, and the assembly that shows not is the draftings such as number, shape and dimension scale when implementing with reality, number, shape and dimension scale during actual enforcement is a kind of optionally design, and the assembly layout form may be more complicated.
Embodiment 1
Fig. 3 A to Fig. 3 D is the schematic diagram of the method for making embodiment 1 of radiating semiconductor packer of the present invention.
As shown in Figure 3A, provide a substrate module sheet 30, this substrate module sheet 30 comprises a plurality of substrates 300, this substrate 300 can array way or the vertical bar mode arrange.Then on this substrate 300 respectively, connect and put and electrically connect at least one semiconductor chip 31, and connect simultaneously on this substrate 300 and put and be electrically connected with passive device 39.This semiconductor chip 31 also can be electrically connected to this substrate 300 by the routing mode except being electrically connected to by the flip chip among the figure this substrate.Wherein, the planar dimension of this substrate 300 be near forming the planar dimension of semiconductor package part, and in addition, the kenel that the present invention also can single substrate is carried out the encapsulation procedure of follow-up chip.
Shown in Fig. 3 B, radiator structure 32 is provided, this radiator structure 32 comprises fin 321 and the support portion 322 of extending from this fin 321 on every side downwards, this radiator structure 32 is by its support portion 322, the sticking outside that on this substrate module sheet 30, is positioned at the default planar dimension P of this semiconductor package part of putting, just this support portion 322 connects and puts outside base plate line layout district, and this semiconductor chip 31 and passive device 39 are contained in fin 321 belows of this radiator structure 32, avoiding radiator structure 32 to take substrate 300 can be for meeting the configuration district of electronic components such as putting and electrically connect semiconductor chip 31 and passive device 39, and can be these electronic components provides maximum substrate to connect to put the space.
Shown in Fig. 3 C, encapsulate molding operation, this is connect the substrate 300 that is equipped with semiconductor chip 31 and radiator structure 32 is interposed in the mould (not marking) with patrix and counterdie, and this patrix has a die cavity, potting resin is from this die cavity of injection molding mouth streamer, the end face of this radiator structure 32 is connected to the die cavity top, be filled in this die cavity for potting resin, formation envelopes this semiconductor chip 31, the packing colloid 33 of passive device 39 and radiator structure 32, and the end face that makes this radiator structure 32 exposes outside this packing colloid 33, and the planar dimension that centers on greater than default planar dimension P and this radiator structure 32 support portions 322 of this semiconductor package part of the projection plane size M of this packing colloid 33.Because of the projection plane size M (being the die cavity projection plane size of mould) of this packing colloid 33 greater than the predetermined semiconductor package part planar dimension P that finishes, therefore this mould is used for the part of these radiator structure 32 support portions 322 of cramping, be positioned at the outside, configuration district of this substrate 300, avoided mould to weigh the circuit of substrate 300 wounded.
Shown in Fig. 3 D, carry out cutting operation, utilize cutter cutting tools 34 such as (saw singulation) for example to cut, remove the part that surpasses the default planar dimension P of this packaging part in the support portion 322 of this packing colloid 33, radiator structure 32 and the substrate 300 along the predetermined plane size P of this semiconductor package part.In addition before cutting operation or behind the cutting operation, can plant a plurality of soldered balls 35 on this substrate 300 opposite side surface that is equipped with chip 31 that connects.
Fig. 4 A is packing colloid 33 floor map that are formed for coating semiconductor chip among the present invention of Fig. 3 A to Fig. 3 D on counterpart substrate 300 on the substrate module sheet 30, and the planar dimension M of this packing colloid is greater than the plane preliminary dimension P of semiconductor package part.See also Fig. 4 B, fin 321 forms in this radiator structure 32 can form inner shrinking structure 3210 along the planar dimension P edge of this semiconductor package part, during for follow-up cutting operation, reduce the consume of cutting tool.Certainly, if the processing procedure permission, this fin 321 also need not form inner shrinking structure.Also can be as Fig. 4 C and along shown in Fig. 4 D of its 4D-4D hatching, the end face of this fin 321 only part exposes outside this packing colloid 33, and remainder then is coated in the packing colloid 33, increases the adhesive force of 33 of this fin 321 and packing colloids.
See also Fig. 4 E again, when the planar dimension that connects the fin 321 of putting radiator structure 32 on this substrate 300 during less than the planar dimension P of this semiconductor package part, in the cutting operation that forms this semiconductor package part, can cut to part support portion 322, part support portion 322 is retained in this packing colloid 33.Certainly if fin 321 planar dimensions of this radiator structure 32 during greater than the planar dimension P of this semiconductor package part, then when carrying out cutting operation, this support portion 322 removes outside this packing colloid 33 comprehensively.
By above-mentioned method for making, a kind of radiating semiconductor packer of the present invention comprises: substrate 300, and this substrate 300 has first surface and relative second surface; At least one semiconductor chip 31 connects and puts and be electrically connected on these substrate 300 first surfaces; Packing colloid 33 is formed on these substrate 300 first surfaces, envelopes this semiconductor chip 31, and this packing colloid 33 is cut flat with the side of substrate 300 mutually; And be coated on radiator structure 32 in this packing colloid 33, the support portion 322 that this radiator structure 32 has fin 321 and extends downwards from these fin 321 peripheries, wherein this fin 321 is formed in the packing colloid 33 of these semiconductor chip 31 tops, expose outside this packing colloid 33 for its end face, and these support portion 322 at least a portion are cut when forming this packaging part, remove outside this packing colloid 33.Wherein fin 321 end faces of this radiator structure 32 can be comprehensively or part expose outside this packing colloid 33, the edge of this fin 321 then can be formed with inner shrinking structure 3210, and the support portion 322 of this radiator structure 32 can partly or entirely remove outside this packing colloid 33.In addition, these substrate 300 first surfaces can connect puts passive device 39, connects on these substrate 300 second surfaces and is equipped with soldered ball 35.
Embodiment 2
Fig. 5 A to Fig. 5 E is the generalized section of the method for making embodiment 2 of radiating semiconductor packer of the present invention.
Shown in Fig. 5 A, a substrate 400 is provided, the planar dimension of this substrate 400 is near the predetermined plane size of the semiconductor package part that will form, and semiconductor chip 41 and passive device 49 connect puts and be electrically connected on the substrate 400.This semiconductor chip 41 is except can also being electrically connected to this substrate 400 by the routing mode by the illustrated flip chip.
Shown in Fig. 5 B, the bearing part 46 that is preset with opening 460 is provided, this is connect in the opening 460 that the substrate 400 that is equipped with semiconductor chip 41 and passive device 49 is positioned at this bearing part 46, wherein the planar dimension of this opening 460 is greater than the planar dimension of this substrate 400, carry substrate 400 chimeric being positioned in this correspondence opening 460 of chip 41 for this, simultaneously can be on the lower surface of this substrate 400 and this bearing part 46, but post the film 47 (Tape) in the gap 461 between this bearing part opening 46 of capping and this substrate 400, be used for locating simultaneously this substrate 400 and this gap 461 of capping, this film 47 can be the high temperature-resistant polymer material.Wherein the material of this bearing part 46 then can be organic insulating materials such as FR4, FR5, BT, and the opening 460 of this bearing part 46 can be one or more, for ccontaining one or more substrates that carry chip.Moreover, the gap of also available these substrate 400 upper surfaces of a plurality of undersized film capping and this bearing part 46, the use amount of economization film condensation material, these small size films also can be removed after finishing the encapsulation mold pressing, in addition, also available point glue mode is filled the full sizing material of for example refusing macromolecular materials such as solder flux or epoxy resin in the gap of 46 of this substrate 400 and this bearing parts, is used for locating simultaneously this substrate 400 and this gap of capping.
Shown in Fig. 5 C, one radiator structure 42 is provided, this radiator structure 42 comprises fin 421 and the support portion 422 of extending from these fin 421 edges downwards, this radiator structure 42 is borrowed its support portion 422 to connect to put on this bearing part 46 but not on the substrate 400, and make this semiconductor chip 41 and passive device 49 be contained in fin 421 belows of this radiator structure 42, can avoid radiator structure 42 to take substrate 400 for meeting the configuration district of electronic components such as putting and electrically connect semiconductor chip 41 and passive device 49 like this, and then can be these electronic components and provide maximum substrate to connect to put the space.
Shown in Fig. 5 D, carry out the mold pressing processing procedure, on this substrate 400 and bearing part 46, form the packing colloid 43 that coats this semiconductor chip 41, passive device 49 and radiator structure 42, and the end face that makes this radiator structure 42 exposes outside this packing colloid 43, wherein, the planar dimension that the planar dimension that this packing colloid 43 covers centers on greater than this radiator structure support portion 422, and this packing colloid 43 can be filled in the gap 461 of 460 of this substrate 400 and bearing part openings.
Shown in Fig. 5 E, then remove this film 47, and the surface of chip 41 is not set on this substrate 400, just plant on these substrate 400 lower surfaces and connect a plurality of soldered balls 45, make this chip 41 be electrically connected to the external world, and carry out cutting operation along preliminary dimension (i.e. the planar dimension of the about substrate) position of this semiconductor package part, so as in the support portion 422 that removes this packing colloid 43, radiator structure 42 and the substrate 400 greater than the part of this packaging part pre-set dimension.
Embodiment 3
Fig. 6 is the generalized section of radiating semiconductor packer embodiment 3 of the present invention.The radiating semiconductor packer of the embodiment of the invention 3 can utilize the method for making of the foregoing description to obtain, wherein to have inner shrinking structure and end face thereof be the characteristic that part exposes to this fin 521, present embodiment 3 is with the main difference of the foregoing description, semiconductor chip 51 is through the routing operation, be electrically connected to this substrate 500 by many bonding wires 58, make this semiconductor chip 51 be electrically connected to external device (ED) through a plurality of soldered balls 55 that plant in substrate 500 bottom surfaces.
Embodiment 4
Fig. 7 is the generalized section of radiating semiconductor packer embodiment 4 of the present invention.Radiating semiconductor packer and the foregoing description of the embodiment of the invention 4 are roughly the same, wherein the fin 621 of this radiator structure 62 has the characteristic that inner shrinking structure and end face expose, and main difference is, be on radiator structure 62, to extend to form a protuberance 620 in the present embodiment 4, increase the radiating efficiency of packaging part towards these chip 61 directions.In addition, also alternative is formed with roughening, groove structure on this radiator structure 62, increases the radiating efficiency of packaging part.
Embodiment 5
Fig. 8 is the generalized section of radiating semiconductor packer embodiment 5 of the present invention.Radiating semiconductor packer and the foregoing description of the embodiment of the invention 5 are roughly the same, and main difference is, is to connect to be equipped with useless chip 79 on semiconductor chip 71 in the present embodiment 5, increases the radiating efficiency of packaging part.
Embodiment 6
Fig. 9 is the generalized section of radiating semiconductor packer embodiment 5 of the present invention.Radiating semiconductor packer and the foregoing description of the embodiment of the invention 6 are roughly the same, and main difference is, is to form the stack architecture that comprises a plurality of chips 811,812 on substrate 800 in the present embodiment 6, increases the electrical functionality of this packaging part.
In addition, the radiating semiconductor packer of the above-mentioned different embodiment construction of the present invention can be selected combination according to the actual design demand.
Therefore, radiating semiconductor packer of the present invention and method for making thereof mainly are to put the radiator structure with support portion finishing to put to connect on the brilliant substrate, and this radiator structure is to connect with the support portion to put outside the default planar dimension of this substrate semiconductor-on-insulator packaging part, avoid taking on the substrate for meeting the configuration district of putting and electrically connect semiconductor chip and passive device, can be these electronic components provides maximum substrate to connect to put the space, then, be contained in the mould with die cavity connecing the substrate that is equipped with chip and radiator structure, and the projection plane size of this die cavity is greater than the default planar dimension of semiconductor package part, just the part of this this radiator structure support portion of mould cramping is positioned at the outside, configuration district of this substrate, avoid mould to weigh the circuit of substrate wounded, and potting resin is filled in this die cavity follow-up, form the packing colloid that coats this semiconductor chip, make the preliminary dimension of the size of this packing colloid, then utilize cutting operation to remove this packing colloid again greater than semiconductor package part, size is greater than the part of this packaging part pre-set dimension in the support portion of radiator structure and the substrate.
Have again, the present invention also can connect chip earlier and put and be electrically connected on the substrate that planar dimension approaches package size, again with this substrate orientation in being preset with the bearing part of opening, the support portion of radiator structure is connect put on this bearing part, avoiding taking can be for the effective connecting area that connects electronic components such as putting and electrically connect semiconductor chip and passive device on the substrate.
In addition, because in the packaging part of the present invention, the support portion of this radiator structure does not directly connect puts in the configuration district of this substrate, so having complete space can be for a plurality of semiconductor chips and other electronic component are set, thereby improve the electrical functionality of packaging part, avoid simultaneously in Encapsulation Moulds compacting journey because of mould cramping radiator structure, cause this radiator structure support portion to weigh the problem of base plate line wounded, also have, on this radiator structure, can extend to form a protuberance towards this chip direction, or formation roughening, the structure of grooveization, or on this chip, connect and put a useless chip (dummydie), the radiating efficiency of packaging part increased.

Claims (35)

1. the method for making of a radiating semiconductor packer is characterized in that, this method for making comprises:
Semiconductor chip connect put and be electrically connected on the substrate;
A radiator structure is provided, this radiator structure comprises fin and extends the support portion downwards from this fin, this radiator structure is borrowed its support portion to connect and is put on this substrate, make this semiconductor chip be contained in this fin below, wherein this support portion connects and puts outside the default planar dimension that is positioned at this semiconductor package part on this substrate;
Connect the packing colloid that forms this semiconductor chip of coating and radiator structure on the substrate that is equipped with semiconductor chip and radiator structure at this, the projection plane size of this packing colloid is greater than the default planar dimension of this semiconductor package part; And
Predetermined plane size positions along this semiconductor package part is carried out cutting operation, removes the part that surpasses the default planar dimension of this packaging part in the support portion of this packing colloid, radiator structure and the substrate.
2. the method for making of radiating semiconductor packer as claimed in claim 1 is characterized in that, this substrate is to arrange or a kind of in arranging of vertical bar mode with single mode, array way.
3. the method for making of radiating semiconductor packer as claimed in claim 1 is characterized in that, this semiconductor chip is to be electrically connected to this base board unit with flip-chip or routing mode.
4. the method for making of radiating semiconductor packer as claimed in claim 1 is characterized in that, the end face of this fin is part or exposes outside this packing colloid comprehensively.
5. the method for making of radiating semiconductor packer as claimed in claim 1 is characterized in that, the support portion of this radiator structure is partly or entirely to remove outside this packing colloid.
6. the method for making of radiating semiconductor packer as claimed in claim 1 is characterized in that, this radiator structure optionally is formed with protuberance, roughened textures or the groove structure of protruding to this semiconductor chip.
7. the method for making of radiating semiconductor packer as claimed in claim 1 is characterized in that, includes a plurality of semiconductor chips in this radiating semiconductor packer, and these semiconductor chips are to connect in the storehouse mode to put on this substrate.
8. the method for making of radiating semiconductor packer as claimed in claim 1 is characterized in that, connects on this semiconductor chip to be equipped with useless chip.
9. the method for making of radiating semiconductor packer as claimed in claim 1 is characterized in that, also connects on this substrate and puts and be electrically connected with passive device.
10. the method for making of radiating semiconductor packer as claimed in claim 1 is characterized in that, the fin of this radiator structure is formed with inner shrinking structure at the planar dimension edge along this semiconductor package part.
11. the method for making of a radiating semiconductor packer is characterized in that, this method for making comprises:
Semiconductor chip connect puts and be electrically connected on the substrate, and with this connect be equipped with semiconductor chip substrate orientation in being preset with the bearing part of opening, wherein the planar dimension of this substrate approaches the predetermined plane size of this semiconductor package part;
Provide to include fin and extend the radiator structure of support portion downwards, and borrow its support portion to connect this radiator structure and put on this bearing part, this semiconductor chip is contained in the fin below from this fin;
Carry out the mold pressing processing procedure, on this substrate and bearing part, be formed for coating the packing colloid of this semiconductor chip and radiator structure, wherein, the planar dimension that the planar dimension that this packing colloid covers is centered on greater than this radiator structure support portion; And
Cutting operation is carried out in preliminary dimension position along this semiconductor package part, removes the part that surpasses the default planar dimension of this packaging part in the support portion of this packing colloid and radiator structure.
12. the method for making of radiating semiconductor packer as claimed in claim 11, it is characterized in that, the mode of this substrate orientation in this opening is filler gum in the gap of selectivity between this substrate and this bearing part opening, and the film that posts at least one this opening of capping on this substrate and this bearing part, and this film can be removed after encapsulation mold pressing program.
13. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, the material of this bearing part is be selected from the organic insulating material group that is made up of FR4, FR5, BT a kind of.
14. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, this substrate is to arrange or a kind of in arranging of vertical bar mode with single mode, array way.
15. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, this semiconductor chip is to be electrically connected to this base board unit with flip-chip or routing mode.
16. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, the end face of this fin is part or exposes outside this packing colloid comprehensively.
17. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, the support portion of this radiator structure is partly or entirely to remove outside this packing colloid.
18. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, this radiator structure selectivity is formed with protuberance, roughened textures and the groove structure of protruding towards this semiconductor chip.
19. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, includes a plurality of semiconductor chips in this radiating semiconductor packer, and these semiconductor chips are to connect in the storehouse mode to put on this substrate.
20. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, connects on this semiconductor chip to be equipped with useless chip.
21. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, also connects on this substrate and puts and be electrically connected with passive device.
22. the method for making of radiating semiconductor packer as claimed in claim 11 is characterized in that, the fin of this radiator structure is to be formed with inner shrinking structure at the planar dimension edge along this semiconductor package part.
23. a radiating semiconductor packer is characterized in that, this packaging part comprises:
Substrate has the substrate of first surface and relative second surface;
At least one semiconductor chip connects and puts and be electrically connected on this substrate first surface;
Packing colloid is formed on this substrate first surface, envelope this semiconductor chip, and the side of this packing colloid and substrate is cut mutually flat; And
Radiator structure, be coated in this packing colloid, the support portion that this radiator structure has a fin and extends downwards from this fin periphery, wherein this fin is formed in the packing colloid of this semiconductor chip top, its end face exposes outside this packing colloid, and at least a portion of this support portion is to be cut to remove outside this packing colloid when forming this packaging part.
24. radiating semiconductor packer as claimed in claim 23 is characterized in that, this semiconductor chip is to be electrically connected to this base board unit with flip-chip or routing kind mode.
25. radiating semiconductor packer as claimed in claim 23 is characterized in that, this radiator structure selectivity is formed with protuberance, roughened textures and the groove structure of protruding towards this semiconductor chip.
26. radiating semiconductor packer as claimed in claim 23 is characterized in that, includes a plurality of semiconductor chips in this radiating semiconductor packer, and these semiconductor chips are to connect in the storehouse mode to put on this substrate.
27. radiating semiconductor packer as claimed in claim 23 is characterized in that, connects on this semiconductor chip to be equipped with useless chip.
28. radiating semiconductor packer as claimed in claim 23 is characterized in that, the end face of this fin is part or exposes outside this packing colloid comprehensively.
29. radiating semiconductor packer as claimed in claim 23 is characterized in that, the support portion of this radiator structure is partly or entirely to remove outside this packing colloid.
30. radiating semiconductor packer as claimed in claim 23 is characterized in that, connects on this substrate first surface and puts and be electrically connected with passive device.
31. radiating semiconductor packer as claimed in claim 23 is characterized in that, the fin of this radiator structure forms inner shrinking structure at the planar dimension edge along this semiconductor package part.
32. a radiating semiconductor packer is characterized in that, this packaging part comprises:
Substrate has first surface and relative second surface;
At least one semiconductor chip connects and puts and be electrically connected on this substrate first surface;
Packing colloid is formed on this substrate first surface, coat this semiconductor chip, and the side of this packing colloid and substrate is cut mutually flat; And
Radiator structure, be coated in this packing colloid, the support portion that this radiator structure has fin and extends downwards from this fin periphery, wherein this fin is formed in the packing colloid of this semiconductor chip top, its end face exposes outside this packing colloid, the edge of this fin then is formed with inner shrinking structure, and at least a portion of this support portion is cut outside this packing colloid when forming this packaging part.
33. radiating semiconductor packer as claimed in claim 32 is characterized in that, connects on this substrate first surface and puts and be electrically connected with passive device.
34. radiating semiconductor packer as claimed in claim 32 is characterized in that, the end face of this fin is part or exposes outside this packing colloid comprehensively.
35. radiating semiconductor packer as claimed in claim 32 is characterized in that, the support portion of this radiator structure is partly or entirely to remove outside this packing colloid.
CNB2005100842566A 2005-07-15 2005-07-15 Radiating semiconductor packer and its production Expired - Fee Related CN100466210C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2005100842566A CN100466210C (en) 2005-07-15 2005-07-15 Radiating semiconductor packer and its production

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2005100842566A CN100466210C (en) 2005-07-15 2005-07-15 Radiating semiconductor packer and its production

Publications (2)

Publication Number Publication Date
CN1897237A true CN1897237A (en) 2007-01-17
CN100466210C CN100466210C (en) 2009-03-04

Family

ID=37609699

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2005100842566A Expired - Fee Related CN100466210C (en) 2005-07-15 2005-07-15 Radiating semiconductor packer and its production

Country Status (1)

Country Link
CN (1) CN100466210C (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102881667A (en) * 2012-10-08 2013-01-16 日月光半导体制造股份有限公司 Semiconductor packaging structure

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6541310B1 (en) * 2000-07-24 2003-04-01 Siliconware Precision Industries Co., Ltd. Method of fabricating a thin and fine ball-grid array package with embedded heat spreader
CN1174484C (en) * 2000-11-17 2004-11-03 矽品精密工业股份有限公司 Semiconductor package with radiating structure
CN1172369C (en) * 2001-06-13 2004-10-20 矽品精密工业股份有限公司 Semiconductor package with heat radiator
AU2003273342A1 (en) * 2002-09-30 2004-04-23 Advanced Interconnect Technologies Limited Thermal enhanced package for block mold assembly

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102881667A (en) * 2012-10-08 2013-01-16 日月光半导体制造股份有限公司 Semiconductor packaging structure

Also Published As

Publication number Publication date
CN100466210C (en) 2009-03-04

Similar Documents

Publication Publication Date Title
CN1452245A (en) Semiconductor device and method for mfg. same
CN1832154A (en) Heat spreader and package structure utilizing the same
CN1761051A (en) Integrated circuit encapsulation body and fabricating method thereof
CN1716581A (en) Device mounting board
CN1925141A (en) Chip package structure
CN1453868A (en) Multi-chip package and producing method thereof
CN105762084A (en) Packaging method and packaging device for flip chip
CN1945805A (en) Semiconductor packaging process and carrier for semiconductor package
CN1956178A (en) Photoelectric chip package structure, manufacturing method and its chip carrier
CN1157790C (en) Chip stack package structure
CN1855450A (en) High-heat loss rate semiconductor sealer and its production
US20060292741A1 (en) Heat-dissipating semiconductor package and fabrication method thereof
CN1228839C (en) Multi-die package
CN2499978Y (en) Three dimension stacking package radiator module
CN1172369C (en) Semiconductor package with heat radiator
CN1210789C (en) Semiconductor packaging element with heat sink structure
CN1897237A (en) Radiating semiconductor packer and its production
CN101047160A (en) Semiconductor connection line packaging structure and its method of connection with IC
CN1828854A (en) Manufacturing method of assembling structure of photoelectric semiconductor wafer
CN1303685C (en) Ball grid array (BGA) semiconductor package
CN1257540C (en) Semiconductor chip package method and its package structure
CN1779931A (en) Radiating pack structure and production thereof
CN1171294C (en) Manufacturing method of thin spherical grid array integrated circuit package
CN101064259A (en) Semiconductor package and its chip bearing structure and production method
CN2558078Y (en) Embedded ball lattice array package structure

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20090304