CN1855478A - Modular card stacking structure and its production - Google Patents

Modular card stacking structure and its production Download PDF

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Publication number
CN1855478A
CN1855478A CNA2005100662116A CN200510066211A CN1855478A CN 1855478 A CN1855478 A CN 1855478A CN A2005100662116 A CNA2005100662116 A CN A2005100662116A CN 200510066211 A CN200510066211 A CN 200510066211A CN 1855478 A CN1855478 A CN 1855478A
Authority
CN
China
Prior art keywords
chip
substrate
lower floor
module card
sticker
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2005100662116A
Other languages
Chinese (zh)
Inventor
张鸿租
白忠巧
龙港文
林仕祥
黄文亨
龙昌宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kingpak Technology Inc
Original Assignee
Kingpak Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kingpak Technology Inc filed Critical Kingpak Technology Inc
Priority to CNA2005100662116A priority Critical patent/CN1855478A/en
Publication of CN1855478A publication Critical patent/CN1855478A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

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Abstract

The method comprises: providing a baseboard having an upper surface and an under surface; forming multi first electrodes on said upper surface; providing a first coating and a second coating on said upper surface, and making a first baking to temporarily harden it; providing a sublayer chip located on said surface and above said second coating, and making a second baking to bind said sublayer chip on the baseboard; providing an adhesion agent comprising colloid and fillingup materials, and coating it on said sublayer chip; providing an upper layer chip bonded on said sublayer chip by said adhesion agent and isolated form said sublayer chip by said fillingup materials; said upper layer chip is connected to said first electrodes using multi wires; providing a encapsulation mold layer to cover said upper layer chip, sublayer chip and wires.

Description

The stacking construction of module card and manufacture method thereof
Technical field
The present invention relates to the stacking construction of module card, relate in particular to and a kind ofly reduce small product size, make conveniently, and can reduce production costs and improve the stacking construction and the manufacture method thereof of the module card of reliability.
Background technology
Known module card stacking construction, be to utilize traditional non-conductive adhesive to combine with the substrate intercropping with chip and chip during fabrication at chip, because traditional non-conductive adhesive is to coat this substrate and chip chamber in a glue mode, therefore, the control of this glue amount is quite difficult.Therefore, often cause lower floor's chip entirely to adhere on this substrate, make the upper strata chip also can't be entirely combine with the lower floor chip.
Therefore, its product height makes the manufacture process of encapsulation be difficult to control, and may cause the phenomenon of chip rhegma because of the characteristic of non-conductive adhesive.
In view of this, this case inventor is in line with the spirit of keeping on improving, innovate breakthrough, is devoted to the research and development of image sensor encapsulation, and invents out the stacking construction and the manufacture method thereof of module card of the present invention, makes it make more convenient and improves its reliability.
Summary of the invention
Main purpose of the present invention is to provide a kind of stacking construction and manufacture method thereof of module card, and it has the effect that reduces small product size, to reach compact purpose.
Another object of the present invention is to provide a kind of stacking construction and manufacture method thereof of module card, and it has makes effect easily, to reach the purpose that reduces production costs and improve reliability.
The stacking construction of module card of the present invention includes a substrate, and it is provided with a upper surface and a lower surface, and this upper surface is formed with a plurality of first electrodes; One secondary (B-Stage) glue is coated the upper surface of this substrate; One lower floor's chip is arranged at the upper surface of this substrate, is positioned at this secondary glue top; Many leads are in order to be electrically connected first electrode of this lower floor's chip to this substrate; One sticker includes colloid and packing elements, coats on this lower floor's chip; One upper strata chip is located on this lower floor's chip by sticker is sticking, isolates by this packing elements and lower floor's chip, and is electrically connected to first electrode of this substrate by these many leads; And an adhesive layer, in order to coat this upper and lower layer chip and lead.
The manufacture method of the stacking construction of module card of the present invention comprises the following steps: to provide a substrate, and it is provided with a upper surface and a lower surface, and this upper surface is formed with a plurality of first electrodes; The upper surface that provides a secondary (B-Stage) glue to coat this substrate carries out the baking first time, makes its temporary transient sclerosis; The upper surface that provides lower floor's chip to be arranged at this substrate is positioned at this secondary glue top, carries out the baking second time, makes the adhesion of this lower floor's chip and this substrate fixing; Provide many leads in order to be electrically connected first electrode of this lower floor's chip to this substrate; One sticker is provided, includes colloid and packing elements, coat on this lower floor's chip; Provide a upper strata chip to be located on this lower floor's chip, isolate by this packing elements and lower floor's chip, and be electrically connected to first electrode of this substrate by these many leads by sticker is sticking; And provide an adhesive layer in order to coat this upper and lower layer chip and lead.
Description of drawings
Fig. 1 is the cutaway view of the stacking construction of module card of the present invention;
Fig. 2 is first schematic diagram of manufacture method of the stacking construction of module card of the present invention;
Fig. 3 is second schematic diagram of manufacture method of the stacking construction of module card of the present invention;
Fig. 4 is the 3rd schematic diagram of manufacture method of the stacking construction of module card of the present invention.
The main element symbol description:
10: substrate 12: secondary glue 14: lower floor's chip
16: many leads 18: sticker 20: upper strata chip
22: adhesive layer 24: upper surface 26: lower surface
Electrode 30 in 28: the first: colloid 32: packing elements
Embodiment
Above-mentioned and other purpose, advantage and characteristic of the present invention are more understood in depth by the detailed description of following preferred embodiment and with reference to graphic.
See also Fig. 1, it is the stacking construction of module card of the present invention, and it includes a substrate 10, a secondary glue 12, lower floor's chip 14, many leads 16, a sticker 18, a upper strata chip 20 and adhesive layers 22, wherein:
Substrate 10 is provided with a upper surface 24 and a lower surface 26, and upper surface 24 is formed with a plurality of first electrodes 28;
One secondary (B-Stage) glue 12 is coated the upper surface 24 of substrate 10 in the wire mark mode, carries out the baking first time, makes its temporary transient sclerosis, so, when being coated with secondary glue in the wire mark mode, can entirely secondary glue (B-Stage) 12 be coated on the substrate 10;
One lower floor's chip 14 is arranged at the upper surface 24 of substrate 10, be positioned at secondary glue (B-Stage) 12 tops of sclerosis, advance shape and toast for the second time, 14 adhesions of lower floor's chip are fixing after making secondary glue (B-Stage) 12 softening, so, lower floor's chip 14 entirely can be fixed on the substrate 10;
Many leads 16 are in order to be electrically connected lower floor's chip 14 to first electrode 28 of substrate 10;
One sticker 16 includes colloid 30 and packing elements 32, coats on lower floor's chip 14, and packing elements 32 is spherical in the present embodiment;
One upper strata chip 20 is isolated by packing elements 32 and lower floor's chip 14, and is electrically connected to first electrode 28 of substrate 10 by many leads 16 by sticker 18 sticking being located on lower floor's chip 14; And
One adhesive layer 22 is in order to coat upper and lower layer chip and many leads 16.
See also Fig. 2, it at first provides a substrate 10 for first schematic diagram of the manufacture method of the stacking construction of module card of the present invention, is coated with one deck secondary glue (B-Stage) 12 in the upper surface 24 of substrate 10 in the wire mark mode, carries out first time again and toasts.
Please cooperate and consult Fig. 3, it is second schematic diagram of the manufacture method of the stacking construction of module card of the present invention, one lower floor's chip 14 is provided, it is arranged on the upper surface 24 of substrate 10, and be positioned on the secondary glue (B-Stage) 12, carry out the baking second time, lower floor's chip 14 entirely is adhered on the substrate 10;
Provide many leads 16 in order to be electrically connected lower floor's chip 14 to first electrode 28 of substrate 10.
See also Fig. 4, it provides a sticker 16 for the 3rd schematic diagram of the manufacture method of the stacking construction of module card of the present invention, and it includes colloid 30 and packing elements 32, coats on lower floor's chip 14, and packing elements 32 is spherical in the present embodiment;
Provide a upper strata chip 20 by sticker 18 sticking being located on lower floor's chip 14, isolate by packing elements 32 and lower floor's chip 14, and be electrically connected to first electrode 28 of substrate 10 by many leads 16.
At last, as shown in Figure 1, provide an adhesive layer 22 in order to coat upper and lower layer chip and many leads 16.
So, the present invention utilizes the wire mark mode with secondary glue 12 entirely on the coated substrates 10, make lower floor's chip 14 can entirely be bonded on the substrate 10, upper strata chip 20 piles up by packing elements 32, can prevent the inclination of chip, and avoid the phenomenon that chip exposes after the sealing, can improve the reliability of product.
The specific embodiment that is proposed in the detailed description of preferred embodiment is only in order to be easy to illustrate technology contents of the present invention, be not with narrow sense of the present invention be limited to embodiment, all many variations that situation is done enforcement according to spirit of the present invention and claim all belongs to scope of the present invention.

Claims (6)

1. the stacking construction of a module card is characterized in that including:
One substrate, it is provided with a upper surface and a lower surface, and this upper surface is formed with a plurality of first electrodes;
One secondary glue is coated the upper surface of this substrate;
One lower floor's chip is arranged at the upper surface of this substrate, is positioned at this secondary glue top;
Many leads are electrically connected first electrode of this lower floor's chip to this substrate;
One sticker includes colloid and packing elements, coats on this lower floor's chip;
One upper strata chip is located on this lower floor's chip by sticker is sticking, isolates by this packing elements and lower floor's chip, and is electrically connected to first electrode of this substrate by these many leads; And
One adhesive layer coats this upper and lower layer chip and lead.
2. the stacking construction of module card as claimed in claim 1 is characterized in that, described secondary glue is to coat on this substrate in the wire mark mode.
3. the stacking construction of module card as claimed in claim 1 is characterized in that, the packing elements of described sticker is spherical.
4. the manufacture method of a module card stacking construction is characterized in that comprising the following steps:
One substrate is provided, and it is provided with a upper surface and a lower surface, and this upper surface is formed with a plurality of first electrodes;
One secondary glue is provided, coats the upper surface of this substrate, carry out the baking first time, make its temporary transient sclerosis;
One lower floor's chip is provided, is arranged at the upper surface of this substrate, be positioned at this secondary glue top, carry out the baking second time, make the adhesion of this lower floor's chip and this substrate fixing;
Provide many leads in order to be electrically connected first electrode of this lower floor's chip to this substrate;
One sticker is provided, and it includes colloid and packing elements, coats on this lower floor's chip;
One upper strata chip is provided, is located on this lower floor's chip, and isolate with this packing elements and this lower floor's chip by this sticker is sticking, and to be electrically connected to first electrode of this substrate by these many leads; And
Provide an adhesive layer, in order to coat this upper and lower layer chip and lead.
5. the manufacture method of module card stacking construction as claimed in claim 4 is characterized in that, described secondary glue is to coat on this substrate in the wire mark mode.
6. the manufacture method of module card stacking construction as claimed in claim 4 is characterized in that, the packing elements of described sticker is spherical.
CNA2005100662116A 2005-04-21 2005-04-21 Modular card stacking structure and its production Pending CN1855478A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNA2005100662116A CN1855478A (en) 2005-04-21 2005-04-21 Modular card stacking structure and its production

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNA2005100662116A CN1855478A (en) 2005-04-21 2005-04-21 Modular card stacking structure and its production

Publications (1)

Publication Number Publication Date
CN1855478A true CN1855478A (en) 2006-11-01

Family

ID=37195495

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2005100662116A Pending CN1855478A (en) 2005-04-21 2005-04-21 Modular card stacking structure and its production

Country Status (1)

Country Link
CN (1) CN1855478A (en)

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