CN1851669A - Method for improving storage access efficiency and storage coutroller - Google Patents
Method for improving storage access efficiency and storage coutroller Download PDFInfo
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- CN1851669A CN1851669A CN 200510098653 CN200510098653A CN1851669A CN 1851669 A CN1851669 A CN 1851669A CN 200510098653 CN200510098653 CN 200510098653 CN 200510098653 A CN200510098653 A CN 200510098653A CN 1851669 A CN1851669 A CN 1851669A
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Abstract
Said method is in turn executing activating operation to paging memory N pages and to proceed read operation or write operation to last activated page, after executing read operation or write operation automatically executing close operation to said page, wherein is natural number greater than 2 and less than paging type memory total paginal number. Said invented method can raise memory visiting efficiency. The preferred embodiment in said invented ensures memory visiting efficiency stabilizing in higher level through duplicating N times data and writing in N pages of memory.
Description
Technical field
The present invention relates to data storage technology, particularly relate to a kind of method and Memory Controller that improves memory access efficient.
Background technology
Along with the development of communication and multimedia industry, people are more and more higher to the requirement of data rate, so the speed of process chip such as network processing unit, picture processing chip and Streaming Media process chip is just more and more faster.But the bandwidth of storer is the performance bottleneck of these process chip, though memory manufacturer has been developed multiple high performance dynamic storage, and, the bandwidth of storer can not strengthen along with the raising of performance.
The bandwidth of storer is meant the data volume of reference-to storage in the unit interval, theoretically, the bandwidth of storer is relevant with the data bus figure place of the clock frequency of storer and storer, that is to say, the clock frequency of storer and data bus figure place have determined the peak bandwidth of storer.But when real work, storer may not necessarily reach peak bandwidth, and the factor that influences bandwidth is also a lot, writes and the required time delay of readout memory and the hit rate of the data of storing such as, data.Time delay and hit rate are very big to the influence of bandwidth, when these factors are taken into account, improve storer bandwidth focus on shorten the time delay of reading and writing data and the hit rate that improves the data of storing, promptly improve the access efficiency of storer.
Dynamic storage has a plurality of pages or leaves (Bank) usually, and each page or leaf has a plurality of row and columns.Dynamic storage need activate delegation after (Active) operation usually, could carry out read-write operation to this row.Dynamic processor does not allow to be activated simultaneously with the row of two in one page, so, if certain page exists a row that has been activated, and operate again another when row, must close the row that (Precharge) before had been activated earlier, activate the row that needs operation again, could carry out read-write operation to this row then.
Illustrate the method for existing reference-to storage below,, when same one page different rows of dynamic storage is operated,, activate N page or leaf R in step 101 referring to Fig. 1
1OK; In step 102, read and write access N page or leaf R
1OK; In step 103, close N page or leaf R
1OK; In step 104, activate N page or leaf R
2OK; In step 105, read and write access N page or leaf R
2OK; In step 106, close N page or leaf R
2OK.
Referring to Fig. 2, advance during line operate to same one page of dynamic storage is same, in step 201, it is capable to activate N page or leaf R; In step 202, the capable C of read and write access N page or leaf R
1Row; In step 203, the capable C of read and write access N page or leaf R
2Row; In step 204, the capable C of read and write access N page or leaf R
3Row; In step 205, the capable C of read and write access N page or leaf R1
4Row; In step 206, it is capable to close N page or leaf R.
As can be seen from the above technical solutions, when continuously storer same being advanced line operate, no matter continued operation how many times, only once activation manipulation and a shutoff operation, but, continuously advancing during line operate all corresponding activation manipulation of line feed each time and a shutoff operation to different.Because these activation and the time delay that operation reads and writes data increase such as closing, so, activation and shutoff operation are expenses for reading and writing data, cause waste to bandwidth of memory, the actual bandwidth of storer reduces greatly because of the existence of these expenses, even less than half of peak bandwidth.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of method that improves memory access efficient, utilizes the characteristic of paged memory, and the expense that activation is closed is offset in read-write operation.
Another object of the present invention is to provide a kind of Memory Controller, improve the access efficiency of storer.
The objective of the invention is to be achieved through the following technical solutions:
A kind of method that improves memory access efficient, be applicable to paged memory, it comprises: in order N page or leaf of paged memory carried out activation manipulation, and when current page is carried out activation manipulation on the page or leaf of an activation carry out read operation or write operation, automatically to this page execution shutoff operation, wherein N is greater than 2 and less than the natural number of paged memory total page number after the page or leaf that activates is executed read operation or write operation.
Preferably, described N is 4.
Wherein, described N page or leaf to paged memory carried out activation manipulation and is specially: the delegation in N the page or leaf of paged memory is carried out activation manipulation,
Described page or leaf to activation carries out read operation or write operation is specially: the row to activation in the page or leaf that activates is carried out read operation or write operation.
In an embodiment of the present invention, described activate page or leaf and the page or leaf that activates carried out write operation be specially: in order to delegation's execution activation manipulation of N page or leaf of paged memory, and write the row that activates in the page or leaf of an activation current page being carried out the data to be stored that will not write in the activation manipulation, repeat this step until to all data to be stored are write paged memory.
In the present embodiment, described activate page or leaf and the page or leaf that activates carried out read operation be specially: in order to delegation's execution activation manipulation of N page or leaf of paged memory, and current page is carried out the data to be read that will not read in the activation manipulation from the row that activates the page or leaf of an activation read, repeat this step until all data to be read are read from paged memory.
In a preferred embodiment of the invention, described activate page or leaf and the page or leaf that activates carried out write operation be specially: in order to the same delegation execution activation manipulation of N page or leaf of paged memory, and when current page is carried out activation manipulation, current data to be stored are write the row of activation in the page or leaf of an activation, same delegation to N page or leaf writes identical data current to be stored, then with follow-up data to be stored as current data to be stored, repeat this step until all data to be stored are write paged memory.
In a preferred embodiment, described activate page or leaf and the page or leaf that activates carried out read operation be specially: in order to the different rows execution activation manipulation of N page or leaf of paged memory, and current page is carried out the data to be read of will not read in the activation manipulation from the row that activates the page or leaf of an activation read, repeat this step until all data to be read are read from paged memory.
A kind of Memory Controller, be used for paged memory is controlled, comprise clock module, arbitration modules, initialization module, command module and data path module, described command module sorts to the order relevant with reference-to storage that generates and organizes the back to be sent to paged memory by the data path module, to realize in order N page or leaf of paged memory being carried out activation manipulation, and when current page is carried out activation manipulation on the page or leaf of an activation carry out read operation or write operation, automatically close this page or leaf after the read operation of the page or leaf that activates or write operation are finished, wherein N is greater than 2 and less than the natural number of paged memory total page number.
Preferably, command module duplicates N part N page or leaf of paged memory being carried out activation manipulation and carrying out in the process of write operation with same data to be stored, writes the same position of N page or leaf respectively.
Wherein, the described order relevant with reference-to storage comprise activation, close, read command or write order.From technique scheme as can be seen, method of the present invention is offset the expense that activates and close storer in read-write operation by rationalization's visit order relevant with reference-to storage, thereby has improved the access efficiency of storer.And, in one embodiment of the present invention,, utilize the space to exchange the access bandwidth of storer for by data being duplicated N part N page or leaf of write store respectively, memory access efficient can be remained on a higher level.
Description of drawings
Fig. 1 is the indicative flowchart that the same one page different rows to storer of prior art is operated;
Fig. 2 is the indicative flowchart to the same line operate of advancing of same one page of storer of prior art;
Fig. 3 is the process flow diagram of the visit paged memory of first embodiment of the invention;
Fig. 4 be second embodiment of the invention storer is carried out the process flow diagram of write operation;
Fig. 5 is the process flow diagram that storer is carried out read operation of second embodiment of the invention;
Fig. 6 is the schematic block diagram of Memory Controller of the present invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
Thought of the present invention is to utilize the characteristic of paged memory to improve its bandwidth availability ratio.Introduce some characteristics of storer below.
The first, for paged memory, when activating certain page, can activate other one or more page or leaf.
The second, the delegation that at every turn activates in one page need wait for the regular hour, and promptly activationary time could carry out read-write operation to this row then, and the row that has activated in can be to another page in this section activationary time carries out read-write operation.
The 3rd, paged memory has closes capable function automatically, promptly after the read-write operation of certain row is finished, closes this row automatically.
Based on above three characteristics, can be by will activating and read-write operation hocket, and start and to close capable function automatically, the expense that activates and close is offset in read-write operation.
Below by two embodiment the method for raising memory access efficient of the present invention is elaborated.
First embodiment:
In first embodiment, utilize the characteristics of above-mentioned paged memory, activate not same page in turn and read and write.Fig. 3 is the process flow diagram of the visit paged memory of first embodiment of the invention.From Fig. 3 as seen, present embodiment specifically comprises the steps:
Step 301: activate the R in the Physical Page 1
1OK;
Step 302: activate the R in the Physical Page 2
2OK, and to the R in the Physical Page 1
1Row carries out read-write operation;
Step 303: activate the R in the Physical Page 3
3OK, and to the R in the Physical Page 2
2Row carries out read-write operation;
Step 304: activate the R in the Physical Page 4
4OK, and to the R in the Physical Page 3
3Row carries out read-write operation;
Step 305: to the R in the Physical Page 4
4Row carries out read-write operation.
Then, when still having data to be stored that do not write or the data to be read of not reading, return step 301, take turns circulation from Physical Page 1 beginning second.Take turns in the circulation second, to the R of Physical Page 1
5Row is to the R of Physical Page 4
8Row carries out read-write operation.
Owing to started and closed capable function automatically, circulate when carrying out needs and activating certain one page when epicycle so, the last round of row that is activated has had time enough to finish shutoff operation in this page, so can carry out the activation manipulation of epicycle.For example, after step 302 is finished, promptly to the R of Physical Page 1
1Gone behind the read-write operation,, can in next round round-robin step 301, activate Physical Page 1 once more as long as before step 305 finishes, close this row.Because step 303 during this period of time much larger than the running time that row is closed, therefore can realize not having the circulation of wait to step 305.
From the technical scheme of above-mentioned first embodiment as can be seen, take turns in the circulation at each, finished five operations altogether, wherein read-write operation has accounted for four, so bandwidth utilization has reached 80%.
The foregoing description is an example in four pages of modes of taking turns, and for two page memories, can adopt two pages of modes of taking turns; For eight page memories, can adopt eight pages of modes of taking turns.But for the storer that surpasses four pages, for example eight pages or 16 page memories also can adopt four pages of modes of taking turns.
Though the mode that above-mentioned multipage takes turns can improve the access efficiency of storer greatly, but also there is certain defective, the user is during from memory read data, if data to be read are kept in the different rows with one page, can't use the mode that multipage takes turns and read, therefore, because the randomness of user's reference address, the access efficiency of storer might can't be stabilized in a higher level, so the bandwidth instability of storer.In order to address the above problem, the present invention has proposed a kind of with the wide mode of space tape swapping again, describes in detail in a second embodiment.
Second embodiment:
The wide mode of space tape swapping that present embodiment adopted is: if the mode that adopts the N page or leaf to take turns when writing data, is duplicated N part with data, write the same row of the same delegation of N page or leaf respectively, the data on the N page or leaf are identical like this.When reading of data, can guarantee the mode reading of data that under any circumstance all can utilize multipage to take turns, and can read according to any page or leaf order.For example, for four pages of modes of taking turns, can carry out these four pages randomly ordered, such as can be with Physical Page 3,4,1 and 2 respectively as logical page (LPAGE) 1,2,3 and 4, also can read according to the logical page (LPAGE) order then with Physical Page 4,1,2 and 3 respectively as logical page (LPAGE) 1,2,3 and 4.
Fig. 4 be second embodiment of the invention storer is carried out the process flow diagram of write operation.From Fig. 4 as seen, be example still in the present embodiment in four pages of modes of taking turns, storer is carried out write operation specifically comprise following steps:
Step 401: the R that activates logical page (LPAGE) 1
1OK;
Step 402: the R that activates logical page (LPAGE) 2
1OK, and at the R of logical page (LPAGE) 1
1Row writes data segment D
1
Step 403: the R that activates logical page (LPAGE) 3
1OK, and from the R of logical page (LPAGE) 2
1Row begins to write data segment D
1
Step 404: the R that activates logical page (LPAGE) 4
1OK, and from the R of logical page (LPAGE) 3
1Row begins to write data segment D
1
Step 405: from the R of logical page (LPAGE) 4
1Row begins to write data segment D
1
Then, when still having the data to be stored that do not write, return step 401, take turns circulation from logical page (LPAGE) 1 beginning second.Take turns in the circulation second, at R
2Row writes data segment D
2In the third round circulation, at R
3Row writes data segment D
3, take turns in the i.e. S wheel circulation of circulation, at R until last
SRow writes data segment D
SLike this, after executing write operation, the data on four pages or leaves are identical, data segment D
1, D
2, D
3To D
SLay respectively at four R on the page or leaf
1, R
2, R
3To R
SOK.
Fig. 5 is the process flow diagram that storer is carried out read operation of second embodiment of the invention.From Fig. 5 as seen, be example still in the present embodiment in four pages of modes of taking turns, storer is carried out read operation specifically comprise following steps:
Step 501: the R that activates logical page (LPAGE) 1
1OK;
Step 502: the R that activates logical page (LPAGE) 2
2OK, and from the R of logical page (LPAGE) 1
1Row reading of data section D
1
Step 503: the R that activates logical page (LPAGE) 3
3OK, and from the R of logical page (LPAGE) 2
2Row reading of data section D
2
Step 504: the R that activates logical page (LPAGE) 4
4OK, and from the R of logical page (LPAGE) 3
3Row reading of data section D
3
Step 505: from the R of logical page (LPAGE) 4
4Row reading of data section D
4
Then, when still having the data to be read of not reading, return step 501, take turns circulation from logical page (LPAGE) 1 beginning second.
From technique scheme as seen, in the first round circulation, from the R of logical page (LPAGE) 1
1Walk to the R of logical page (LPAGE) 4
4Row is reading of data section D respectively
1To D
4Second takes turns in the circulation, from the R of logical page (LPAGE) 1
5Walk to the R of logical page (LPAGE) 4
8Row is reading of data section D respectively
5To D
8, take turns circulation until INT (S/4)+1, from the R of logical page (LPAGE) MOD (S/4)
SRow reading of data section D
S, wherein INT () expression rounds operation, and MOD represents to get the operation of remainder.
In the present embodiment, when storer writes data, the data that write are duplicated several parts, respectively in several pages or leaves of write store, so in store identical data in these several pages or leaves, like this, though take up room, but the mode reading of data that can under any circumstance utilize multipage to take turns, and can fetch data according to any page or leaf sequential read, thereby avoided may occurring among first embodiment because data to be read are positioned at the unsettled defective of the access efficiency that different rows caused of same page, be a preferred embodiment of the present invention therefore.
In above-mentioned two embodiment, all hypothesis data that read and the data that write are the data of same size, and in actual applications, the data that read can be the parts in the data that write, the mode and the embodiments of the invention of its realization are similar, do not repeat them here.
The present invention also provides a kind of Memory Controller that improves memory access efficient, and this Memory Controller control store is realized the visit that above-mentioned multipage takes turns.
Fig. 6 is the schematic block diagram of the Memory Controller of raising memory access efficient of the present invention.From Fig. 6 as seen, this Memory Controller comprises clock module, initialization module, arbitration modules, command module and data path module.
Clock module produces the required clock signal of Memory Controller, and clock signal is input to initialization module, arbitration modules, command module and data path module.
Initialization module generates the initialization command to storer, and initialization command sent to command module, resetting, enabling and the configuration of some external Double Data Rate dynamic synchronous random reference-to storage (DDR SDRAM) read write attribute with the delay lock loop (DLL) of realizing storer.
Arbitration modules is finished the arbitration to the request of access of a plurality of paths, carry out fair poll, priority poll etc. according to system requirements, select the request of access of a path, send request of access order and data to command module, and be when writing request data to be written to be sent to command module in request of access; Receive that command module sends from data that storer reads the time, the data that read are sent to corresponding path.
Order and data that command module is sent here initialization module and arbitration modules are handled, orders such as activating, read, close is reasonably sorted and organized, data and order after will optimizing then are sent to the data path module, to realize the mode of the described multipage rotation visit of first embodiment, perhaps, use the described mode of second embodiment with the wide multipage rotation visit of space tape swapping; And the data that read from storer of transmitting that the data path module sends are to arbitration modules.
The data path module is carried out scheduling to the order and the data that receive, makes the order of output and the sequential requirement of data fit interface memory; The data that reception is read from storer carry out being sent to command module after the true feelings sampling to the data that read.
Method of the present invention and Memory Controller are applicable to all types of paged memory, built-in dynamic random access storage device (DRAM) for example, external dynamic synchronous random reference-to storage (SDRAM), external Double Data Rate dynamic synchronous random reference-to storage (DDR SDRAM), external the 2nd generation Double Data Rate dynamic synchronous random reference-to storage (DDR SDRAM2), external low delay dynamic synchronous random reference-to storage (RLDRAM), external quick circulation random access storage device (FCRAM) etc., and comprise the paged memory of any kind that may occur future.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1, a kind of method that improves memory access efficient, be applicable to paged memory, it is characterized in that, comprise: in order N page or leaf of paged memory carried out activation manipulation, and when current page is carried out activation manipulation on the page or leaf of an activation carry out read operation or write operation, automatically to this page execution shutoff operation, wherein N is greater than 2 and less than the natural number of paged memory total page number after the page or leaf that activates is executed read operation or write operation.
2, method according to claim 1 is characterized in that, described N is 4.
3, method according to claim 1 is characterized in that, described N page or leaf to paged memory carried out activation manipulation and be specially: the delegation in N the page or leaf of paged memory is carried out activation manipulation,
Described page or leaf to activation carries out read operation or write operation is specially: the row to activation in the page or leaf that activates is carried out read operation or write operation.
4, method according to claim 3, it is characterized in that, described activate page or leaf and the page or leaf that activates carried out write operation be specially: in order to delegation's execution activation manipulation of N page or leaf of paged memory, and write the row that activates in the page or leaf of an activation current page being carried out the data to be stored that will not write in the activation manipulation, repeat this step until to all data to be stored are write paged memory.
5, method according to claim 4, it is characterized in that, described activate page or leaf and the page or leaf that activates carried out read operation be specially: in order to delegation's execution activation manipulation of N page or leaf of paged memory, and current page is carried out the data to be read that will not read in the activation manipulation from the row that activates the page or leaf of an activation read, repeat this step until all data to be read are read from paged memory.
6, method according to claim 3, it is characterized in that, described activate page or leaf and the page or leaf that activates carried out write operation be specially: in order to the same delegation execution activation manipulation of N page or leaf of paged memory, and when current page is carried out activation manipulation, current data to be stored are write the row of activation in the page or leaf of an activation, same delegation to N page or leaf writes identical data current to be stored, then with follow-up data to be stored as current data to be stored, repeat this step until all data to be stored are write paged memory.
7, method according to claim 6, it is characterized in that, described activate page or leaf and the page or leaf that activates carried out read operation be specially: in order to the different rows execution activation manipulation of N page or leaf of paged memory, and current page is carried out the data to be read of will not read in the activation manipulation from the row that activates the page or leaf of an activation read, repeat this step until all data to be read are read from paged memory.
8, a kind of Memory Controller, be used for paged memory is controlled, comprise clock module, arbitration modules, initialization module, command module and data path module, it is characterized in that, described command module sorts to the order relevant with reference-to storage that generates and organizes the back to be sent to paged memory by the data path module, to realize in order N page or leaf of paged memory being carried out activation manipulation, and when current page is carried out activation manipulation on the page or leaf of an activation carry out read operation or write operation, automatically close this page or leaf after the read operation of the page or leaf that activates or write operation are finished, wherein N is greater than 2 and less than the natural number of paged memory total page number.
9, Memory Controller according to claim 8 is characterized in that, command module duplicates N part N page or leaf of paged memory being carried out activation manipulation and carrying out in the process of write operation with same data to be stored, writes the same position of N page or leaf respectively.
10, according to Claim 8 or 9 described Memory Controllers, it is characterized in that the described order relevant with reference-to storage comprises activation, closes, read command or write order.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103823762A (en) * | 2012-11-19 | 2014-05-28 | 华为技术有限公司 | Random memory table look-up method, random memory table look-up device and random memory table look-up system |
| CN104281545A (en) * | 2013-07-11 | 2015-01-14 | 华为技术有限公司 | Data reading method and data reading equipment |
| CN108701102A (en) * | 2017-10-31 | 2018-10-23 | 深圳市大疆创新科技有限公司 | Direct memory access controller, method for reading data and method for writing data |
| WO2022174367A1 (en) * | 2021-02-18 | 2022-08-25 | Micron Technology, Inc. | Improved implicit ordered command handling |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6128716A (en) * | 1998-01-23 | 2000-10-03 | Motorola Inc. | Memory controller with continuous page mode and method therefor |
| US6009019A (en) * | 1998-02-05 | 1999-12-28 | S3 Incorporated | Real time DRAM eliminating a performance penalty for crossing a page boundary |
| JP3918145B2 (en) * | 2001-05-21 | 2007-05-23 | 株式会社ルネサステクノロジ | Memory controller |
-
2005
- 2005-09-07 CN CNB2005100986539A patent/CN100370436C/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103823762A (en) * | 2012-11-19 | 2014-05-28 | 华为技术有限公司 | Random memory table look-up method, random memory table look-up device and random memory table look-up system |
| CN103823762B (en) * | 2012-11-19 | 2016-08-31 | 华为技术有限公司 | The random look-up method of memorizer, device and system |
| CN104281545A (en) * | 2013-07-11 | 2015-01-14 | 华为技术有限公司 | Data reading method and data reading equipment |
| CN104281545B (en) * | 2013-07-11 | 2018-02-23 | 华为技术有限公司 | A kind of method for reading data and equipment |
| CN108701102A (en) * | 2017-10-31 | 2018-10-23 | 深圳市大疆创新科技有限公司 | Direct memory access controller, method for reading data and method for writing data |
| WO2022174367A1 (en) * | 2021-02-18 | 2022-08-25 | Micron Technology, Inc. | Improved implicit ordered command handling |
| US11995337B2 (en) | 2021-02-18 | 2024-05-28 | Micron Technology, Inc. | Implicit ordered command handling |
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| CN100370436C (en) | 2008-02-20 |
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