CN1831721A - Device for transfering PCI Express interface into multi-USB interface - Google Patents

Device for transfering PCI Express interface into multi-USB interface Download PDF

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Publication number
CN1831721A
CN1831721A CN 200510022525 CN200510022525A CN1831721A CN 1831721 A CN1831721 A CN 1831721A CN 200510022525 CN200510022525 CN 200510022525 CN 200510022525 A CN200510022525 A CN 200510022525A CN 1831721 A CN1831721 A CN 1831721A
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China
Prior art keywords
interface
pci express
usb
bus
equipment
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Pending
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CN 200510022525
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Chinese (zh)
Inventor
朱小茅
吴俊辉
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CHAORUI MICROELECTRONICS Co Ltd SUZHOU
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CHAORUI MICROELECTRONICS Co Ltd SUZHOU
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Application filed by CHAORUI MICROELECTRONICS Co Ltd SUZHOU filed Critical CHAORUI MICROELECTRONICS Co Ltd SUZHOU
Priority to CN 200510022525 priority Critical patent/CN1831721A/en
Publication of CN1831721A publication Critical patent/CN1831721A/en
Pending legal-status Critical Current

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Abstract

A device for converting PCI Express interface to be multiple USB interfaces can convert PCI Express bus interface to be multiple USB interfaces in order to convert multiple USB devices to be one PCI Express multifunction device by simple means.

Description

A kind of PCI Express interface changes the device of a plurality of USB interface
Technical field
The present invention is a kind of device of realizing the computer bus interface conversion, can be a PCI Express interface conversion a plurality of usb host interfaces, thereby can simply realize a plurality of USB device are converted to the multifunctional equipment of a PCI Express interface.
Background technology
PCI Express bus is the upgrading of pci bus.During spring calendar year 2001 IDF, Intel Company announces that will develop third generation input and output technology (3GIO technology) replaces existing P CI bussing technique.In August in the same year, it is the 3GIO standard of Arapahoe that PCI-SIG has ratified code name.In the April in 1 year, PCI-SIG and Arapahoe work group have formally finished the draft of 3GIO, and are PCI Express with its definite designation.Subsequently, PCI-SIG has formally issued 1.0 editions standards of PCI Express.We also belong to shared parallel organization in the pci bus of using now, PCI Express then adopted point-to-point (interconnection technique, that is to say that each equipment all has own special-purpose connection, oneself exclusively enjoys a bandwidth, and does not need to the shared bus bandwidth on demand.PCI Express not only can work with original PCI hardware compatibility, can also strengthen the performance of existing equipment.The characteristics of PCI Express are exactly high-performance, high scalability, high reliability, well upgradability and low cost, and it must replace present pci bus.PCI Express adopts the serial line interface of similar USB simultaneously, supports plug and play and hot swap characteristics, and has the message transmission rate of 2.5Gbps, is higher than the transfer rate of USB 2.0 (480Mbps) far away.
Definition of usb protocol alliance and issue that the usb bus agreement was initiated by Intel Company in 1996, the major version that enters large-scale application at present is USB2.0, USB2.0 supports three kinds of application models, i.e. fast mode (data rate is 480Mbps), full speed pattern (data rate is 12Mbps) and low-speed mode (data rate is 1.5Mbps).Fast mode is mainly used in the transmission of large-scale data piece, and as digital camera, video camera and portable hard drive etc., full speed and low-speed mode then are applied to the less occasion of data volume, as mouse, keyboard etc.USB device is divided into HOST and DEVICE equipment, and HOST equipment can initiatively be initiated operation, and DEVICE equipment is then replied, always the occurring in alternately between a HOST equipment and the DEVICE equipment of data.Generally speaking, the USB interface that provides on the computing machine is the HOST interface, and the interface of equipment such as general electronic equipment such as digital camera, keyboard, mouse, portable hard drive mostly is the DEVICE interface.When these equipment connect computer interface, just can carry out data interaction and communicate by letter between HOST and the DEVICE according to agreement.
Summary of the invention
The invention discloses a kind of device that is a plurality of USB HOST interfaces to a PCI Express interface conversion.Thereby provide a kind of convenient way that a plurality of USB device is converted to a PCI Express multifunctional equipment.Because the message transmission rate of PCI Express bus is up to 2.5Gbps, and the peak data rate of a USB HOST interface only is 480Mbps, so, can realize the USB HOST interface of a plurality of complete versions fully simultaneously by a PCI Express interface.
USB interface has obtained to use very widely in consumer electronics field, and USB interface-based equipment is innumerable.And PCI Express has just come into the market soon, and is just less relatively at the equipment of this bus interface.But the advantage of PCI Express bus interface is again self-evident, and its message transmission rate will be far above USB device.And PCI Express bus can be supported multifunctional equipment as pci bus, and a PCI Express equipment can provide multiple function, and for example, a PCI Express equipment can have network communication and audio decoder function simultaneously.Therefore, we propose a kind of device that is a plurality of USB HOST interfaces to a PCI Express interface conversion, make existing a plurality of USB interface product can directly be converted to a PCI Express multifunctional equipment by this device.
Description of drawings
Fig. 1 has provided the realization block diagram of Express to two USB interface conversion equipment of a PCI of realization disclosed in this invention.
Embodiment
The invention discloses a kind of is a PCI Express interface conversion device of a plurality of usb bus interfaces.
Fig. 1 has provided the realization block diagram 100 of a PCI Express of realization disclosed in this invention interface to two a USB interface conversion.
If data transfer direction be from PCI Express interface to USB interface, then PCI Express interface 102 provides bus signals and is connected to PCI Express interface circuit 104.PCI Express interface circuit 104 is resolved its order and destination address by handling the bus signals of input, and the parallel data-signal of output and address signal are to data converting circuit 106.106 pairs of Frames of data converting circuit are done integrity checking, and judge the address of receiving, if address and USB HOST protocol treatment circuit 108 are complementary, then give USB HOST protocol treatment circuit 108 accurate parallel data; If address and USB HOST protocol treatment circuit 122 are complementary, then give USB HOST protocol treatment circuit 122 accurate parallel data; Otherwise, abandon the data of being received.If USB HOST protocol treatment circuit 108 receives data, then break up parallel data again and form the consecutive frame of USB form, and give USB physical interface 110 the cmos digital logic level transition for the usb bus fiduciary level; Equally, if USBHOST protocol treatment circuit 122 receives data, then break up parallel data again and form the consecutive frame of USB form, and give USB physical interface 124 the cmos digital logic level transition for the usb bus fiduciary level.
If data transfer direction be from USB interface to PCI Express interface, then the bus signals that provides of usb 1 10 is connected to USB HOST protocol treatment circuit 108, equally, the bus signals that usb 1 24 provides is connected to USB HOST protocol treatment circuit 122.USB HOST protocol treatment circuit 108 or USB HOST protocol treatment circuit 122 are by handling the bus signals of input, and data-signal that output is parallel and address signal are to data converting circuit 106.Data converting circuit 106 deal with data (making PID checks and CRC check) and a data of handling well are given PCI Express bus interface circuit 104.PCI Express bus interface circuit 104 is broken up parallel data again and is formed the consecutive frame of PCI Express form, and is the cmos digital logic level transition that PCI Express bus standard level is given PCI Express physical interface 102.
Only provide the explanation of a kind of realization block diagram and related work principle thereof herein, all other do not break away from the equivalence of being finished under the disclosed principle and changes or modification, all should be included in the described claim.

Claims (1)

1. one kind is a PCI Express interface conversion device of a plurality of USB interface, it is characterized in that, only possess a PCIExpress interface and at least two USB HOST interfaces, the one end is connected with computing machine by PCI Express interface, the other end then provides a plurality of USB HOST interfaces to realize and being connected of a plurality of USB device, and makes the equipment of a plurality of support USB interface can be converted to the multifunctional equipment of a support PCI Express interface by this device.
CN 200510022525 2005-12-22 2005-12-22 Device for transfering PCI Express interface into multi-USB interface Pending CN1831721A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200510022525 CN1831721A (en) 2005-12-22 2005-12-22 Device for transfering PCI Express interface into multi-USB interface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200510022525 CN1831721A (en) 2005-12-22 2005-12-22 Device for transfering PCI Express interface into multi-USB interface

Publications (1)

Publication Number Publication Date
CN1831721A true CN1831721A (en) 2006-09-13

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ID=36994057

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200510022525 Pending CN1831721A (en) 2005-12-22 2005-12-22 Device for transfering PCI Express interface into multi-USB interface

Country Status (1)

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CN (1) CN1831721A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104021809A (en) * 2013-03-01 2014-09-03 鸿富锦精密电子(天津)有限公司 Universal serial bus (USB) storage

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104021809A (en) * 2013-03-01 2014-09-03 鸿富锦精密电子(天津)有限公司 Universal serial bus (USB) storage

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