CN1825248A - Power spare system for storage - Google Patents
Power spare system for storage Download PDFInfo
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- CN1825248A CN1825248A CNA2005100087152A CN200510008715A CN1825248A CN 1825248 A CN1825248 A CN 1825248A CN A2005100087152 A CNA2005100087152 A CN A2005100087152A CN 200510008715 A CN200510008715 A CN 200510008715A CN 1825248 A CN1825248 A CN 1825248A
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- power supply
- supply
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- spare system
- redundant
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
- H01L21/2652—Through-implantation
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Abstract
The invention provides a memory power supply standby system. When the power supply shuts down abnormally, the standby power supply would run to supply power for memory to avoid the data lose. When the power supply returns normal, the computer would recovery to the state before the power supply shutting down and continue processing the unfinished work. The reliability and stability of compute system would be improved.
Description
Technical field
The present invention relates to a kind of power spare system, particularly a kind of ACPI standard (Advanced Configuration﹠amp that is applied in; Power Interface, ACPI) power spare system for storage under the electric source modes.
Background technology
Arriving along with the information processing epoch; computer system applies to every profession and trade widely; in general; pay attention to the place of communication quality at some; as; telecommunications company; data center; government bodies of bank and military unit or the like all pass through high-end server; cutter point servers etc. are stored in important information in the computer system; therefore; the running quality of computer system is very important, for example, and when bank is concluding the business funds on account or transmission data; if the situation of power interruption takes place; data in these transaction are all with pop-off, and the infringement that it caused can not be expected, if can be when power interruption; data temporary in the computer system are carried out redundant; use protection just in the data of access, can improve the quality of computer system operation, and the data major part of this class all is to be temporary in the middle of the storer.
So, in order to make the data can be when the power interruption, keep at that time the not data of power cut-off, the power supply redundant need be provided, allow computer system that unclosed work is still finished and the redundant data, common mode is to adopt uninterrupted power source (Uninterrupted Power Supply, UPS) system solves the problem of this class, but the cost of uninterruptible power system is higher.
In addition, please refer to the Taiwan patent announcement, a kind of spare power of this patent disclosure system wakes the power supply method of electrical equipment automatically up in response to telegram in reply number No. 525330, and it comprises the following step: when outage takes place, make an electrical equipment enter a battery saving mode automatically; And the end of detecting this outage, thereby when getting rid of, this outage make this electrical equipment wake the normal operation pattern that returns back to automatically up from this battery saving mode, avoid power issue to cause the error cut-off machine of system thus, can exempt simultaneously the puzzlement in the use, but this patent proposes relevant power spare system framework not at memory power part in the computer system.
Therefore, how if can adopt mode cheaply, preserve data temporary in the storer, avoid the infringement that when power supply supply aborted, caused, and recover just often in the power supply supply, allow the working routine of computer system return to the preceding state of outage, thereby improve the reliability (Reliability) and stability (Stability) of computer system, become one of researchist's problem to be solved.
Summary of the invention
Because shortcoming and insurmountable problem that prior art exists, the present invention proposes a kind of power spare system of storer, when the power supply supply failure, provide the data required power supply of storer in preserve handling by power spare system, recover just often in the power supply supply, allow the working routine of computer system return to the preceding state of outage, thereby improve the reliability and stability of computer system.
Institute thinks and reaches above-mentioned purpose, power spare system for storage disclosed in this invention, when the power supply supply failure, provide backup battery to storer, data with in the temporary storage include: electric power detecting unit, power supply redundant control module, power supply redundant unit and power supply supply switch unit.
The electric power detecting unit in order to detecting power supply supply status, when being aborted as if the power supply supply status, produces a power failure signal.
Power supply redundant control module, the state according to the power supply supply produces a power supply redundant control signal, with the activation backup battery, and prepares to power.
Power supply supply switch unit is according to control signal, in order to the path of Switching power supply.
Power supply redundant unit is in order to provide backup battery, with the data in the temporary storage.
Wherein computer system enters the 3rd (S3) pattern of ACPI standard (ACPI), the computer system data of reserve storage only under this pattern, so only need get final product to the storer power supply, therefore, the power-on time of backup battery more can obtain prolonging, and recover just often power supply redundant feeding unit to be charged in the power supply supply, thereby guarantee the power supply capacity of power supply redundant feeding unit.
Institute thinks and reaches above-mentioned purpose that the power spare system of computer system disclosed in this invention comprises:
Storer is in order to the temporary medium pending data of computer system.
Central processor unit is the nucleus module in the computer system, in order to data temporary in the processing memory.
Chipset, in order to the transmission of the signal in control computer system operation, and chipset includes South Bridge chip and north bridge chips.
Power supply unit receives the power supply supply, so that the required power supply of working in the computer system to be provided.
The electric power detecting unit is in order to the state of detecting power supply supply.
Power supply redundant control module is according to the state of power supply supply, to produce a backup battery control signal.
Power supply supply switch unit is according to control signal, in order to the supply path of Switching power supply.
Power supply redundant feeding unit is in order to provide backup battery, so that the temporary medium pending data of computer system of storer.
In addition, for reaching the power supply redundant Supply Method that above-mentioned purpose the present invention further discloses a kind of storer, include the following step:
At first, whether detecting power supply supply status interrupts to judge present power supply supply, if the supply failure of detecting power supply, the electric power detecting unit produces power failure signal and gives power supply redundant control module, and prepares to carry out backup battery supply program.
Next, make computer system enter the 3rd (S3) pattern under ACPI (ACPI) pattern, and activating power redundant feeding unit is prepared to power; After computer system entered the 3rd (S3) pattern, the Switching power feed lines was by the power supply of power supply redundant feeding unit, to provide the storer temporal data required power supply.
Whether the supply of detecting power supply recovers normally, if the power supply supply recovers just often, then the Switching power feed lines is powered by normal power source; Powered-down redundant feeding unit so that power supply redundant feeding unit is charged, thereby is guaranteed the power supply capacity of power supply redundant feeding unit.
By the sort memory power spare system, when power system generation power interruption, by activating and Switching power redundant supply system, to provide the storer temporal data required power supply, the data that allow storer preserve unfinished work are when the power up regular supply, the data that make computer system pass through to preserve in the storer, return to the preceding state of outage, handle uncompleted work, thereby improve computer system security with stable with continuation.
The present invention is described in detail below in conjunction with drawings and Examples.
Description of drawings
Fig. 1 is a system block diagrams of the present invention;
Fig. 2 is a flow chart of steps of the present invention;
Fig. 3 is the circuit box synoptic diagram of power supply redundant control module of the present invention; And
Fig. 4 is the circuit diagram of power supply supply switch unit of the present invention.
Wherein, Reference numeral:
1 node
10 electric power detecting unit
2 nodes
20 power supply redundant control modules
21 and door switch
22 first impact dampers
23 second impact dampers
24 non-door switch
25 D type flip-flops
26 the first transistor switches
3 nodes
30 power supplys supply switch unit
31 battery cell monitorings and charger
32 redundants power supply voltage stabilizer
33 diode switches
34 transistor seconds switches
35 normal power supply voltage stabilizers
36 batteries
4 nodes
40 power supply redundant feeding units
50 storeies
60 power supply units
80 north bridge chips
70 South Bridge chips
90 central processor units
R1～R5 resistance
Whether the supply of step 100 power supply is interrupted
Step 101 makes computer system enter battery saving mode
Step 102 Switching power feed lines is powered by power supply redundant feeding unit
Whether the supply of step 103 power supply recovers normal
Step 104 Switching power feed lines is powered by normal power source
Step 105 pair power supply redundant feeding unit charges
Embodiment
Please refer to Fig. 1, it is a system block diagrams of the present invention, comprising: electric power detecting unit 10, power supply redundant control module 20, power supply supply switch unit 30 and power supply redundant feeding unit 40.
Electric power detecting unit 10, in order to detecting power supply supply status, if the power supply supply status is aborted (for example, power failure or an abnormal shutdown etc.), (for example then produce a power failure signal, can not protected type interrupt instruction Non-Maskable Interrupt, NMI), at this moment, computer system must be interrupted the work order of present, and carry out and can not interrupt (NMI) instruction by protected type, the interruption of this type can allow central processor unit 90 priority processing, and covers all working instruction.
Power supply redundant control module 20, be connected with electric power detecting unit 10, according to power failure signal, produce a backup battery control signal, with activating power redundant feeding unit 40, wherein when power supply supply normal condition, and control charge circuit (not shown) charges to power supply redundant feeding unit 40.
Power supply supply switch unit 30 is connected with power supply redundant control module 20, and the control signal according to power supply redundant control module 20 produces is power supply redundant supply loop in order to the Switching power supply loop, thereby provides storer 50 temporal datas required power supply.
Power supply redundant feeding unit 40, be connected with power supply redundant control module 20, power supply supply switch unit 30 respectively, control signal by power supply redundant control module 20 triggers the activation, and provide storer 50 temporal datas required power supply by power supply supply switch unit 30, wherein power supply redundant feeding unit 40 is a battery, for example, 2.5 volt DC voltage source batteries.
In addition, under power supply supply normal condition, power supply redundant control module 20 charges to power supply redundant feeding unit 40 by normal power source, to guarantee the power supply capacity of power supply redundant feeding unit 40.
Storer 50, be connected with power supply supply switch unit 30, in order to the temporary medium pending data of computer system, and storer 50 can be divided into temporary (Registered) and the type of non-temporary (Non-Registered), in addition, storer 50 according to access mode can be divided into again ROM (read-only memory) (Read only Memory, ROM) and random access memory (Random Access Memory, RAM).
Power supply unit 60, be connected with power supply supply switch unit 30, under the normal power supply state, (for example be responsible for providing the required power supply of storer 50 temporal datas, 1.8 the required working power of other module (example, South Bridge chip 70, north bridge chips 80 and central processor unit 90 etc.)～3.3 volt DC voltage sources) and in the computer system.
South bridge (South Bridge) chip 70, with electric power detecting unit 10, power supply redundant control module 20 connects, in order to be responsible for the signal transmission operation of peripheral interface in the control computer system, comprise: Industry Standard Architecture (IndustryStandard Architecture, ISA), integrated equipment electronic unit (Integrated Device Electronics, IDE), USB (universal serial bus) (Universal Serial Bus, USB), peripheral controller interface (Peripheral ControllerInterface, PCI), low pin is counted interface (Low Pin Count Interface, LPC) and System Management Bus (SystemManagement Bus, SM Bus), keyboard and mouse.
Wherein South Bridge chip 70 more receives the power failure signal that electric power detecting unit 10 produces, and with the trigger pip of generation powder source management mode, thereby makes computer system enter the 3rd (S3) pattern of ACPI standard (ACPI).
North bridge (North Bridge) chip 80, be connected with South Bridge chip 70, in order to be responsible for the signal transmission operation of several main modular in the control computer system, include: central processing unit, storer, peripheral controller interface (PeripheralController Interface, PCI) and graphic accelerating interface (Accelerated Graphic Port, AGP).
Central processor unit 90 is connected with north bridge chips 80, is the nucleus module in the computer system, in order to be responsible for the signal Processing operation of each module.
Next, power supply redundant of the present invention supply is at a kind of ACPI (AdvancedConfiguration﹠amp; Power Interface under power supply operating mode ACPI), carries out the power supply program to storer, and is following once with regard to one explanation of the do of dormancy (Sleeping) state in the power supply operating mode of ACPI (ACPI):
At first, dormant state can be divided 6 levels again, is the 0th (S0) pattern to the five (S5) pattern in regular turn, and the 0th (S0) pattern is a normal mode of operation, does not promptly enter dormant state, and all devices in the system are normal operating conditions.
Under first (S1) pattern, central processor unit 90 quits work, and wakes (Wake up) action up if carry out, and computer system can be resumed work, and the data in the system can not be lost, and returns to the state before the dormancy.
Under second (S2) pattern, be similar to first (S1) pattern, but central processor unit 90 is closed conditions, so the data of getting soon in (catch) storer (not shown) can be lost, if carry out wake actions, then need operating system (Operation System) to safeguard central processor unit 90 and the interior data of high-speed cache again.
And under the 3rd (S3) pattern, computer system is the data in the reserve storage 50 only, other is as central processor unit 90, high-speed cache, chipset (example, South Bridge chip 70 and north bridge chips 80 etc.) and peripheral data all can lose, under this pattern, carry out wake actions, can directly from storer, take out temporal data, to work on, and need not wait for operating system or re-execute application program, thereby promoting computer system replys speed, but need storer 50 is powered.
The 4th (S4) pattern is the disc dormancy state, power consumption under this pattern is minimum, but department of computer science is longer around the time of resuming work, all devices is closed condition in the computer system at this moment, therefore, do not use any power source, and the 5th (S5) mode class is similar to the 4th (S4) pattern, but any data content is not safeguarded and stored to operating system.
So when computer system entered the 3rd (S3) pattern, only needing provided power supply to storer 50, and after the power supply supply was normal, the system recovery of this pattern was fast again, more can improve the efficient that computing machine is carried out.
So the data in the storer 50 can temporarily be kept, wait for that the power supply supply recovers just often, by computer system temporal data is being read out, wherein computer system can check whether temporal data has the message of check errors (ECCError), if the wrong message of temporal data, then deleted, caused the malfunction of peripheral unit to avoid wrong memory data.
Please refer to Fig. 2, it is a flow chart of steps of the present invention, at first, detecting power supply supply status (step 100), whether interrupt to judge present power supply supply, if the supply failure of detecting power supply, electric power detecting unit 10 produces power failure signal and gives power supply redundant control module 20, and prepares to carry out backup battery supply program.
Next, make computer system enter the 3rd (S3) pattern (step 101) under ACPI (ACPI) pattern, and activating power redundant feeding unit 40 is prepared to power; After computer system entered the 3rd (S3) pattern, the Switching power feed lines was by 40 power supplies (step 102) of power supply redundant feeding unit, to provide storer 50 temporal datas required power supply.
Whether the supply of detecting power supply recovers normal (step 103), if the power supply supply recovers just often, then the Switching power feed lines is by normal power source power supply (step 104), promptly give storer 50 by power supply unit 60 power supplies, and powered-down redundant feeding unit 40, so that power supply redundant feeding unit 40 is charged (step 105), thereby guarantee the power supply capacity of power supply redundant feeding unit 40.
Please refer to Fig. 3, it is the circuit diagram of power supply redundant control module of the present invention, includes: with door switch 21, first impact damper 22, second impact damper 23, non-door switch 24, D type flip-flop 25, the first transistor switch 26 and first resistance R 1～the 5th resistance R 5.
At first, capture power supply respectively with door switch 21 and activate (POWER_ON) signal and three-mode activation (SLP3_DLY#) signal, and be connected to the control end of first impact damper 22 and the control end of second impact damper 23 respectively with the output terminal of door switch 21.
Next, the signal of the input end acquisition battery buffer data-signal (BAT_REG_DATA) of first impact damper 22, and the output terminal of first impact damper 22 is connected to node 1, an end of first resistance R 1 is connected to another termination 2.5 voltaism potential sources of node 1, the first resistance R 1.
The signal of the input end acquisition battery buffer clock signal (BAT_REG_CLK) of second impact damper 23, and the output terminal of second impact damper 23 is connected to node 2, an end of second resistance R 2 is connected to the other end ground connection of node 2, the second resistance R 2.
The input end of non-door switch 24 is connected to node 2, but not the output terminal of door switch 24 is connected to the input end of clock of D type flip-flop 25, the person of connecing is connected to node 1 with the data input pin of D type flip-flop 25.
One end of the 3rd resistance R 3 is connected to node 3, and another termination 2.5 voltaism potential sources of the 3rd resistance R 3, the presetting (Preset), remove (Clear) signal input part and be connected to node 3 respectively of D type flip-flop 25.
Next, second output terminal of D type flip-flop 25 sees through the 4th resistance R 4 and is connected with the base stage of the first transistor switch 26, the emitter grounding of the first transistor switch 26, the collection utmost point of the first transistor switch 26 is connected to node 4, and the 5th resistance R 5 one end connected nodes 4, another termination 2.5 voltaism potential sources of the 5th resistance R 5, wherein node 4 outputs one backup battery activation signal (BAT_ON).
In addition, more export switching signal according to operation result, with 30 actions of driving power supply switch unit with door switch 21.
Please refer to Fig. 4, it is the circuit box synoptic diagram of power supply supply switch unit of the present invention, includes: battery cell monitoring and charger 31 redundants power supply voltage stabilizer 32, diode switch 33, transistor seconds switch 34 and normal power supply voltage stabilizer 35 redundants power supply voltage stabilizer 36.
Battery cell monitoring and charger 31, in order to the state (for example, electric weight and temperature etc.) of monitoring battery 36 and battery 36 is carried out charging procedure, wherein, battery cell monitoring and charger 31 are triggered by the control signal of power supply redundant control module 20, to activate the charging procedure to battery 36.
Redundant power supply voltage stabilizer 32 in order to working power (for example, 2.5 volt DC voltage sources) required in the computer system to be provided, and uses this power supply to comprise: power supply redundant control module 20 and memory cell 50 in the computer system.
Normal power supply voltage stabilizer 35, in order to provide working power required in the computer system (for example, 2.5 the volt DC voltage source), use this power supply to comprise in the computer system: other logical circuits such as power supply redundant control module 20, storer 50, South Bridge chip 70 and north bridge chips 80.
Power spare system by sort memory, when power supply supply generation aborted, make computer system enter the battery saving mode of ACPI standard (ACPI), and by activating and Switching power redundant supply system, to offer the required power supply of storer temporal data, when the power up regular supply, make computer system pass through data temporary in the storer, can continue to handle uncompleted work, thereby improve the reliability and stability of computer system.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from the utility model spirit and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the utility model, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the utility model.
Claims (14)
1, a kind of power spare system of storer when the power supply supply failure, provides a backup battery to a storer, and the data with in temporary this storer is characterized in that, comprising:
One electric power detecting unit is in order to detect the state of this power supply supply;
One power supply redundant control module according to the state of this power supply supply, produces the control signal of this backup battery;
One power supply supply switch unit is according to this control signal, in order to switch the supply path of this power supply supply; And
One power supply redundant feeding unit is in order to provide this backup battery, so that temporary these data of this storer.
2, power spare system according to claim 1 is characterized in that, during described this power supply supply failure, described electric power detecting unit produces a power failure signal.
3, power spare system according to claim 2 is characterized in that, described power failure signal is one can not protected type to interrupt (NMI) instruction.
4, power spare system according to claim 1 is characterized in that, during described power supply supply failure, described power supply supply switch unit switches described power supply redundant feeding unit powers.
5, power spare system according to claim 1 is characterized in that, described power supply supply recovers just often, and described power supply supply switch unit switches described power supply supply powers.
6, power spare system according to claim 5 is characterized in that, described power supply redundant feeding unit also carries out a charging operation.
7, power spare system according to claim 1 is characterized in that, described power supply redundant feeding unit also includes a battery.
8, power spare system according to claim 1 is characterized in that, described power supply redundant feeding unit is opened described backup battery by described control signal.
9, power spare system according to claim 1 is characterized in that, described power supply redundant feeding unit is closed described backup battery by described control signal.
10, a kind of power spare system of computer system is characterized in that, includes:
One storer is in order to the temporary medium pending data of this computer system;
One central processor unit is in order to processing said data;
One chipset is in order to control the signal transmission operation of described computer system;
One power supply unit receives a power supply supply, to provide described computer working required power supply;
One electric power detecting unit is in order to detect the state of described power supply supply;
One power supply redundant control module according to the state of described power supply supply, produces the control signal of a backup battery;
One power supply supply switch unit is according to described control signal, in order to switch the supply path of described power supply supply; And
One power supply redundant feeding unit is in order to provide described backup battery, so that the temporary described data of described storer.
11, power spare system according to claim 10 is characterized in that, described chipset includes a South Bridge chip and a north bridge chips.
12, power spare system according to claim 10 is characterized in that, during described power supply supply failure, described electric power detecting unit produces a power failure signal.
13, power spare system according to claim 1 is characterized in that, described power failure signal is one can not protected type to interrupt (NMI) instruction.
14, power spare system according to claim 1 is characterized in that, during described power supply supply failure, described power supply supply switch unit switches described power supply redundant feeding unit powers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100087152A CN100371858C (en) | 2005-02-24 | 2005-02-24 | Power spare system for storage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100087152A CN100371858C (en) | 2005-02-24 | 2005-02-24 | Power spare system for storage |
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| Publication Number | Publication Date |
|---|---|
| CN1825248A true CN1825248A (en) | 2006-08-30 |
| CN100371858C CN100371858C (en) | 2008-02-27 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2005100087152A Expired - Fee Related CN100371858C (en) | 2005-02-24 | 2005-02-24 | Power spare system for storage |
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| CN (1) | CN100371858C (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102033826A (en) * | 2010-12-03 | 2011-04-27 | 创新科存储技术有限公司 | Power failure data protection device and method for internal memory |
| WO2014166419A1 (en) * | 2013-04-12 | 2014-10-16 | 中国银联股份有限公司 | Method and terminal device for continuous power supply to external carrier |
| CN105487865A (en) * | 2015-11-27 | 2016-04-13 | 山东超越数控电子有限公司 | Method for solving problem of abnormal arousal of system by USB device |
| CN106873504A (en) * | 2015-10-20 | 2017-06-20 | Ls 产电株式会社 | Plc system |
| CN110196678A (en) * | 2018-02-23 | 2019-09-03 | 环达电脑(上海)有限公司 | Data stores determination device |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2031126U (en) * | 1987-12-26 | 1989-01-18 | 牟耀东 | Controlled protector for stored data of mini computer |
| US6230274B1 (en) * | 1998-11-03 | 2001-05-08 | Intel Corporation | Method and apparatus for restoring a memory device channel when exiting a low power state |
| CN1307260A (en) * | 2000-01-25 | 2001-08-08 | 睿阳科技股份有限公司 | UPS device and method capable of storing data automatically |
-
2005
- 2005-02-24 CN CNB2005100087152A patent/CN100371858C/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102033826A (en) * | 2010-12-03 | 2011-04-27 | 创新科存储技术有限公司 | Power failure data protection device and method for internal memory |
| CN102033826B (en) * | 2010-12-03 | 2012-05-30 | 创新科存储技术有限公司 | Power failure data protection device and method for internal memory |
| WO2014166419A1 (en) * | 2013-04-12 | 2014-10-16 | 中国银联股份有限公司 | Method and terminal device for continuous power supply to external carrier |
| US9880597B2 (en) | 2013-04-12 | 2018-01-30 | China Unionpay Co., Ltd. | Method and terminal device for continuous power supply to external carrier |
| CN106873504A (en) * | 2015-10-20 | 2017-06-20 | Ls 产电株式会社 | Plc system |
| CN105487865A (en) * | 2015-11-27 | 2016-04-13 | 山东超越数控电子有限公司 | Method for solving problem of abnormal arousal of system by USB device |
| CN110196678A (en) * | 2018-02-23 | 2019-09-03 | 环达电脑(上海)有限公司 | Data stores determination device |
| CN110196678B (en) * | 2018-02-23 | 2022-09-30 | 环达电脑(上海)有限公司 | Data storage determining device |
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|---|---|
| CN100371858C (en) | 2008-02-27 |
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