CN1798018A - Device and method for synchronizing system clock - Google Patents
Device and method for synchronizing system clock Download PDFInfo
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- CN1798018A CN1798018A CN 200410077711 CN200410077711A CN1798018A CN 1798018 A CN1798018 A CN 1798018A CN 200410077711 CN200410077711 CN 200410077711 CN 200410077711 A CN200410077711 A CN 200410077711A CN 1798018 A CN1798018 A CN 1798018A
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Abstract
The device includes multiple service units, two clock units in master slave modes each other, and one information exchange unit. The service unit is in use for picking up clock in received service, and synchronized clock is in use for reference clock for sending service. The clock unit is in use for processing and distributing clock. Being in use for connecting clock unit to service unit, the information exchange unit provides clock connection and data communication channel. Service unit picks up clock in received service. Before service unit selects clock based on quality information of clock, slave clock unit is exchanged to master clock unit so as to extends range for selecting source of clock. As long as the clock quantity is good enough, any service clock entered to system can become global synchronous clock of system, and each service unit can carry out lossless clock exchange.
Description
Technical field
The present invention relates to the device and method that the synchronous and harmless protection of system clock is switched in communication field; relate in particular to a kind of multiservice transport platform system and sub-speed transparent multiplexing system and auto switching method thereof in the optical communication field; it can provide unified clock and redundancy clock protection to the equipment of different business in the system and different rates grade, and can finish harmless clock switching.
Background technology
Along with the fast development of mechanics of communication and electronic technology, the clock kind in the communication apparatus is more and more, and clock frequency is also more and more higher.This point is particularly outstanding in bearing the optical communication equipment that multi-service inserts: not only will guarantee clock synchronization when carrying out rate transition, multiplexing and demultiplexing between the business of different rates grade, and clock need trace on the same network primary resource clock.At present, the clock of various speed grade is distributed in the different unit in the clock system, is unfavorable for the collection in clock source, also is unfavorable for the distribution of clock; And principal and subordinate's clock unit works alone separately, even principal and subordinate's clock unit has identical clock source, also certainly exists unmanageable phase difference and difference on the frequency between principal and subordinate's clock, thereby can cause service damage when causing clock to switch.
Therefore, prior art has defective, and awaits improving and development.
Summary of the invention
The object of the present invention is to provide a kind of system clock synchronizer and method, can collect the clock of each unit in the system, realize the synchronous of system's internal clock, can provide the on all four output clock of two-way phase place to use simultaneously for each unit in the system.
Technical scheme of the present invention is as follows:
A kind of system clock synchronizer, wherein, it comprises a plurality of business unit, two clock unit and an information exchange unit of principal and subordinate each other, and described business unit is used for extracting the clock of reception business, and the clock after using synchronously is as sending the business reference clock; Described clock unit is used for handling and distributing clock; Described information exchange unit is used for clock unit and business unit are coupled together, and connects and the data communication passage for they provide clock.
Described device, wherein, described business unit also comprises: the professional receiver module of band Clock Extraction function, phase-locked loop and the professional sending module that has redundancy clock to import; Described professional receiver module extracts clock and exports to described clock unit from the business that receives, for clock unit provides timing reference input; Described principal and subordinate's clock unit is sent the two-way frequency clock all identical with phase place back to and is given described business unit, after the described phase-locked loop that has redundancy clock to import is selected them to handle, offers professional sending module as sending reference clock.
Described device, wherein, described principal and subordinate's clock unit has identical structure, all comprises clock selection module, phase-locked loop and clock distribution module; Described clock selection module is used for all clocks of system are selected, and is input to then in the phase-locked loop, behind the described clock distribution of the output process unit of phase-locked loop, can pass to all business unit.
Described device, wherein, described master clock unit is used for selecting best clock from all clock sources, carries out tracking lock and handles; On the described output clock that then always is locked in the master clock unit from clock unit.
Described device, wherein, all clocks of described system comprise that clock, system's external clock and principal and subordinate's clock unit that all business unit transmission come send clock mutually.
The method that a kind of system clock is synchronous, it may further comprise the steps:
A) described business unit extracts clock signal from the business that receives, and obtains clock quality information, sends the master clock unit simultaneously to by information exchange unit then and from clock unit;
B) after all clocks of system were collected in described master clock unit, be locked on the clock source the best in quality, and give all business unit with the clock distribution that produces and from clock unit; On the described output clock that is locked in the master clock unit from clock unit all the time;
C) after described business unit receives principal and subordinate's clock that principal and subordinate's clock unit sends here, handle, be locked on the master clock, reference clock is provided for professional sending module through phase-locked loop;
D) behind the master clock element failure, described output clock from clock unit still keeps the frequency and the phase place of master clock before losing efficacy, and simultaneously describedly becomes the master clock unit from the rapid auto switching of clock unit, and begins again the clock source of tracking lock the best.
E) described business unit is behind the master clock element failure, phase-locked loop can carry out the clock source and switch, switch to from clock, owing to identical frequency and phase place are arranged from clock and master clock, therefore switching of clock source can't harm, and phase-locked loop provides reference clock to be affected for professional sending module.
A kind of system clock synchronizer provided by the present invention and method, owing to adopt business unit to extract the clock in accepting business and select according to clock quality information, switch from trend master clock unit from clock unit before, enlarged the range of choice in clock source, any business clock that enters system can become the global synchronization clock of system as long as clock quality is enough good; Provide two-way phase place and the on all four principal and subordinate's redundancy clock of frequency in the clock unit of the present invention simultaneously, each business unit can can't harm clock switch.
Description of drawings
Fig. 1 is clock synchronization of the present invention and redundancy protection architecture schematic diagram;
Fig. 2 is the business unit structural representation in the described system clock synchronizer of the present invention;
Fig. 3 is a clock unit structural representation in the described system clock synchronizer of the present invention;
Fig. 4 is that system clock synchronizer of the present invention and method are at system's workflow diagram just often;
Fig. 5 is the active-standby switching operational flowchart of system clock synchronizer of the present invention and method.
Embodiment
Below in conjunction with accompanying drawing, concrete technology implementation scheme of the present invention is explained in detail.
System clock synchronizer of the present invention, it comprises a plurality of business unit, two clock unit and an information exchange unit of principal and subordinate each other, described business unit extracts the clock in the reception business, and the clock after using synchronously is as sending the business reference clock; Clock unit is handled and the distribution clock; Information exchange unit couples together clock unit and business unit, connects and the data communication passage for they provide clock.
In the system clock synchro system of the present invention a plurality of business unit are arranged, described business unit comprises three modules: the professional receiver module of band Clock Extraction function, phase-locked loop and the professional sending module that has redundancy clock to import.Described professional receiver module extracts clock and exports to clock unit from the business that receives, for clock unit provides timing reference input.Principal and subordinate's clock unit is sent the two-way frequency clock all identical with phase place back to and is given business unit simultaneously, after the phase-locked loop that has redundancy clock to import is selected them to handle, offers professional sending module as sending reference clock.
Have two clock units of principal and subordinate in the system of the present invention simultaneously, they have identical structure, just the working method difference.Described clock unit is made of clock selection module, phase-locked loop and clock distribution module three parts, the all clocks of described system all are input to clock selection module, comprise that clock, system's external clock and principal and subordinate's clock unit that all business unit transmission come send clock mutually.Be input in the phase-locked loop through after the clock selecting, the phase-locked loop on the clock unit has locking, keeps and freely shakes function.Behind the output process clock distribution unit of phase-locked loop, can pass to all business unit.Best clock is selected in the master clock unit from all clock sources, carrying out tracking lock handles, then be locked in from clock unit on the output clock of master clock unit, when having guaranteed operate as normal like this, the frequency of the output clock of principal and subordinate's clock veneer is consistent with phase place always.
Described business unit and clock unit link together by information exchange unit, information exchange unit connects and the data communication passage for whole system provides clock: it all is connected to the output clock of each business unit on the master/backup clock unit, and the clock of master/backup clock unit output is assigned to respectively on each business unit.It has also set up communication bus between master/backup clock unit and business unit simultaneously, is used for the transfer clock quality information.
The workflow of system of the present invention is: described business unit extracts clock signal from the business that receives, and obtains clock quality information, sends the master clock unit simultaneously to by information exchange unit then and from clock unit; After all business clocks and outside input clock were collected in the master clock unit, be locked on the clock source the best in quality, and give all business unit with the clock distribution that produces and from clock unit.All the time be locked in from clock unit on the output clock of master clock unit, so frequency and phase place are in full accord between the clock of the principal and subordinate's clock unit output.After described business unit receives principal and subordinate's clock that principal and subordinate's clock unit sends here, handle, be locked on the master clock, reference clock is provided for professional sending module through phase-locked loop.
Behind the master clock element failure,, still kept frequency and the phase place of master clock before losing efficacy from the output clock of clock unit because clock unit possesses the maintenance function.Become the master clock unit from the rapid auto switching of clock unit simultaneously, and begin again the clock source of tracking lock the best.In these a series of processes, kept good frequency stability and phase continuity from the output clock of clock unit, thereby guaranteed the operate as normal of each business unit.
As shown in Figure 1 be the structural representation of clock synchronization apparatus and implementation method in the system clock synchronizer of the present invention.This device is made of business unit, clock unit and information exchange unit, described business unit as shown in Figure 2, clock unit is as shown in Figure 3.Four passages are arranged on the information exchange unit: one is the clock acquisition channel, and each business unit is given the master clock unit clock that extracts by this passage and from clock unit from business; Second is that master clock distributes passage, and all business unit are distributed to the master clock that produces in the master clock unit; Article three, be from the clock distribution passage, give all business unit from clock distribution from what clock unit will produce; Article four, be the data communication passage, it is for providing the data/address bus of information such as transmission clock credit rating, principal and subordinate's clock status between business unit and the clock unit.Information exchange unit can be realized with the mode of backboard.
As shown in Figure 2, described business unit of the present invention is made up of phase-locked loop three parts of the redundant input of receiver module, sending module and band.Described receiver module must have clock data recovery function (CDR:Clock and Data Recover), and it extracts clock from the business that receives, give principal and subordinate's clock unit clock and quality information thereof simultaneously by information exchange unit then; Simultaneously, the phase-locked loop of the redundant input of band receives respectively from the master clock unit with from the master clock of clock unit with from clock, and is locked on the master clock, export a stable clock and gives sending module as the transmission reference clock.During operate as normal, pll lock after master clock lost efficacy, is used instead from clock on master clock immediately.Because design characteristic of the present invention is consistent from the frequency of clock and the master clock before phase place and the inefficacy, therefore this clock switches influence and damage that business is subjected to and has been reduced to minimum.
As shown in Figure 3, clock unit is made up of clock selection module, phase-locked loop and clock distribution module three parts.Clock selection module can realize that it selects one from all clock inputs of clock unit, pass to phase-locked loop with programming device.The phase-locked loop of clock unit has functions such as free concussion, maintenance, locking, realizes with digital phase-locked loop that usually also available analog phase-locked look and digital phase-locked loop are used and realize.The clock distribution module is responsible for the driving and the distribution of phase-locked loop output clock, and the integrated circuit of its available dedicated is realized.The clock input of clock unit has three kinds: the clock that business unit is sent here, external clock input and principal and subordinate's clock unit send clock mutually, and the external clock input is meant the clock that the clockwork outside the system provides to native system.The optimal clock source is selected according to the quality information and the exterior arrangement information of various clocks in the master clock unit, and locking back produces master clock, through sending each service board to behind the clock driver and from clock unit.Describedly can only be locked on the master clock, and produce, send each service board and master clock unit to through behind the clock driver from clock from clock unit.Principal and subordinate's clock all adopts the differential level transmission, can be multiple level such as CML, LVDS, LVPECL.
As shown in Figure 4, during system clock synchronizer operate as normal of the present invention: the clock and data recovery function of receiver module can recover clock signal on the described business unit from the business that receives, and obtains clock quality information; By backboard these two kinds of signals are sent to the master clock unit simultaneously then and from clock unit; After all business clocks and outside input clock were collected in the master clock unit, by comparing credit rating information, determine and select clock source the best in quality and give phase-locked loop that the output of phase-locked loop is through the clock distribution module, distribute to each business unit and from clock unit; Describedly need not to carry out clock selecting from clock unit, its phase-locked loop is locked on the output clock of master clock unit all the time, guarantees that frequency is consistent with phase place between principal and subordinate's clock.Each business unit can both independently receive principal and subordinate's clock, and after phase-locked loop is handled, for professional sending module provides stable reference clock source.
As shown in Figure 5, after the master clock plate lost efficacy, active-standby switching can take place in clock unit, describedly become the master clock unit from clock unit, its clock source is that clock unit has sent clock mutually no longer just, and it will choose the clock source again according to the rule of master clock unit, in the process of changing the clock source, phase-locked loop on this clock unit is operated in hold mode always, has kept frequency and initial phase before master clock lost efficacy, up to locking onto again on the new clock source; The process that converts master clock and locking from clock to, this clock is keeping stable frequency always, and does not have phase hit.
In addition, upper layer software (applications) also directly transmitting order to lower levels finish masterslave switchover, this moment generation systems will carry out and the same operation shown in Figure 5.
Analysis by above-mentioned embodiment can see, utilizes the inventive method can make clock synchronization on all business unit to the clock source of system's the best, and can guarantee that the harmless protection of system clock switches.
Claims (6)
1, a kind of system clock synchronizer, it is characterized in that, it comprises a plurality of business unit, two clock unit and an information exchange unit of principal and subordinate each other, and described business unit is used for extracting the clock of reception business, and the clock after using synchronously is as sending the business reference clock; Described clock unit is used for handling and distributing clock; Described information exchange unit is used for clock unit and business unit are coupled together, and connects and the data communication passage for they provide clock.
2, device according to claim 1 is characterized in that, described business unit also comprises: the professional receiver module of band Clock Extraction function, phase-locked loop and the professional sending module that has redundancy clock to import; Described professional receiver module extracts clock and exports to described clock unit from the business that receives, for clock unit provides timing reference input; Described principal and subordinate's clock unit is sent the two-way frequency clock all identical with phase place back to and is given described business unit, after the described phase-locked loop that has redundancy clock to import is selected them to handle, offers professional sending module as sending reference clock.
3, device according to claim 1 is characterized in that, described principal and subordinate's clock unit has identical structure, all comprises clock selection module, phase-locked loop and clock distribution module; Described clock selection module is used for all clocks of system are selected, and is input to then in the phase-locked loop, behind the described clock distribution of the output process unit of phase-locked loop, can pass to all business unit.
4, device according to claim 3 is characterized in that, described master clock unit is used for selecting best clock from all clock sources, carries out tracking lock and handles; On the described output clock that then always is locked in the master clock unit from clock unit.
5, device according to claim 4 is characterized in that, all clocks of described system comprise that clock, system's external clock and principal and subordinate's clock unit that all business unit transmission come send clock mutually.
6, a kind of method of the system as claimed in claim 1 clock synchronization, it may further comprise the steps:
A) described business unit extracts clock signal from the business that receives, and obtains clock quality information, sends the master clock unit simultaneously to by information exchange unit then and from clock unit;
B) after all clocks of system were collected in described master clock unit, be locked on the clock source the best in quality, and give all business unit with the clock distribution that produces and from clock unit; On the described output clock that is locked in the master clock unit from clock unit all the time;
C) after described business unit receives principal and subordinate's clock that principal and subordinate's clock unit sends here, handle, be locked on the master clock, reference clock is provided for professional sending module through phase-locked loop;
D) behind the master clock element failure, described output clock from clock unit still keeps the frequency and the phase place of master clock before losing efficacy, and simultaneously describedly becomes the master clock unit from the rapid auto switching of clock unit, and begins again the clock source of tracking lock the best.
E) described business unit is behind the master clock element failure, phase-locked loop can carry out the clock source and switch, switch to from clock, owing to identical frequency and phase place are arranged from clock and master clock, therefore switching of clock source can't harm, and phase-locked loop provides reference clock to be affected for professional sending module.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410077711 CN1798018A (en) | 2004-12-30 | 2004-12-30 | Device and method for synchronizing system clock |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200410077711 CN1798018A (en) | 2004-12-30 | 2004-12-30 | Device and method for synchronizing system clock |
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| CN1798018A true CN1798018A (en) | 2006-07-05 |
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| CN 200410077711 Pending CN1798018A (en) | 2004-12-30 | 2004-12-30 | Device and method for synchronizing system clock |
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| WO2009018758A1 (en) * | 2007-08-08 | 2009-02-12 | Huawei Technologies Co., Ltd. | A microtca system, a clock card and a providing clock method |
| CN101232361B (en) * | 2008-01-11 | 2011-03-16 | 北京邮电大学 | Method and apparatus for multiplexing multi-path same grade heterogeny data |
| CN102006135A (en) * | 2010-12-03 | 2011-04-06 | 北京华环电子股份有限公司 | Method and device for selecting synchronous clock source |
| CN102142955A (en) * | 2011-04-21 | 2011-08-03 | 京信通信系统（中国）有限公司 | Allocation method and device of MicroTCA (telecom computing architecture) synchronous clock |
| CN102158944A (en) * | 2010-02-11 | 2011-08-17 | 华为技术有限公司 | Sub-frame, network element equipment, and method for synchronizing sub-frame clock |
| CN102263630A (en) * | 2011-07-21 | 2011-11-30 | 中兴通讯股份有限公司 | Clock source selection method |
| CN102347814A (en) * | 2011-10-11 | 2012-02-08 | 上海电力学院 | Slave clock regulation method based on master clock frequency difference |
| CN102859927A (en) * | 2012-05-10 | 2013-01-02 | 华为技术有限公司 | Data and clock recovery module and data and clock recovery method |
| CN102904661A (en) * | 2011-07-27 | 2013-01-30 | 中兴通讯股份有限公司 | Method for PTP (precision time protocol) equipment to realize graceful restart and PTP equipment |
| CN103401630A (en) * | 2013-07-30 | 2013-11-20 | 西南大学 | System and method for redundant timing of industrial control network |
| CN106160908A (en) * | 2015-04-23 | 2016-11-23 | 深圳市恒扬数据股份有限公司 | Two rank programmatic telecommunication level clock tree circuits |
| CN106656392A (en) * | 2016-12-26 | 2017-05-10 | 广东大普通信技术有限公司 | Clock reference seamless switching method and device |
| CN107861412A (en) * | 2017-09-27 | 2018-03-30 | 全球能源互联网研究院有限公司 | Signal acquisition method, apparatus and system |
| CN111181555A (en) * | 2019-12-31 | 2020-05-19 | 瑞斯康达科技发展股份有限公司 | PTP clock synchronization system and clock synchronization method |
| CN114499734A (en) * | 2022-02-25 | 2022-05-13 | 南京贝龙通信科技有限公司 | Communication clock synchronization method, system and equipment based on PTP |
| CN116846530A (en) * | 2023-06-29 | 2023-10-03 | 北京邮电大学 | Optical switching network based on whole network clock frequency synchronization, data transmitting and receiving method |
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2004
- 2004-12-30 CN CN 200410077711 patent/CN1798018A/en active Pending
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| CN101364861B (en) * | 2007-08-08 | 2012-11-07 | 华为技术有限公司 | MicroTCA system, time clock card and method for providing time clock |
| US9059812B2 (en) | 2007-08-08 | 2015-06-16 | Huawei Technologies Co., Ltd. | MicroTCA carrier, clock card and method for providing a clock |
| WO2009018758A1 (en) * | 2007-08-08 | 2009-02-12 | Huawei Technologies Co., Ltd. | A microtca system, a clock card and a providing clock method |
| CN101232361B (en) * | 2008-01-11 | 2011-03-16 | 北京邮电大学 | Method and apparatus for multiplexing multi-path same grade heterogeny data |
| CN102158944B (en) * | 2010-02-11 | 2015-02-04 | 华为技术有限公司 | Sub-frame, network element equipment, and method for synchronizing sub-frame clock |
| CN102158944A (en) * | 2010-02-11 | 2011-08-17 | 华为技术有限公司 | Sub-frame, network element equipment, and method for synchronizing sub-frame clock |
| CN102006135A (en) * | 2010-12-03 | 2011-04-06 | 北京华环电子股份有限公司 | Method and device for selecting synchronous clock source |
| CN102142955B (en) * | 2011-04-21 | 2014-08-13 | 京信通信系统（中国）有限公司 | Allocation method and device of MicroTCA (telecom computing architecture) synchronous clock |
| CN102142955A (en) * | 2011-04-21 | 2011-08-03 | 京信通信系统（中国）有限公司 | Allocation method and device of MicroTCA (telecom computing architecture) synchronous clock |
| CN102263630A (en) * | 2011-07-21 | 2011-11-30 | 中兴通讯股份有限公司 | Clock source selection method |
| WO2013010417A1 (en) * | 2011-07-21 | 2013-01-24 | 中兴通讯股份有限公司 | Clock source selecting method |
| CN102263630B (en) * | 2011-07-21 | 2017-06-16 | 中兴通讯股份有限公司 | A kind of system of selection of clock source |
| CN102904661B (en) * | 2011-07-27 | 2017-07-14 | 中兴通讯股份有限公司 | PTP equipment realizes the method and PTP equipment of smooth restarting |
| CN102904661A (en) * | 2011-07-27 | 2013-01-30 | 中兴通讯股份有限公司 | Method for PTP (precision time protocol) equipment to realize graceful restart and PTP equipment |
| CN102347814B (en) * | 2011-10-11 | 2014-02-26 | 上海电力学院 | Slave clock regulation method based on master clock frequency difference |
| CN102347814A (en) * | 2011-10-11 | 2012-02-08 | 上海电力学院 | Slave clock regulation method based on master clock frequency difference |
| CN102859927B (en) * | 2012-05-10 | 2015-03-11 | 华为技术有限公司 | Data and clock recovery module and data and clock recovery method |
| CN102859927A (en) * | 2012-05-10 | 2013-01-02 | 华为技术有限公司 | Data and clock recovery module and data and clock recovery method |
| CN103401630B (en) * | 2013-07-30 | 2016-08-10 | 西南大学 | Redundancy timing system in a kind of industrial control network and method |
| CN103401630A (en) * | 2013-07-30 | 2013-11-20 | 西南大学 | System and method for redundant timing of industrial control network |
| CN106160908A (en) * | 2015-04-23 | 2016-11-23 | 深圳市恒扬数据股份有限公司 | Two rank programmatic telecommunication level clock tree circuits |
| CN106160908B (en) * | 2015-04-23 | 2018-09-11 | 深圳市恒扬数据股份有限公司 | Two rank programmatic telecommunication grade clock tree circuits |
| CN106656392A (en) * | 2016-12-26 | 2017-05-10 | 广东大普通信技术有限公司 | Clock reference seamless switching method and device |
| CN107861412A (en) * | 2017-09-27 | 2018-03-30 | 全球能源互联网研究院有限公司 | Signal acquisition method, apparatus and system |
| CN111181555A (en) * | 2019-12-31 | 2020-05-19 | 瑞斯康达科技发展股份有限公司 | PTP clock synchronization system and clock synchronization method |
| CN111181555B (en) * | 2019-12-31 | 2023-09-12 | 瑞斯康达科技发展股份有限公司 | PTP clock synchronization system and clock synchronization method |
| CN114499734A (en) * | 2022-02-25 | 2022-05-13 | 南京贝龙通信科技有限公司 | Communication clock synchronization method, system and equipment based on PTP |
| CN116846530A (en) * | 2023-06-29 | 2023-10-03 | 北京邮电大学 | Optical switching network based on whole network clock frequency synchronization, data transmitting and receiving method |
| CN116846530B (en) * | 2023-06-29 | 2024-03-19 | 北京邮电大学 | Optical switching network based on whole network clock frequency synchronization, data transmitting and receiving method |
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