CN1797143A - Method for manufacturing pixel structure - Google Patents
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- CN1797143A CN1797143A CN 200410102706 CN200410102706A CN1797143A CN 1797143 A CN1797143 A CN 1797143A CN 200410102706 CN200410102706 CN 200410102706 CN 200410102706 A CN200410102706 A CN 200410102706A CN 1797143 A CN1797143 A CN 1797143A
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Abstract
The invention is a method for manufacturing a pixel structure, comprising the steps of: firstly forming a gate on a substrate and forming a gate insulating layer on the substrate to cover the gate; successively, forming a semiconductor layer on the insulating layer and forming a metallic layer on the semiconductor layer; then forming a first mask layer on the metallic layer and using the first mask layer as an etching mask to patternize the metallic layer so as to form a source/drain; then, forming a second mask layer on the first mask layer, where the region between the source and drain is also covered with the second mask layer; then, using the first and second mask layers as etching masks to patternize the semiconductor layer and removing the first and second mask layers; forming a protective layer on the substrate and forming a pixel electrode on the protective layer, where the pixel electrode is connected with the drain.
Description
Technical field
The invention relates to a kind of manufacture method of structure of semiconductor element, and particularly about a kind of invention of one pixel structure process method of Thin Film Transistor-LCD.
Background technology
Multimedia society improves rapidly, is indebted to the tremendous progress of semiconductor element or display device mostly.With regard to display, have that high picture quality, space utilization efficient are good, (Thin Film Transistor Liquid Crystal Display TFT-LCD) becomes the main flow in market to the Thin Film Transistor-LCD of low consumpting power, advantageous characteristic such as radiationless gradually.
Thin Film Transistor-LCD mainly is made of thin-film transistor array base-plate, colorful filter array substrate and liquid crystal layer, wherein thin-film transistor array base-plate is by a plurality of thin film transistor (TFT)s with arrayed, and constitutes several dot structures with one of the corresponding setting of each thin film transistor (TFT) pixel electrode (Pixel Electrode).And above-mentioned thin film transistor (TFT) comprises grid, channel layer, drain electrode and source electrode, is used as the on-off element of liquid crystal display.
Figure 1A to Fig. 1 E is a kind of process flow diagram of known one pixel structure process method.At first, shown in Figure 1A, on substrate 100, form grid 110.Then, on substrate 100, form gate insulation layer 120, and cover grid 110.Then, form semiconductor layer 130 on gate insulation layer 120, this semiconductor layer 130 comprises passage material layers 132 and Ohmic contact material layers 134.Afterwards, on semiconductor layer 130, form metal level 140.And, on metal level 140, form photoresist layer 150a.
Then, shown in Figure 1B, be etching mask with photoresist layer 150a, patterned metal layer 140 (shown in Figure 1A) is to form source electrode 142/ drain electrode 144.And patterning Ohmic contact material layers 134 (shown in Figure 1A) is to form ohmic contact layer 134a.
Then, shown in Fig. 1 C, remove photoresist layer 150a (shown in Figure 1B), and in source electrode 142/ drain electrode 144, form another photoresist layer 150b, and this photoresist layer 150b also covers the zone between source electrode 142/ drain electrode 144.At this, be the employed light shields of standard five road technology light shield technologies because of forming the employed light shield of photoresist layer 150b, therefore defined to go out photoresist layer 150b be passage island-shaped pattern or passage peninsula shape pattern, thereby cover drain electrode 144 fully.
Afterwards, be etching mask with photoresist layer 150b and beneath source electrode 142/ drain electrode 144, patterning passage material layers 132 (shown in Figure 1B) is to form channel layer 132a.Wherein, because photoresist layer 150b does not cover drain electrode 144, so in etched process, 144 can be subjected to plasma bombardment by partly draining of covering of mask layer 150b.
Then, shown in Fig. 1 D, remove photoresist layer 150b (shown in Fig. 1 C), and on substrate 100, form protective seam 160.And, in protective seam 160, form opening 162, to expose drain electrode 144.
Then, shown in Fig. 1 E, on protective seam 160, form pixel electrode 170, and pixel electrode 170 is electrically connected with drain electrode 144 by opening 162 (shown in Fig. 1 D).
From the above, because in the known practice, photoresist layer 150b does not cover drain electrode 144, make when patterning passage material layers 132, have part drain electrode 144 and be subjected to plasma bombardment, so that pixel electrode 170 and the contact impedance value that is subjected between the part drain electrode 144 of plasma bombardment improve, thereby may reduce the display quality of TFT thin film transistor monitor.
Summary of the invention
Therefore, the purpose of this invention is to provide a kind of one pixel structure process method, to improve in the known practice problem that drains and be subject to plasma bombardment and cause the contact impedance between drain electrode and pixel electrode to increase.
Based on above-mentioned and other purpose, the present invention proposes a kind of one pixel structure process method, mainly comprises the following steps: at first, forms grid on substrate, and forms gate insulation layer on substrate, and covers this grid.Then, on gate insulation layer, form semiconductor layer, and on semiconductor layer, form metal level.Afterwards, forming first mask layer on metal level, is etching mask with first mask layer, and patterned metal layer to be forming source/drain, and removes the segment thickness of semiconductor layer.Then, on first mask layer, form second mask layer, and second mask layer also comprises the zone that covers between the source/drain.Then, be etching mask with first and second mask layer, patterned semiconductor layer, and remove first and second mask layer.Afterwards, form protective seam on substrate, and form pixel electrode on protective seam, wherein pixel electrode is electrically connected with drain electrode.
In the above-mentioned one pixel structure process method, the formation method of second mask layer for example is included in coating second photoresist layer on first mask layer, carry out lithography process again with patterning second photoresist layer, wherein second photoresist layer of patterning covers first mask layer of part and covers zone between the source/drain.
The present invention proposes a kind of one pixel structure process method in addition, mainly comprises the following steps: at first, forms grid on substrate, and forms gate insulation layer on substrate, and covers this grid.Then, on gate insulation layer, form semiconductor layer, and on semiconductor layer, form metal level.Then, forming first mask layer on metal level, is etching mask with first mask layer, and patterned metal layer to be forming source/drain, and removes the segment thickness of semiconductor layer.Afterwards, remove first mask layer, and on source/drain, form second mask layer, and second mask layer also comprises the zone that covers between the source/drain.Then, be etching mask with second mask layer, patterned semiconductor layer, and remove second mask layer.Afterwards, form protective seam on substrate, and form pixel electrode on protective seam, wherein pixel electrode is electrically connected with drain electrode.
In above-mentioned one pixel structure process method, the formation method of second mask layer for example is included in coating second photoresist layer on the source/drain, carry out lithography process with patterning second photoresist layer, wherein second photoresist layer of patterning covers the zone between source/drain and the source/drain.
In two kinds of above-mentioned one pixel structure process method, the method that forms semiconductor layer for example is included in and forms the passage material layers on the gate insulation layer, and forms the Ohmic contact material layers on the passage material layers.
In two kinds of above-mentioned one pixel structure process method, after forming protective seam on the substrate, for example also be included in and form opening in the protective seam, exposing drain electrode, and pixel electrode is electrically connected by opening and with drain electrode.
In two kinds of above-mentioned one pixel structure process method, the formation method of first mask layer is included in coating first photoresist layer on the metal level, carries out lithography process again, with patterning first photoresist layer.
In two kinds of above-mentioned one pixel structure process method, patterned metal layer for example is dry-etching method or wet etching with the method that forms source/drain.In addition, the method for patterned semiconductor layer for example is the dry-etching method.
In two kinds of above-mentioned one pixel structure process method, the formation method of pixel electrode for example is included in and forms transparent conductive film on the protective seam, carries out lithography process again, with the patterning transparent conductive film.Wherein, the method for formation transparent conductive film for example is a sputtering method.
In the present invention's one pixel structure process method, with dry-etching method patterned semiconductor layer the time, because of adopting first and second mask layer simultaneously as etching mask, so drain electrode can not be subjected to plasma bombardment, therefore can reduce the contact impedance between drain electrode and pixel electrode, and can improve product percent of pass, and then improve the display quality of Thin Film Transistor-LCD.In addition, can remove first and second mask layer simultaneously in the present invention's the one pixel structure process method, thus mask layer stripping technology can be simplified one, to improve the throughput rate of product.
In addition, in another one pixel structure process method of the present invention, because of covering source/drain fully in formed second mask layer on the source/drain and covering zone between the source/drain.So with dry-etching method patterned semiconductor layer the time, drain electrode can not bombarded by subject plasma, therefore can reduce the contact impedance between drain electrode and pixel electrode, and can improve product percent of pass, and then improve the display quality of Thin Film Transistor-LCD.
State with other purpose, feature and advantage and can become apparent on the present invention for allowing, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Embodiment
First embodiment
Fig. 2 A to Fig. 2 G is according to the described a kind of one pixel structure process method process flow diagram of first embodiment of the invention.Please refer to Fig. 2 A to Fig. 2 G, the one pixel structure process method of first embodiment of the invention mainly comprises the following steps: at first, shown in Fig. 2 A, forms grid 110 on substrate 100.Wherein, the material of grid 110 for example is chromium, aluminium, molybdenum or other metal material that is suitable for.
Then, shown in Fig. 2 B, on substrate 100, form gate insulation layer 120, and cover grid 110.Then, on gate insulation layer 120, form semiconductor layer 130.Wherein, the method that forms semiconductor layer 130 forms Ohmic contact material layers 134 more for example prior to forming passage material layers 132 on the gate insulation layer 120 on passage material layers 132.In addition, the material of gate insulation layer 120 for example is a silicon nitride, and the material of passage material layers 132 for example is an amorphous silicon, and the material of Ohmic contact material layers 134 for example is a n type amorphous silicon.It should be noted that in the present embodiment and also can not form Ohmic contact material layers 134.That is semiconductor layer 130 can only comprise channel layer material layers 132.
Afterwards, shown in Fig. 2 C, on semiconductor layer 130, form metal level 140, and on metal level 140, form mask layer 250a.In the present embodiment, metal level 140 for example is formed on the ohmic contact layer 134, and the material of metal level 140 for example is chromium, aluminium, molybdenum or other metal material that is suitable for.In addition, the formation method of mask layer 250a for example for prior to being coated with photoresist layer (not expressing among the figure) on the metal level 140, is carried out lithography process again, and with the patterning photoresist layer, the method that wherein is coated with photoresist layer for example is method of spin coating.
Then, shown in Fig. 2 D, be etching mask with mask layer 250a, patterned metal layer 140 (shown in Fig. 2 C) is to form source electrode 142/ drain electrode 144.Wherein, the method for patterned metal layer 140 can be dry-etching method or wet etching.In more detail, in the present embodiment, method that can plasma etching metal level 140 forms source electrode 142/ drain electrode 144, or forms source electrode 142/ drain electrode 144 with etching solution etch metal layers 140.In addition, after forming source electrode 142/ drain electrode 144, for example also comprise patterning Ohmic contact material layers 134 (shown in Fig. 2 C), to form ohmic contact layer 134a, wherein the method for patterning Ohmic contact material layers 134 for example is the dry-etching method.
Then, shown in Fig. 2 E, upward form other mask layer 250b, and mask layer 250b also covers the zone between source electrode 142/ drain electrode 144 in mask layer 250a.Wherein, the formation method of mask layer 250b for example earlier is coated with photoresist layer (not expressing among the figure) on mask layer 250a, carry out lithography process again, with the patterning photoresist layer.And the method for coating photoresist layer for example is a method of spin coating.
Afterwards, be etching mask with mask layer 250a, 250b, patterned semiconductor layer, patterned semiconductor layer for example is that patterning passage material layers 132 (shown in Fig. 2 D) is to form channel layer 132a in the present embodiment.Wherein, the method for patterning passage material layers 132 for example is the dry-etching method.In more detail, in the present embodiment, for example, form channel layer 132a with the method for plasma etching passage material layers 132.It should be noted that in the process of etched channels material layers 132 owing to be coated with mask layer 250a in the drain electrode 144, in etched process, drain electrode 144 can not be subjected to the bombardment of plasma.
Then, shown in Fig. 2 F, remove mask layer 250a, 250b (shown in Fig. 2 E), and on substrate 100, form protective seam 160.Wherein, after forming protective seam 160 on the substrate 100, for example also be included in and form opening 162 in the protective seam 160, to expose drain electrode 144.
Then, shown in Fig. 2 G, on protective seam 160, form pixel electrode 170, and pixel electrode 170 is electrically connected with drain electrode 144.In the present embodiment, pixel electrode 170 for example is electrically connected with drain electrode 144 by opening 162 (shown in Fig. 2 F).In addition, the formation method of pixel electrode 170 for example for forming transparent conductive film (not expressing among the figure) earlier on protective seam 160, is carried out lithography process and etch process, with this transparent conductive film of patterning again.Wherein the material of this transparent conductive film for example be indium tin oxide (Indium Tin Oxide, ITO) or indium-zinc oxide (IndiumZinc Oxide, IZO).In addition, the method for formation transparent conductive film for example is a sputtering method.
Second embodiment
Fig. 3 A to Fig. 3 E is the one pixel structure process method process flow diagram according to the present invention one second embodiment.Please refer to Fig. 3 A to Fig. 3 E, the one pixel structure process method of second embodiment of the invention proposition mainly comprises the following steps: at first, as shown in Figure 3A, utilizes the step of Fig. 2 A to Fig. 2 C to form grid 110 on substrate 100.On substrate 100, form gate insulation layer 120.Then, on gate insulation layer 120, form semiconductor layer 130.Wherein, the method that forms semiconductor layer 130 for example is prior to forming passage material layers 132 on the gate insulation layer 120, form Ohmic contact material layers 134 again on passage material layers 132.Afterwards, on semiconductor layer 130, form metal level 140, and on metal level 140, form mask layer 250a.
Then, shown in Fig. 3 B, be etching mask with mask layer 250a, patterned metal layer 140 (as shown in Figure 3A) is to form source electrode 142/ drain electrode 144.In addition, after forming source electrode 142/ drain electrode 144, for example also comprise patterning Ohmic contact material layers (as shown in Figure 3A) 134, to form ohmic contact layer 134a.In addition, the method for patterned metal layer 140 and Ohmic contact material layers 134 no longer repeats at this to aforementioned similar.
Then, shown in Fig. 3 C, remove mask layer 250a (shown in Fig. 3 B), and in source electrode 142/ drain electrode 144, form another mask layer 250c, and mask layer 250c also covers the zone between source electrode 142/ drain electrode 144.Wherein, the formation method utilization of mask layer 250c is to form photoresist layer earlier, utilizes the lithography process patterning again.Afterwards, be etching mask with mask layer 250c, patterned semiconductor layer, patterned semiconductor layer for example is that patterning passage material layers 132 (shown in Fig. 3 B) is to form channel layer 132a in the present embodiment.It should be noted that owing to being coated with mask layer 250c in the drain electrode 144, so in etched process, drain electrode 144 can not be subjected to the bombardment of plasma.
Then, shown in Fig. 3 D, remove mask layer 250c (shown in Fig. 3 C), and on substrate 100, form protective seam 160.Wherein, after forming protective seam 160 on the substrate 100, for example also be included in and form opening 162 in the protective seam 160, to expose drain electrode 144.
Then, shown in Fig. 3 E, on protective seam 160, form pixel electrode 170, and pixel electrode 170 is electrically connected with drain electrode 144.In the present embodiment, pixel electrode 170 for example is electrically connected with drain electrode 144 by opening 162 (shown in Fig. 3 D).In addition, the formation method of pixel electrode 170 no longer repeats at this to aforementioned similar.
In sum, in the one pixel structure process method of first embodiment of the invention, owing to after patterned source/drain electrode, first mask layer is not removed, but on first mask layer, form second mask layer, and cover the zone between the source/drain.So, with dry-etching method patterned semiconductor layer the time, can first and second mask layer as etching mask, make drain electrode can not be subjected to plasma bombardment.Therefore can reduce the contact impedance between drain electrode and pixel electrode, and can improve product percent of pass, and then improve the display quality of Thin Film Transistor-LCD.In addition, in the one pixel structure process method of first embodiment of the invention, remove first and second mask layer simultaneously, thus mask layer stripping technology can be simplified one, to improve the throughput rate of product.
In addition, in the one pixel structure process method of second embodiment of the invention, because of forming mask layer on source/drain, and this mask layer covers source/drain fully and covers zone between the source/drain.So with dry-etching method patterned semiconductor layer the time, drain electrode can not bombarded by subject plasma, therefore can reduce the contact impedance between drain electrode and pixel electrode, and can improve product percent of pass, and then improve the display quality of Thin Film Transistor-LCD.
Though the present invention with preferred embodiment openly as above; right its is not in order to limit the present invention; the ordinary skill of any technical field that the present invention belongs to; without departing from the spirit and scope of the invention; when can doing a little change and retouching, so the present invention's protection domain attached claims person of defining after looking is as the criterion.
Description of drawings
Figure 1A to Fig. 1 E is a kind of process flow diagram of known one pixel structure process method.
Fig. 2 A to Fig. 2 G is according to the described a kind of one pixel structure process method process flow diagram of first embodiment of the invention.
Fig. 3 A to Fig. 3 E is according to the described a kind of one pixel structure process method process flow diagram of second embodiment of the invention.
The main element description of symbols
100: substrate
110: grid
120: gate insulation layer
130: semiconductor layer
132: the passage material layers
132a: channel layer
134: the Ohmic contact material layers
134a: ohmic contact layer
140: metal level
142: source electrode
144: drain electrode
150a, 150b: photoresist layer
160: protective seam
162: opening
170: pixel electrode
250a, 250b, 250c: mask layer
Claims (18)
1. one pixel structure process method is characterized in that comprising:
On substrate, form grid;
On this substrate, form gate insulation layer, and cover this grid;
On this gate insulation layer, form semiconductor layer;
On this semiconductor layer, form metal level;
On this metal level, form first mask layer;
With this first mask layer is etching mask, and this metal level of patterning to be forming source/drain, and removes the segment thickness of this semiconductor layer;
On this first mask layer, form second mask layer, and this second mask layer also comprises the zone that covers between this source/drain;
With this first with this second mask layer be etching mask, this semiconductor layer of patterning;
Remove this first with this second mask layer;
On this substrate, form protective seam; And
Form pixel electrode on this protective seam, wherein this pixel electrode is electrically connected with this drain electrode.
2. the one pixel structure process method according to claim 1 is characterized in that the method that forms this semiconductor layer comprises:
On this gate insulation layer, form the passage material layers; And
On this passage material layers, form the Ohmic contact material layers.
3. the one pixel structure process method according to claim 1 is characterized in that also being included in this protective seam and forming opening after forming this protective seam on this substrate, expose this drain electrode, and this pixel electrode is electrically connected with this drain electrode by this opening.
4. according to claim 1 a described one pixel structure process method, it is characterized in that the formation method of this first mask layer comprises:
Coating first photoresist layer on metal level; And
Carry out lithography process, with this first photoresist layer of patterning.
5. the one pixel structure process method according to claim 1 is characterized in that the formation method of this second mask layer comprises:
Coating second photoresist layer on this first mask layer, and this second photoresist layer also comprises the zone that covers between this source/drain; And
Carry out lithography process, with this second photoresist layer of patterning.
6. the one pixel structure process method according to claim 1 is characterized in that this metal level of patterning comprises dry-etching method or wet etching with the method that forms this source/drain.
7. the one pixel structure process method according to claim 1 is characterized in that the method for this semiconductor layer of patterning comprises the dry-etching method.
8. the one pixel structure process method according to claim 1 is characterized in that the formation method of this pixel electrode comprises:
On this protective seam, form transparent conductive film; And
Carry out lithography process, with this transparent conductive film of patterning.
9. described according to Claim 8 one pixel structure process method is characterized in that the method that forms this transparent conductive film comprises sputtering method.
10. one pixel structure process method is characterized in that comprising:
On substrate, form grid;
On this substrate, form gate insulation layer, and cover this grid;
On this gate insulation layer, form semiconductor layer;
On this semiconductor layer, form metal level;
On this metal level, form first mask layer;
With this first mask layer is etching mask, and this metal level of patterning to be forming source/drain, and removes the segment thickness of this semiconductor layer;
Remove this first mask layer;
On this source/drain, form second mask layer, and this second mask layer also comprises the zone that covers between this source/drain;
With this second mask layer is etching mask, this semiconductor layer of patterning;
Remove this second mask layer;
On this substrate, form protective seam; And
Form pixel electrode on this protective seam, wherein this pixel electrode is electrically connected with this drain electrode.
11. the one pixel structure process method according to claim 10 is characterized in that the method that forms this semiconductor layer comprises:
On this gate insulation layer, form the passage material layers; And
On this passage material layers, form the Ohmic contact material layers.
12. the one pixel structure process method according to claim 10 is characterized in that also being included in this protective seam and forming opening after forming this protective seam on this substrate, expose this drain electrode, and this pixel electrode is electrically connected with this drain electrode by this opening.
13. the one pixel structure process method according to claim 10 is characterized in that the formation method of this first mask layer comprises:
Coating first photoresist layer on metal level; And
Carry out lithography process, with this first photoresist layer of patterning.
14. the one pixel structure process method according to claim 10 is characterized in that the formation method of this second mask layer comprises:
Coating second photoresist layer on this source/drain, and this second photoresist layer also comprises the zone that covers between this source/drain; And
Carry out lithography process, with this second photoresist layer of patterning.
15. the one pixel structure process method according to claim 10 is characterized in that this metal level of patterning comprises dry-etching method or wet etching with the method that forms this source/drain.
16. the one pixel structure process method according to claim 10 is characterized in that the method for this semiconductor layer of patterning comprises the dry-etching method.
17. the one pixel structure process method according to claim 10 is characterized in that the formation method of this pixel electrode comprises:
On this protective seam, form transparent conductive film; And
Carry out lithography process, with this transparent conductive film of patterning.
18. the one pixel structure process method according to claim 17 is characterized in that the method that forms this transparent conductive film comprises sputtering method.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2004101027065A CN100368910C (en) | 2004-12-28 | 2004-12-28 | Method for manufacturing pixel structure |
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|---|---|---|---|
| CNB2004101027065A CN100368910C (en) | 2004-12-28 | 2004-12-28 | Method for manufacturing pixel structure |
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| CN1797143A true CN1797143A (en) | 2006-07-05 |
| CN100368910C CN100368910C (en) | 2008-02-13 |
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| CNB2004101027065A Expired - Fee Related CN100368910C (en) | 2004-12-28 | 2004-12-28 | Method for manufacturing pixel structure |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100461379C (en) * | 2007-03-29 | 2009-02-11 | 友达光电股份有限公司 | Picture element structure of liquid crystal display and producing method thereof |
| CN101212028B (en) * | 2006-12-28 | 2012-05-09 | 上海广电电子股份有限公司 | Method for patterning base-board electrodes of an organic luminous display |
| CN111584522A (en) * | 2020-05-25 | 2020-08-25 | 成都中电熊猫显示科技有限公司 | Array substrate, manufacturing method thereof and display panel |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5466618A (en) * | 1993-12-29 | 1995-11-14 | Goldstar Co., Ltd. | Method for fabricating a thin film transistor for a liquid crystal display |
| KR0139346B1 (en) * | 1994-03-03 | 1998-06-15 | 김광호 | Manufacturing method of tft lcd |
| KR0145900B1 (en) * | 1995-02-11 | 1998-09-15 | 김광호 | Thin film transistor liquid crystal display elements and its manufacturing method |
| JP2001324725A (en) * | 2000-05-12 | 2001-11-22 | Hitachi Ltd | Liquid crystal display device and method of manufacture |
| TW495986B (en) * | 2001-05-11 | 2002-07-21 | Au Optronics Corp | Method of manufacturing thin film transistor flat panel display |
| TW488080B (en) * | 2001-06-08 | 2002-05-21 | Au Optronics Corp | Method for producing thin film transistor |
| US7569153B2 (en) * | 2002-05-23 | 2009-08-04 | Lg Display Co., Ltd. | Fabrication method of liquid crystal display device |
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2004
- 2004-12-28 CN CNB2004101027065A patent/CN100368910C/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101212028B (en) * | 2006-12-28 | 2012-05-09 | 上海广电电子股份有限公司 | Method for patterning base-board electrodes of an organic luminous display |
| CN100461379C (en) * | 2007-03-29 | 2009-02-11 | 友达光电股份有限公司 | Picture element structure of liquid crystal display and producing method thereof |
| CN111584522A (en) * | 2020-05-25 | 2020-08-25 | 成都中电熊猫显示科技有限公司 | Array substrate, manufacturing method thereof and display panel |
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| CN100368910C (en) | 2008-02-13 |
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Granted publication date: 20080213 Termination date: 20191228 |